Merge pull request #393 from negativeExponent/updates

misc updates, fixes and cleanup
This commit is contained in:
Autechre
2020-10-19 05:27:03 +02:00
committed by GitHub
6 changed files with 91 additions and 65 deletions

View File

@@ -32,6 +32,76 @@
* Subtype 2, 8192 or more KiB PRG-ROM, no CHR-ROM: Like Subtype 0, but MMC3 registers $46 and $47 swapped.
*/
/*
Mode Register ($5xx0)
7654 3210
---- ----
PCTm PMMM
|||| ||||
|||| |+++- Select PRG Banking Mode (ignored in Extended MMC3 Mode)
|||| | 0: MMC3 PRG Mode, 512 KiB Outer PRG Bank Size
|||| | 1: MMC3 PRG Mode, 256 KiB Outer PRG Bank Size
|||| | 2: MMC3 PRG Mode, 128 KiB Outer PRG Bank Size
|||| | 3: NROM-128 PRG Mode, 16 KiB PRG at $8000-$BFFF mirrored at $C000-$FFFF
|||| | 4: NROM-256 PRG Mode, 32 KiB PRG at $8000-$FFFF
|||| | 5-7: Never used
|||| +---- PRG Base A21
|||+------ Select Outer CHR Bank Size
||| 0: In MMC3 CHR Mode: 256 KiB
||| In CNROM CHR Mode: 32 KiB
||| 1: In MMC3 CHR Mode: 128 KiB
||| In CNROM CHR Mode: 16 KiB
||+------- Select CHR Memory Type
|| 0: CHR-ROM
|| 1: CHR-RAM
|+-------- CHR Mode
| 0: MMC3 CHR Mode
| 1: NROM/CNROM CHR Mode
+--------- PRG Base A22
Power-on value: $00
PRG Base Register ($5xx1)
Mask: $5xx3, x determined by solder pad setting
7654 3210
---- ----
.PPP PPPP
||| ||||
+++-++++- PRG Base A20..A14
Power-on value: $00
CHR Base Register ($5xx2)
Mask: $5xx3, x determined by solder pad setting
7654 3210
---- ----
ccdC CCCC
|||| ||||
++++-++++- CHR Base A20..A13
||+------- PRG Base A25
++-------- PRG Base A24..A23
Power-on value: $00
Writing to the CHR Base Register also resets the CNROM latch.
Extended Mode Register ($5xx3)
Mask: $5xx3, x determined by solder pad setting
7654 3210
---- ----
.C.. .CE.
| ||
| |+- Extended MMC3 Mode
| | 0: disable
| | 1: enable
+----+-- Select NROM/CNROM CHR Mode
0: NROM
1: CNROM
Power-on value: $02 (Submapper 1), $00 (otherwise)
*/
/* 2020-3-14 - Refactoring based on latest sources */
/* TODO: Add database for ines 1.0 headers */
@@ -55,7 +125,11 @@ static uint8 irq_reload = 0;
static uint8 cnrom_chr = 0;
static uint8 dipswitch = 0;
static uint8 subType = 0;
static uint8 is_bmcfk23ca = 0;
/* enable dipswitch settings for fk23/fk23ca,
* switchable on reset. Can enable different multicart-modes
* depending on address */
static uint8 dipsw_enable = 0;
static SFORMAT StateRegs[] = {
{ fk23_regs, 4, "EXPR" },
@@ -138,12 +212,12 @@ static void SyncCHR(void)
{
uint16 cbase = INVERT_CHR ? 0x1000 : 0;
uint8 mask = CHR_OUTER_BANK_SIZE ? 0x7F : 0xFF;
uint16 outer = (fk23_regs[2] << 3) & ~mask;
uint16 outer = (fk23_regs[2] << 3);
cwrap(cbase ^ 0x0000, ((mmc3_regs[0] & 0xFE) & mask) | outer);
cwrap(cbase ^ 0x0400, ((mmc3_regs[0] | 0x01) & mask) | outer);
cwrap(cbase ^ 0x0800, ((mmc3_regs[1] & 0xFE) & mask) | outer);
cwrap(cbase ^ 0x0C00, ((mmc3_regs[1] | 0x01) & mask) | outer);
cwrap(cbase ^ 0x0000, ((mmc3_regs[0] & mask) & 0xFE) | outer);
cwrap(cbase ^ 0x0400, ((mmc3_regs[0] & mask) | 0x01) | outer);
cwrap(cbase ^ 0x0800, ((mmc3_regs[1] & mask) & 0xFE) | outer);
cwrap(cbase ^ 0x0C00, ((mmc3_regs[1] & mask) | 0x01) | outer);
cwrap(cbase ^ 0x1000, (mmc3_regs[2] & mask) | outer);
cwrap(cbase ^ 0x1400, (mmc3_regs[3] & mask) | outer);
@@ -383,10 +457,10 @@ static void IRQHook(void)
static void Reset(void)
{
/* this little hack makes sure that we try all the dip switch settings eventually, if we reset enough */
/*if (is_bmcfk23ca) {
if (dipsw_enable) {
dipswitch = (dipswitch + 1) & 7;
printf("BMCFK23C dipswitch set to $%04x\n",0x5000|0x10 << dipswitch);
}*/
FCEU_printf("BMCFK23C dipswitch set to $%04x\n",0x5000|0x10 << dipswitch);
}
fk23_regs[0] = fk23_regs[1] = fk23_regs[2] = fk23_regs[3] = 0;
mmc3_regs[0] = 0;
@@ -463,7 +537,7 @@ static void StateRestore(int version)
void GenBMCFK23C_Init(CartInfo *info)
{
is_bmcfk23ca = 0;
dipsw_enable = 0;
info->Power = Power;
info->Reset = Reset;
@@ -526,6 +600,7 @@ void BMCFK23C_Init(CartInfo *info) {
}
GenBMCFK23C_Init(info);
dipsw_enable = 1;
}
/* UNIF Boards, declares so we can for chr mixed mode size and wram if any */
@@ -539,7 +614,7 @@ void BMCFK23CA_Init(CartInfo *info)
WRAMSIZE = 8 * 1024;
GenBMCFK23C_Init(info);
is_bmcfk23ca = 1;
dipsw_enable = 1;
}
/* BMC-Super24in1SC03 */

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@@ -35,43 +35,12 @@ void FCEU_printf(char *format, ...);
/* Video interface */
void FCEUD_SetPalette(uint8 index, uint8 r, uint8 g, uint8 b);
void FCEUD_GetPalette(uint8 i, uint8 *r, uint8 *g, uint8 *b);
/* Displays an error. Can block or not. */
void FCEUD_PrintError(char *s);
void FCEUD_Message(char *s);
void FCEUD_DispMessage(char *m);
#ifdef NETWORK
/* Network interface */
/* Call only when a game is loaded. */
int FCEUI_NetplayStart(int nlocal, int divisor);
/* Call when network play needs to stop. */
void FCEUI_NetplayStop(void);
/* Note: YOU MUST NOT CALL ANY FCEUI_* FUNCTIONS WHILE IN FCEUD_SendData() or
FCEUD_RecvData().
*/
/* Return 0 on failure, 1 on success. */
int FCEUD_SendData(void *data, uint32 len);
int FCEUD_RecvData(void *data, uint32 len);
/* Display text received over the network. */
void FCEUD_NetplayText(uint8 *text);
/* Encode and send text over the network. */
void FCEUI_NetplayText(uint8 *text);
/* Called when a fatal error occurred and network play can't continue. This function
should call FCEUI_NetplayStop() after it has deinitialized the network on the driver
side.
*/
void FCEUD_NetworkClose(void);
#endif
int FCEUI_BeginWaveRecord(char *fn);
int FCEUI_EndWaveRecord(void);

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@@ -202,11 +202,6 @@ const char * GetKeyboard(void)
return "";
}
int FCEUD_SendData(void *data, uint32 len)
{
return 1;
}
#define BUILD_PIXEL_RGB565(R,G,B) (((int) ((R)&0x1f) << RED_SHIFT) | ((int) ((G)&0x3f) << GREEN_SHIFT) | ((int) ((B)&0x1f) << BLUE_SHIFT))
#if defined (PSP)
@@ -266,15 +261,6 @@ void FCEUD_SetPalette(uint8_t index, uint8_t r, uint8_t g, uint8_t b)
#endif
}
void FCEUD_GetPalette(unsigned char i, unsigned char *r, unsigned char *g, unsigned char *b)
{
}
bool FCEUD_ShouldDrawInputAids (void)
{
return 1;
}
static struct retro_log_callback log_cb;
static void default_logger(enum retro_log_level level, const char *fmt, ...) {}
@@ -304,9 +290,6 @@ void FCEUD_SoundToggle (void)
FCEUI_SetSoundVolume(sndvolume);
}
void FCEUD_VideoChanged (void)
{ }
FILE *FCEUD_UTF8fopen(const char *n, const char *m)
{
if (n)

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@@ -328,13 +328,15 @@ static void CheckHInfo(void) {
case 1:
case 5:
case 176:
tofix |= 32;
iNESCart.iNES2 = 1;
if (moo[x].prgram >= 0) {
tofix |= 32;
iNESCart.iNES2 = 1;
iNESCart.PRGRamSize = (moo[x].prgram & 0x0F) ? (64 << ((moo[x].prgram >> 0) & 0xF)) : 0;
iNESCart.PRGRamSaveSize = (moo[x].prgram & 0xF0) ? (64 << ((moo[x].prgram >> 4) & 0xF)) : 0;
}
if (moo[x].chrram >= 0) {
tofix |= 32;
iNESCart.iNES2 = 1;
iNESCart.CHRRamSize = (moo[x].chrram & 0x0F) ? (64 << ((moo[x].chrram >> 0) & 0xF)) : 0;
iNESCart.CHRRamSaveSize = (moo[x].chrram & 0xF0) ? (64 << ((moo[x].chrram >> 4) & 0xF)) : 0;
}

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@@ -195,9 +195,6 @@ static void FP_FASTAPASS(3) UpdateGP(int w, void *data, int arg) {
joy[1] = *(uint32*)ptr >> 8;
joy[3] = *(uint32*)ptr >> 24;
}
#ifdef NETWORK
if (FCEUnetplay) NetplayUpdate(joy);
#endif
FCEUMOV_AddJoy(joy);
}

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@@ -1241,7 +1241,7 @@ int FCEUPPU_Loop(int skip) {
for (scanline = 0; scanline < totalscanlines; ) { /* scanline is incremented in DoLine. Evil. :/ */
deempcnt[deemp]++;
if ((PPUViewer) && (scanline == PPUViewScanline)) UpdatePPUView(1);
/* if ((PPUViewer) && (scanline == PPUViewScanline)) UpdatePPUView(1); */
DoLine();
if (scanline < normal_scanlines || scanline == totalscanlines)
overclocked = 0;