More mapper updates (#607)
* M061: Add CHR-ROM variant. * M227: Make DIP switch change only apply to submapper 1 * M242: Only assume DIP/solder pad read when A0-A7 are zero, corrects ET-187 and Xing-2462. Initialize M227's and M242's DIP switch setting on Hard Reset. * M052: Support CHR-RAM-less variant of submapper 14. * M364: Correct the outer bank register's address mask, for LT-953 multicart. * M047: Supprt larger-sized multicarts using a compatible PCB. Reset to menu. * M360: Add submapper 1. * M221: Rewrite, add submapper 1 variant. * M288: Remove bank masks to allow for already-existing larger cartridges. * M411: Add submappers. * M417: Add submapper 1. * M115: Add multicart functionalities. * M201: Simplify and correct the power-on value. CF-043, mentioned in the source code comment, needs no submapper; just a correct header with Horizontal mirroring. * M200: Correct the power-on value. * M432: Add submappers to distinguish three variants. * Add mapper 412. --------- Co-authored-by: NewRisingSun <8vytz1+dhp372pv94ebg@sharklasers.com>
This commit is contained in:
NRS-NewRisingSun
@@ -22,37 +22,52 @@
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#include "mapinc.h"
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static uint8 dipswitch;
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static uint8 reg;
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static uint8 submapper;
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static SFORMAT StateRegs[] =
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{
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{ &dipswitch, 1, "DPSW" },
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{ ®, 1, "DPSW" },
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{ 0 }
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};
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static void Sync(void) {
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if (~reg &0x20 && submapper ==1) {
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setprg8(0x8000, 0x40);
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setprg8(0xA000, 0x40);
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setprg8(0xC000, 0x40);
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setprg8(0xE000, 0x40);
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} else
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/* dip 0 and 1 is the same game SMB) */
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if (dipswitch < 2)
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setprg32(0x8000, dipswitch >> 1);
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if ((reg &0x1F) < 2)
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setprg32(0x8000, reg >> 1 &0x0F);
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else {
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setprg16(0x8000, dipswitch);
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setprg16(0xC000, dipswitch);
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setprg16(0x8000, reg &0x1F);
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setprg16(0xC000, reg &0x1F);
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}
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setchr8(dipswitch);
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setmirror(((dipswitch & 0x10) >> 4) ^ 1);
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setchr8(reg);
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setmirror(((reg & 0x10) >> 4) ^ 1);
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}
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static DECLFW(M360WriteReg) {
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reg =V;
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Sync();
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}
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static void M360Power(void) {
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dipswitch = 0;
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reg = 0;
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Sync();
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if (submapper ==1) SetWriteHandler(0x4100, 0x4FFF, M360WriteReg);
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SetReadHandler(0x8000, 0xFFFF, CartBR);
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SetWriteHandler(0x8000, 0XFFFF, CartBW);
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}
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static void M360Reset(void) {
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dipswitch = (dipswitch + 1) & 31;
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if (submapper ==0)
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reg = (reg + 1) & 31;
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else
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reg = 0;
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Sync();
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FCEU_printf("dipswitch = %d\n", dipswitch);
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}
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static void StateRestore(int version) {
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@@ -60,6 +75,7 @@ static void StateRestore(int version) {
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}
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void Mapper360_Init(CartInfo *info) {
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submapper = info->submapper;
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info->Reset = M360Reset;
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info->Power = M360Power;
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GameStateRestore = StateRestore;
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@@ -41,7 +41,7 @@ static DECLFW(M364Write) {
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static void M364Power(void) {
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EXPREGS[0] = 0;
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GenMMC3Power();
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SetWriteHandler(0x7000, 0x7FFF, M364Write);
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SetWriteHandler(0x6000, 0x7FFF, M364Write);
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}
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void Mapper364_Init(CartInfo *info) {
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@@ -31,55 +31,80 @@
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#include "mapinc.h"
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#include "mmc3.h"
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uint8 submapper;
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static void M411CW(uint32 A, uint8 V) {
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uint32 mask = (EXPREGS[1] & 2) ? 0xFF : 0x7F;
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V &= mask;
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setchr1(A, V | ((EXPREGS[1] << 5) & 0x80) | ((EXPREGS[0] << 4) & 0x100));
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int chrAND, chrOR;
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switch(submapper) {
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default:chrOR =EXPREGS[1] <<5 &0x080 | EXPREGS[0] <<4 &0x100 | EXPREGS[1] <<2 &0x200;
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chrAND =EXPREGS[1] &0x02? 0xFF: 0x7F;
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break;
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case 1: chrOR =EXPREGS[1] <<5 &0x080 | EXPREGS[1] <<2 &0x100;
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chrAND =EXPREGS[1] &0x02? 0xFF: 0x7F;
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break;
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case 2: chrOR =EXPREGS[1] <<5 &0x080 | EXPREGS[0] <<4 &0x100 | EXPREGS[1] <<2 &0x200;
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chrAND =EXPREGS[1] &0x02? 0xFF: 0x7F;
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break;
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}
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setchr1(A, V &chrAND | chrOR &~chrAND);
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}
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static void M411PW(uint32 A, uint8 V) {
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/* NROM Mode */
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if (EXPREGS[0] & 0x40)
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{
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uint32 bank = (EXPREGS[0] & 1) | ((EXPREGS[0] >> 2) & 2) | (EXPREGS[0] & 4) | (EXPREGS[1] & 8) | ((EXPREGS[1] >> 2) & 0x10);
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/* NROM-256 */
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if (EXPREGS[0] & 0x02) {
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int prgAND, prgOR;
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switch(submapper) {
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default:prgOR =EXPREGS[1] <<1 &0x10 | EXPREGS[1] >>1 &0x60;
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prgAND =EXPREGS[1] &0x02? 0x1F: 0x0F;
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break;
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case 1: prgOR =EXPREGS[1] <<1 &0x10 | EXPREGS[1] >>1 &0x60;
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prgAND =EXPREGS[1] &0x02? 0x1F: 0x0F;
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break;
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case 2: prgOR =EXPREGS[1] <<1 &0x10 | EXPREGS[1] >>1 &0x60;
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prgAND =EXPREGS[1] &0x01? 0x1F: 0x0F;
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break;
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}
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if (EXPREGS[0] & 0x40) { /* NROM Mode */
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uint32 bank = EXPREGS[0] &5 | EXPREGS[0] >>2 &2 | prgOR >>1;
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if (EXPREGS[0] & 0x02) /* NROM-256 */
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setprg32(0x8000, bank >> 1);
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/* NROM-128 */
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} else {
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else { /* NROM-128 */
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setprg16(0x8000, bank);
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setprg16(0xC000, bank);
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}
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}
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} else
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setprg8(A, V &prgAND | prgOR &~prgAND);
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}
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/* MMC3 Mode */
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else
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{
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uint32 mask = (EXPREGS[1] & 2) ? 0x1F : 0x0F;
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V &= mask;
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setprg8(A, V | ((EXPREGS[1] << 1) & 0x10) | ((EXPREGS[1] >> 1) & 0x20));
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}
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static DECLFR(M411Read5000) {
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return EXPREGS[2];
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}
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static DECLFW(M411Write5000) {
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EXPREGS[A & 1] = V;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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if (submapper ==2 || A &0x800) {
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EXPREGS[A & 1] = V;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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}
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}
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static void M411Reset(void) {
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EXPREGS[2]++;
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}
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static void M411Power(void) {
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EXPREGS[0] = 0x80;
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EXPREGS[1] = 0x82;
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EXPREGS[0] = 0x0;
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EXPREGS[1] = 0x3;
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EXPREGS[2] = 0x0; /* Serves as DIP value */
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GenMMC3Power();
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SetReadHandler(0x5000, 0x5FFF, M411Read5000);
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SetWriteHandler(0x5000, 0x5FFF, M411Write5000);
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}
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void Mapper411_Init(CartInfo *info) {
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submapper =info->submapper;
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GenMMC3_Init(info, 256, 256, 0, 0);
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pwrap = M411PW;
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cwrap = M411CW;
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info->Power = M411Power;
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AddExState(EXPREGS, 2, 0, "EXPR");
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info->Reset = M411Reset;
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AddExState(EXPREGS, 3, 0, "EXPR");
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}
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82
src/boards/412.c
Normal file
82
src/boards/412.c
Normal file
@@ -0,0 +1,82 @@
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/* FCEUmm - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2020
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*
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*/
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#include "mapinc.h"
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#include "mmc3.h"
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static void M412PW(uint32 A, uint8 V) {
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int prgAND =0x0F | (EXPREGS[1] &0x02? 0x00: 0x20) | (EXPREGS[1] &0x10? 0x00: 0x10);
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int prgOR =(EXPREGS[1] &0x40? 0x10: 0x00) | (EXPREGS[1] &0x04? 0x20: 0x00);
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if (EXPREGS[2] &0x02) { /* NROM mode */
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if (EXPREGS[2] &0x04) /* NROM-256 */
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setprg32(0x8000, EXPREGS[2] >>4);
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else {
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setprg16(0x8000, EXPREGS[2] >>3);
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setprg16(0xC000, EXPREGS[2] >>3);
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}
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} else
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setprg8(A, V &prgAND | prgOR &~prgAND);
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}
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static void M412CW(uint32 A, uint8 V) {
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int chrAND =EXPREGS[1] &0x20? 0x7F: 0xFF;
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int chrOR =(EXPREGS[1] &0x80? 0x80: 0x00) | (EXPREGS[1] &0x08? 0x100: 0x000);
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if (EXPREGS[2] &0x02) /* (C)NROM mode */
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setchr8(EXPREGS[0] >>2);
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else
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setchr1(A, (V & chrAND) | (chrOR & ~chrAND));
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}
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static DECLFR(M412Read) {
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return EXPREGS[4];
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}
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static DECLFW(M412Write) {
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if (~EXPREGS[1] &0x01) {
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EXPREGS[A & 3] = V;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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}
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CartBW(A, V);
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}
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static void M412Reset(void) {
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EXPREGS[0] =EXPREGS[1] =EXPREGS[2] =EXPREGS[3] =0;
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EXPREGS[4]++;
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MMC3RegReset();
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}
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static void M412Power(void) {
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EXPREGS[0] =EXPREGS[1] =EXPREGS[2] =EXPREGS[3] =EXPREGS[4] =0;
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GenMMC3Power();
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SetReadHandler(0x5000, 0x5FFF, M412Read);
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SetWriteHandler(0x6000, 0x7FFF, M412Write);
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}
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void Mapper412_Init(CartInfo *info) {
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GenMMC3_Init(info, 512, 256, 0, 0);
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cwrap = M412CW;
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pwrap = M412PW;
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info->Power = M412Power;
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info->Reset = M412Reset;
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AddExState(EXPREGS, 5, 0, "EXPR");
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}
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@@ -25,6 +25,7 @@ static uint8 creg[8];
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static uint8 nt[4];
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static uint8 IRQa;
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static uint16 IRQCount;
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static uint8 submapper;
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static SFORMAT StateRegs[] = {
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{ preg, 4, "PREG" },
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@@ -48,11 +49,18 @@ static void Sync(void) {
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static DECLFW(M417Write) {
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switch ((A >> 4) & 7) {
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case 0: preg[A & 3] = V; Sync(); break;
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case 1: creg[0 | (A & 3)] = V; Sync(); break;
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case 1: creg[0 | (A & 3)] = V;
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if (submapper ==1) nt[A & 3] =V >>7;
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Sync();
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break;
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case 2: creg[4 | (A & 3)] = V; Sync(); break;break;
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case 3: IRQCount = 0; IRQa = 1; break;
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case 4: IRQa = 0; X6502_IRQEnd(FCEU_IQEXT); break;
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case 5: nt[A & 3] = V; Sync(); break;
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case 5: if (submapper ==0) {
|
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nt[A & 3] = V;
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Sync();
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}
|
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break;
|
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}
|
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}
|
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|
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@@ -64,7 +72,7 @@ static void M417Power(void) {
|
||||
|
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static void M417IRQHook(int a) {
|
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IRQCount += a;
|
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if (IRQa && IRQCount > 1024)
|
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if (IRQa && IRQCount > (submapper ==1? 4096: 1024))
|
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X6502_IRQBegin(FCEU_IQEXT);
|
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}
|
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|
||||
@@ -73,8 +81,9 @@ static void StateRestore(int version) {
|
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}
|
||||
|
||||
void Mapper417_Init(CartInfo *info) {
|
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submapper =info->submapper;
|
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info->Power = M417Power;
|
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MapIRQHook = M417IRQHook;
|
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MapIRQHook = M417IRQHook;
|
||||
GameStateRestore = StateRestore;
|
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AddExState(&StateRegs, ~0, 0, 0);
|
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}
|
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|
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@@ -23,6 +23,8 @@
|
||||
#include "mapinc.h"
|
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#include "mmc3.h"
|
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|
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uint8 submapper;
|
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|
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static void M432CW(uint32 A, uint8 V) {
|
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int chrAND = (EXPREGS[1] & 0x04) ? 0x7F : 0xFF;
|
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int chrOR = (EXPREGS[1] << 7) & 0x080 | (EXPREGS[1] << 5) & 0x100 | (EXPREGS[1] << 4) & 0x200;
|
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@@ -32,19 +34,17 @@ static void M432CW(uint32 A, uint8 V) {
|
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static void M432PW(uint32 A, uint8 V) {
|
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int prgAND = (EXPREGS[1] & 0x02) ? 0x0F : 0x1F;
|
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int prgOR = ((EXPREGS[1] << 4) & 0x10) | (EXPREGS[1] << 1) & 0x60;
|
||||
if ((A < 0xC000) || (~EXPREGS[1] & 0x40)) setprg8(A, (V & prgAND) | (prgOR & ~prgAND) & (EXPREGS[1] & 0x80?~2:~0));
|
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if ((A < 0xC000) && (EXPREGS[1] & 0x40)) setprg8(A | 0x4000, (V & prgAND) | (prgOR & ~prgAND) | (EXPREGS[1] & 0x80? 2: 0));
|
||||
if ((A < 0xC000) || (~EXPREGS[1] & 0x40)) setprg8(A, (V & prgAND) | (prgOR & ~prgAND) & (EXPREGS[1] &(submapper ==2? 0x20: 0x80)?~2:~0));
|
||||
if ((A < 0xC000) && (EXPREGS[1] & 0x40)) setprg8(A | 0x4000, (V & prgAND) | (prgOR & ~prgAND) | (EXPREGS[1] &(submapper ==2? 0x20: 0x80)? 2: 0));
|
||||
}
|
||||
|
||||
static DECLFR(M432Read) {
|
||||
if (EXPREGS[0] & 1 || EXPREGS[1] & 0x20 && ROM_size <64)
|
||||
return EXPREGS[2];
|
||||
if (submapper ==1? !!(EXPREGS[1] &0x20): !!(EXPREGS[0] &0x01)) return EXPREGS[2];
|
||||
return CartBR(A);
|
||||
}
|
||||
|
||||
static DECLFW(M432Write) {
|
||||
EXPREGS[A & 1] = V;
|
||||
if (~A &1 && ~V &1 && ROM_size <64) EXPREGS[1] &=~0x20; /* Writing 0 to register 0 clears register 1's DIP bit */
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
@@ -66,6 +66,7 @@ static void M432Power(void) {
|
||||
}
|
||||
|
||||
void Mapper432_Init(CartInfo *info) {
|
||||
submapper =info->submapper;
|
||||
GenMMC3_Init(info, 256, 256, 0, 0);
|
||||
cwrap = M432CW;
|
||||
pwrap = M432PW;
|
||||
|
||||
@@ -181,7 +181,7 @@ static void M61Sync(void) {
|
||||
setprg16(0xC000, ((latche & 0xF) << 1) | (((latche & 0x20) >> 4)));
|
||||
} else
|
||||
setprg32(0x8000, latche & 0xF);
|
||||
setchr8(0);
|
||||
setchr8(latche >> 8);
|
||||
setmirror(((latche >> 7) & 1) ^ 1);
|
||||
}
|
||||
|
||||
@@ -263,28 +263,19 @@ static void M200Sync(void) {
|
||||
|
||||
void Mapper200_Init(CartInfo *info) {
|
||||
submapper = info->submapper;
|
||||
Latch_Init(info, M200Sync, NULL, 0xFFFF, 0x8000, 0xFFFF, 0);
|
||||
Latch_Init(info, M200Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
/*------------------ Map 201 ---------------------------*/
|
||||
/* 2020-3-6 - Support for 21-in-1 (CF-043) (2006-V) (Unl) [p1].nes which has mixed mirroring
|
||||
* found at the time labeled as submapper 15
|
||||
* 0x05658DED 128K PRG, 32K CHR */
|
||||
NRS: No, all it needs is fixed horizontal mirroring. */
|
||||
static void M201Sync(void) {
|
||||
if (latche & 8 || submapper == 15) {
|
||||
setprg32(0x8000, latche & 3);
|
||||
setchr8(latche & 3);
|
||||
} else {
|
||||
setprg32(0x8000, 0);
|
||||
setchr8(0);
|
||||
}
|
||||
if (submapper == 15)
|
||||
setmirror(((latche & 0x07) == 0x07) ? MI_V : MI_H);
|
||||
setprg32(0x8000, latche);
|
||||
setchr8(latche);
|
||||
}
|
||||
|
||||
void Mapper201_Init(CartInfo *info) {
|
||||
submapper = info->submapper;
|
||||
Latch_Init(info, M201Sync, NULL, 0xFFFF, 0x8000, 0xFFFF, 0);
|
||||
Latch_Init(info, M201Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
/*------------------ Map 202 ---------------------------*/
|
||||
@@ -404,8 +395,7 @@ static void M227Sync(void) {
|
||||
}
|
||||
}
|
||||
|
||||
if (!hasBattery && (latche & 0x80) == 0x80)
|
||||
/* CHR-RAM write protect hack, needed for some multicarts */
|
||||
if (latche &0x80 && submapper >0) /* CHR-RAM write protection not used on single-game cartridges (submapper 0) */
|
||||
SetupCartCHRMapping(0, CHRptr[0], 0x2000, 0);
|
||||
else
|
||||
SetupCartCHRMapping(0, CHRptr[0], 0x2000, 1);
|
||||
@@ -416,7 +406,7 @@ static void M227Sync(void) {
|
||||
}
|
||||
|
||||
static DECLFR(M227Read) {
|
||||
if (latche &0x0400)
|
||||
if (latche &0x0400 && submapper ==1) /* Support DIP switch/solder pad only with submapper 1 multicarts */
|
||||
return CartBR(A | dipswitch);
|
||||
else
|
||||
return CartBR(A);
|
||||
@@ -430,6 +420,7 @@ static void Mapper227_Reset(void) {
|
||||
}
|
||||
|
||||
void Mapper227_Init(CartInfo *info) {
|
||||
dipswitch = 0;
|
||||
submapper =info->submapper;
|
||||
Latch_Init(info, M227Sync, M227Read, 0x0000, 0x8000, 0xFFFF, info->iNES2 && (info->PRGRamSize || info->PRGRamSaveSize) || info->battery);
|
||||
info->Reset = Mapper227_Reset;
|
||||
@@ -528,7 +519,7 @@ static void M242Sync(void) {
|
||||
}
|
||||
|
||||
static DECLFR(M242Read) {
|
||||
if (latche &0x0100)
|
||||
if (latche &0x0100 && (latche &0x00FF) ==0)
|
||||
return CartBR(A | dipswitch);
|
||||
else
|
||||
return CartBR(A);
|
||||
@@ -542,6 +533,7 @@ static void Mapper242_Reset(void) {
|
||||
}
|
||||
|
||||
void Mapper242_Init(CartInfo *info) {
|
||||
dipswitch = 0;
|
||||
M242TwoChips = info->PRGRomSize &0x20000 && info->PRGRomSize >0x20000;
|
||||
Latch_Init(info, M242Sync, M242Read, 0x0000, 0x8000, 0xFFFF, info->iNES2 && (info->PRGRamSize || info->PRGRamSaveSize) || info->battery);
|
||||
info->Reset = Mapper242_Reset;
|
||||
@@ -554,8 +546,8 @@ void Mapper242_Init(CartInfo *info) {
|
||||
* - 64-in-1 (CF-015)
|
||||
*/
|
||||
static void M288Sync(void) {
|
||||
setchr8(latche & 7);
|
||||
setprg32(0x8000, (latche >> 3) & 3);
|
||||
setchr8(latche);
|
||||
setprg32(0x8000, latche >> 3);
|
||||
}
|
||||
|
||||
static DECLFR(M288Read) {
|
||||
|
||||
@@ -563,7 +563,13 @@ static void M47CW(uint32 A, uint8 V) {
|
||||
}
|
||||
|
||||
static DECLFW(M47Write) {
|
||||
EXPREGS[0] = V & 1;
|
||||
EXPREGS[0] = V;
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
|
||||
static void M47Reset(void) {
|
||||
EXPREGS[0] = 0;
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
@@ -579,6 +585,7 @@ void Mapper47_Init(CartInfo *info) {
|
||||
GenMMC3_Init(info, 512, 256, 8, 0);
|
||||
pwrap = M47PW;
|
||||
cwrap = M47CW;
|
||||
info->Reset = M47Reset;
|
||||
info->Power = M47Power;
|
||||
AddExState(EXPREGS, 1, 0, "EXPR");
|
||||
}
|
||||
@@ -667,7 +674,7 @@ static void M52CW(uint32 A, uint8 V) {
|
||||
static void M52S14CW(uint32 A, uint8 V) {
|
||||
uint32 mask = 0xFF ^ ((EXPREGS[0] & 0x40) << 1);
|
||||
uint32 bank = EXPREGS[0] <<3 &0x80 | EXPREGS[0] <<7 &0x300;
|
||||
if (EXPREGS[0] &0x20)
|
||||
if (CHRRAM && EXPREGS[0] &0x20)
|
||||
setchr1r(0x10, A, bank | (V & mask));
|
||||
else
|
||||
setchr1(A, bank | (V & mask));
|
||||
@@ -703,7 +710,7 @@ void Mapper52_Init(CartInfo *info) {
|
||||
info->Reset = M52Reset;
|
||||
info->Power = M52Power;
|
||||
AddExState(EXPREGS, 2, 0, "EXPR");
|
||||
if (info->iNES2 && (info->submapper ==13 || info->submapper ==14)) {
|
||||
if (info->iNES2 && info->CHRRomSize && info->CHRRamSize) {
|
||||
CHRRAMSIZE = 8192;
|
||||
CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
|
||||
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
|
||||
@@ -828,45 +835,48 @@ void Mapper114_Init(CartInfo *info) {
|
||||
/* ---------------------------- Mapper 115 KN-658 board ------------------------------ */
|
||||
|
||||
static void M115PW(uint32 A, uint8 V) {
|
||||
int prgOR =EXPREGS[0] &0xF | EXPREGS[0] >>2 &0x10;
|
||||
if (EXPREGS[0] & 0x80) {
|
||||
if (EXPREGS[0] & 0x20)
|
||||
setprg32(0x8000, (EXPREGS[0] & 0x0F) >> 1); /* real hardware tests, info 100% now lol */
|
||||
setprg32(0x8000, prgOR >> 1);
|
||||
else {
|
||||
setprg16(0x8000, (EXPREGS[0] & 0x0F));
|
||||
setprg16(0xC000, (EXPREGS[0] & 0x0F));
|
||||
setprg16(0x8000, prgOR);
|
||||
setprg16(0xC000, prgOR);
|
||||
}
|
||||
} else
|
||||
setprg8(A, V);
|
||||
setprg8(A, V &0x1F | prgOR <<1 &~0x1F);
|
||||
}
|
||||
|
||||
static void M115CW(uint32 A, uint8 V) {
|
||||
setchr1(A, (uint32)V | ((EXPREGS[1] & 1) << 8));
|
||||
}
|
||||
|
||||
static DECLFW(M115Write) {
|
||||
if (A == 0x5080)
|
||||
EXPREGS[2] = V; /* Extra prot hardware 2-in-1 mode */
|
||||
else if (A == 0x6000)
|
||||
EXPREGS[0] = V;
|
||||
else if (A == 0x6001)
|
||||
EXPREGS[1] = V;
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
setchr1(A, V | EXPREGS[1] <<8);
|
||||
}
|
||||
|
||||
static DECLFR(M115Read) {
|
||||
return EXPREGS[2];
|
||||
return (A &3) ==2? EXPREGS[2]: X.DB;
|
||||
}
|
||||
|
||||
static DECLFW(M115Write) {
|
||||
EXPREGS[A &3] =V;
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
|
||||
static void M115Reset(void) {
|
||||
EXPREGS[2]++;
|
||||
}
|
||||
|
||||
static void M115Power(void) {
|
||||
EXPREGS[2] =0;
|
||||
GenMMC3Power();
|
||||
SetWriteHandler(0x4100, 0x7FFF, M115Write);
|
||||
SetReadHandler(0x5000, 0x5FFF, M115Read);
|
||||
SetWriteHandler(0x6000, 0x7FFF, M115Write);
|
||||
SetReadHandler(0x6000, 0x7FFF, M115Read);
|
||||
}
|
||||
|
||||
void Mapper115_Init(CartInfo *info) {
|
||||
GenMMC3_Init(info, 128, 512, 0, 0);
|
||||
cwrap = M115CW;
|
||||
pwrap = M115PW;
|
||||
info->Reset = M115Reset;
|
||||
info->Power = M115Power;
|
||||
AddExState(EXPREGS, 3, 0, "EXPR");
|
||||
}
|
||||
|
||||
@@ -23,71 +23,59 @@
|
||||
|
||||
#include "mapinc.h"
|
||||
|
||||
static uint16 cmd, bank;
|
||||
static uint16 reg[2];
|
||||
static uint8 submapper;
|
||||
|
||||
static SFORMAT StateRegs[] =
|
||||
{
|
||||
{ &cmd, 2 | FCEUSTATE_RLSB, "CMD" },
|
||||
{ &bank, 2 | FCEUSTATE_RLSB, "BANK" },
|
||||
static SFORMAT StateRegs[] ={
|
||||
{ reg, 4 | FCEUSTATE_RLSB, "REGS" },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
static void Sync(void) {
|
||||
setmirror((cmd & 1) ^ 1);
|
||||
static DECLFR(Mapper221_ReadOB)
|
||||
{
|
||||
return X.DB;
|
||||
}
|
||||
|
||||
static void sync(void) {
|
||||
uint8 prg =reg[0] >>(submapper ==1? 2: 3) &0x40 | reg[0] >>2 &0x38 | reg[1] &0x07;
|
||||
SetReadHandler(0x8000, 0xFFFF, prg <<14 >=PRGsize[0]? Mapper221_ReadOB: CartBR); /* Selecting unpopulated banks results in open bus */
|
||||
if (reg[0] &(submapper ==1? 0x200: 0x100)) { /* UNROM */
|
||||
setprg16(0x8000, prg);
|
||||
setprg16(0xC000, prg |7);
|
||||
} else
|
||||
if (reg[0] &0x0002) /* NROM-256 */
|
||||
setprg32(0x8000, prg >>1);
|
||||
else { /* NROM-128 */
|
||||
setprg16(0x8000, prg);
|
||||
setprg16(0xC000, prg);
|
||||
}
|
||||
setchr8(0);
|
||||
if (cmd & 2) {
|
||||
if (cmd & 0x100) {
|
||||
setprg16(0x8000, ((cmd & 0x200) >> 3) | ((cmd & 0xfc) >> 2) | bank);
|
||||
setprg16(0xC000, ((cmd & 0x200) >> 3) | ((cmd & 0xfc) >> 2) | 7);
|
||||
} else {
|
||||
setprg16(0x8000, ((cmd & 0x200) >> 3) | ((cmd & 0xfc) >> 2) | (bank & 6));
|
||||
setprg16(0xC000, ((cmd & 0x200) >> 3) | ((cmd & 0xfc) >> 2) | ((bank & 6) | 1));
|
||||
}
|
||||
} else {
|
||||
setprg16(0x8000, ((cmd & 0x200) >> 3) | ((cmd & 0xfc) >> 2) | bank);
|
||||
setprg16(0xC000, ((cmd & 0x200) >> 3) | ((cmd & 0xfc) >> 2) | bank);
|
||||
}
|
||||
SetupCartCHRMapping(0, CHRptr[0], 0x2000, submapper ==1? !(reg[0] &0x0400): !(reg[1] &0x0008));
|
||||
setmirror(reg[0] &0x0001? MI_H: MI_V);
|
||||
}
|
||||
|
||||
static uint16 ass = 0;
|
||||
|
||||
static DECLFW(UNLN625092WriteCommand) {
|
||||
cmd = A;
|
||||
if (A == 0x80F8) {
|
||||
setprg16(0x8000, ass);
|
||||
setprg16(0xC000, ass);
|
||||
} else {
|
||||
Sync();
|
||||
}
|
||||
}
|
||||
|
||||
static DECLFW(UNLN625092WriteBank) {
|
||||
bank = A & 7;
|
||||
Sync();
|
||||
static DECLFW(Mapper221Write) {
|
||||
reg[A >>14 &1] =A;
|
||||
sync();
|
||||
}
|
||||
|
||||
static void UNLN625092Power(void) {
|
||||
cmd = 0;
|
||||
bank = 0;
|
||||
Sync();
|
||||
SetReadHandler(0x8000, 0xFFFF, CartBR);
|
||||
SetWriteHandler(0x8000, 0xBFFF, UNLN625092WriteCommand);
|
||||
SetWriteHandler(0xC000, 0xFFFF, UNLN625092WriteBank);
|
||||
reg[0] =reg[1] =0;
|
||||
sync();
|
||||
SetWriteHandler(0x8000, 0xFFFF, Mapper221Write);
|
||||
}
|
||||
|
||||
static void UNLN625092Reset(void) {
|
||||
cmd = 0;
|
||||
bank = 0;
|
||||
ass++;
|
||||
FCEU_printf("%04x\n", ass);
|
||||
Sync();
|
||||
reg[0] =reg[1] =0;
|
||||
sync();
|
||||
}
|
||||
|
||||
static void StateRestore(int version) {
|
||||
Sync();
|
||||
sync();
|
||||
}
|
||||
|
||||
void UNLN625092_Init(CartInfo *info) {
|
||||
submapper =info->submapper;
|
||||
info->Reset = UNLN625092Reset;
|
||||
info->Power = UNLN625092Power;
|
||||
GameStateRestore = StateRestore;
|
||||
|
||||
@@ -801,6 +801,7 @@ INES_BOARD_BEGIN()
|
||||
INES_BOARD( "retroUSB DPCMcart", 409, Mapper409_Init )
|
||||
INES_BOARD( "JY-302", 410, Mapper410_Init )
|
||||
INES_BOARD( "A88S-1", 411, Mapper411_Init )
|
||||
INES_BOARD( "Henggedianzi FK-206 JG", 412, Mapper412_Init )
|
||||
INES_BOARD( "9999999-in-1", 414, Mapper414_Init )
|
||||
INES_BOARD( "0353", 415, Mapper415_Init )
|
||||
INES_BOARD( "4-in-1/N-32", 416, Mapper416_Init )
|
||||
|
||||
@@ -310,6 +310,7 @@ void Mapper404_Init(CartInfo *);
|
||||
void Mapper409_Init(CartInfo *);
|
||||
void Mapper410_Init(CartInfo *);
|
||||
void Mapper411_Init(CartInfo *);
|
||||
void Mapper412_Init(CartInfo *);
|
||||
void Mapper414_Init(CartInfo *);
|
||||
void Mapper415_Init(CartInfo *);
|
||||
void Mapper416_Init(CartInfo *);
|
||||
|
||||
Reference in New Issue
Block a user