Backport r161 - UNIF OneBus - PCM DMA timing and address fix
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@@ -42,7 +42,7 @@ static uint8 inv_hack = 0; // some OneBus Systems have swapped PRG reg commans
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// APU Registers
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static uint8 pcm_enable = 0, pcm_irq = 0;
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static int16 pcm_addr, pcm_size, pcm_latch, pcm_clock = 0xF6;
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static int16 pcm_addr, pcm_size, pcm_latch, pcm_clock = 0xE1;
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static writefunc defapuwrite[64];
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static readfunc defapuread[64];
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@@ -197,10 +197,12 @@ static DECLFW(UNLOneBusWriteAPU40XX) {
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if (apu40xx[0x30] & 0x10) {
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pcm_addr = V << 6;
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}
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break;
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case 0x13:
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if (apu40xx[0x30] & 0x10) {
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pcm_size = (V << 4) + 1;
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}
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break;
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case 0x15:
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if (apu40xx[0x30] & 0x10) {
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pcm_enable = V & 0x10;
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@@ -212,6 +214,7 @@ static DECLFW(UNLOneBusWriteAPU40XX) {
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pcm_latch = pcm_clock;
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V &= 0xef;
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}
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break;
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}
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defapuwrite[A & 0x3f](A, V);
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}
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@@ -224,6 +227,7 @@ static DECLFR(UNLOneBusReadAPU40XX) {
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if (apu40xx[0x30] & 0x10) {
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result = (result & 0x7f) | pcm_irq;
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}
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break;
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}
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return result;
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}
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@@ -239,7 +243,8 @@ static void UNLOneBusCpuHook(int a) {
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pcm_enable = 0;
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X6502_IRQBegin(FCEU_IQEXT);
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} else {
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uint8 raw_pcm = ARead[pcm_addr](pcm_addr) >> 1;
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uint16 addr = pcm_addr | ((apu40xx[0x30]^3) << 14);
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uint8 raw_pcm = ARead[addr](addr) >> 1;
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defapuwrite[0x11](0x4011, raw_pcm);
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pcm_addr++;
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pcm_addr &= 0x7FFF;
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