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core: stdint typedefs, LE optimizations, frame determinism

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Three follow-up audit passes on top of the memory-safety / leak /
savestate-portability work in 1185db8.

==============================================================
Pass 1: replace custom typedefs with C99 stdint types throughout
==============================================================

The custom uint8 / uint16 / uint32 / uint64 / int8 / int16 / int32 /
int64 typedefs in src/fceu-types.h were just simple aliases for the
C99 stdint.h types. Replace them with the standard names directly.

  - 498 files modified
  - ~3,400 token replacements (uint8 -> uint8_t, etc)
  - fceu-types.h slimmed down to just INLINE / GINLINE / FASTAPASS
    macros and the readfunc / writefunc function-pointer typedefs
    (those now use uint8_t / uint32_t natively)
  - Build clean on `make platform=unix` with zero new warnings
  - Output binary size unchanged - confirming semantic equivalence

Mechanical replacement done with a Python script that uses word-
boundary regex to avoid false positives (e.g. 'uint32_t' was
correctly left alone because '_' is a word character so 'uint32'
is not a complete word inside it).

================================================================
Pass 2: prefer memcpy on LE hosts for endian read/write helpers
================================================================

fceu-endian.c's write32le_mem, FCEU_en32lsb, and FCEU_de32lsb
performed bytewise composition/decomposition unconditionally. On
LE hosts the in-memory representation already matches the desired
LE on-disk format, so a single memcpy is equivalent and lets the
compiler emit a single load/store rather than four byte ops.

  - The bytewise path is kept inside #ifdef MSB_FIRST for BE hosts
    where it implements the actual byte swap
  - Both forms produce identical results; this is a code-clarity
    change more than a performance one (the optimizer was already
    merging the shifts on LE), but it documents the intent and
    removes a strict-aliasing-flavoured cast through
    *(uint32_t*)Bufo
  - Added missing #include <string.h> in fceu-endian.c which was
    relying on transitive includes for memcpy

Other MSB_FIRST sites in the codebase (state.c FlipByteOrder
guards, ppu.c sprite-line rendering, boards/unrom512.c flash-write-
counter access) were already optimized for LE; they were verified
correct rather than changed.

================================================================
Pass 3: frame determinism for replay and netplay
================================================================

Two libc rand() sites in core were replaced with a local xorshift32
PRNG so that NES games which read uninitialised memory or hit
hardware "weak bit" emulation produce reproducible behaviour across
runs. NES titles routinely read uninitialised RAM (variables not
zeroed before use, sprite Y-position set by junk-on-stack), so the
RAM contents at power-on subtly affect game behaviour. With libc
rand(), those contents depend on whether anyone else seeded rand()
in the same process - a different libretro frontend, a different
audio backend init order, or any frontend that does srand(time(0))
all break replay / netplay frame-determinism.

1. fceu.c FCEU_MemoryRand. Used to fill RAM (PowerNES) and CHR-RAM
   (iNES_Init) at power-on when option_ramstate=2 (random init).
   Replaced with a local xorshift32 PRNG, exposed via a new
   FCEU_MemoryRand_Reseed(uint32_t) function called once per
   power-on:
   - PowerNES seeds from the first 4 bytes of GameInfo->MD5 (set
     by all loaders before PowerNES runs) so identical ROMs
     produce identical RAM, different ROMs differ
   - iNES_Init seeds from iNESCart.PRGCRC32 before the CHR-RAM
     fill so two builds of the same ROM get the same CHR-RAM
   - The PRNG state advances across multiple FCEU_MemoryRand
     calls within one power-on so RAM and CHR-RAM get different
     content (matching NES hardware reality)

2. boards/rt-01.c UNLRT01Read. The RT-01 board has 'weak bit'
   protected EPROM regions; reads of 0xCE80-0xCEFF and 0xFE80-
   0xFEFF return 0xF2 with the low 3 bits randomised. Replaced
   libc rand() with a local xorshift32 seeded at power-on, and
   added the PRNG state to the savestate via AddExState with key
   "WBKS" so save / load / rewind / netplay rollback all stay
   deterministic.

In addition, two long-double-to-int truncations were changed to
double for cross-platform FP determinism:

  - sound.c SetSoundVariables: soundtsinc
  - boards/n106.c DoNamcoSound: inc

long double has platform-dependent precision (80-bit on x87,
64-bit with -mfpmath=sse, 128-bit on PowerPC), so the truncated
integer result varied across these platforms. double is
guaranteed 64-bit IEEE-754 portably.

After this pass, the core has no time(), clock(), gettimeofday(),
clock_gettime(), getpid(), getuid(), getgid(), getenv(), gethostid(),
pthread, std::thread, OpenMP, signal handler, or non-deterministic-
malloc dependency. Verified with a Python scanner that greps the
source for these patterns; runs clean.

The PPU / APU / CPU power-on already explicitly memset all state
buffers to 0 (deterministic), and ROM/CHR-ROM allocation already
memsets to 0xFF before partial fread (deterministic regardless of
file truncation).

Combined with the memory-safety hardening in 1185db8 (which
prevents savestate-loaded indices from going out-of-bounds and
producing unpredictable behaviour), the core now offers genuine
frame-deterministic replay across runs, builds, and host endian.
This commit is contained in:
U-DESKTOP-SPFP6AQ\twistedtechre
2026-05-04 02:46:34 +02:00
parent 1185db89c1
commit 766f84662b
499 changed files with 3507 additions and 3416 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
.gitignore vendored
View File

@@ -2,3 +2,4 @@
*.a
*.so
.vscode
build.log

4
src/boards/09-034a.c
View File

@@ -32,8 +32,8 @@
#include "mapinc.h"
static uint8 prg;
static uint32 IRQCount, IRQa;
static uint8_t prg;
static uint32_t IRQCount, IRQa;
static SFORMAT StateRegs[] =
{

8
src/boards/103.c
View File

@@ -24,9 +24,9 @@
#include "mapinc.h"
#include "../fds_apu.h"
static uint8 reg0, reg1, reg2;
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t reg0, reg1, reg2;
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -109,7 +109,7 @@ void Mapper103_Init(CartInfo *info) {
GameStateRestore = StateRestore;
WRAMSIZE = 16384;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");

8
src/boards/104.c
View File

@@ -22,9 +22,9 @@
#include "mapinc.h"
static uint8 preg[2];
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t preg[2];
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -80,7 +80,7 @@ void Mapper104_Init(CartInfo *info) {
AddExState(&StateRegs, ~0, 0, 0);
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if (info->battery) {

10
src/boards/106.c
View File

@@ -20,10 +20,10 @@
#include "mapinc.h"
static uint8 reg[16], IRQa;
static uint32 IRQCount;
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t reg[16], IRQa;
static uint32_t IRQCount;
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -100,7 +100,7 @@ void Mapper106_Init(CartInfo *info) {
GameStateRestore = StateRestore;
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");

2
src/boards/108.c
View File

@@ -26,7 +26,7 @@
#include "mapinc.h"
static uint8 reg;
static uint8_t reg;
static SFORMAT StateRegs[] =
{

8
src/boards/112.c
View File

@@ -23,9 +23,9 @@
#include "mapinc.h"
static uint8 reg[8];
static uint8 mirror, cmd, bank;
static uint8 *WRAM = NULL;
static uint8_t reg[8];
static uint8_t mirror, cmd, bank;
static uint8_t *WRAM = NULL;
static SFORMAT StateRegs[] =
{
@@ -84,7 +84,7 @@ void Mapper112_Init(CartInfo *info) {
info->Power = M112Power;
info->Close = M112Close;
GameStateRestore = StateRestore;
WRAM = (uint8*)FCEU_gmalloc(8192);
WRAM = (uint8_t*)FCEU_gmalloc(8192);
SetupCartPRGMapping(0x10, WRAM, 8192, 1);
AddExState(WRAM, 8192, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0);

14
src/boards/116.c
View File

@@ -23,10 +23,10 @@
#include "asic_mmc3.h"
#include "asic_vrc2and4.h"
static uint8 submapper;
static uint8 reg;
static uint8 init; /* Games switch between ASICs expecting registers to keep their value, so initialize each ASIC only on the first switch and use this bitfield to track it */
static uint8 game;
static uint8_t submapper;
static uint8_t reg;
static uint8_t init; /* Games switch between ASICs expecting registers to keep their value, so initialize each ASIC only on the first switch and use this bitfield to track it */
static uint8_t game;
static SFORMAT stateRegs[] = {
{ &reg, 1, "MODE" },
@@ -72,11 +72,11 @@ static void sync (void) {
}
}
int Huang2_getPRGBank (uint8 bank) {
int Huang2_getPRGBank (uint8_t bank) {
return MMC1_getPRGBank(bank) >>1;
}
static void applyMode (uint8 clear) {
static void applyMode (uint8_t clear) {
PPU_hook = NULL;
MapIRQHook = NULL;
GameHBIRQHook = NULL;
@@ -102,7 +102,7 @@ static void applyMode (uint8 clear) {
static DECLFW (writeReg) {
if (A &0x100) {
uint8 previousReg = reg;
uint8_t previousReg = reg;
reg = V;
if ((previousReg ^V) &3)
applyMode(1);

4
src/boards/117.c
View File

@@ -20,8 +20,8 @@
#include "mapinc.h"
static uint8 prgreg[4], chrreg[8], mirror;
static uint8 IRQa, IRQCount, IRQLatch;
static uint8_t prgreg[4], chrreg[8], mirror;
static uint8_t IRQa, IRQCount, IRQLatch;
static SFORMAT StateRegs[] =
{

2
src/boards/120.c
View File

@@ -23,7 +23,7 @@
#include "mapinc.h"
static uint8 reg;
static uint8_t reg;
static SFORMAT StateRegs[] =
{

6
src/boards/121.c
View File

@@ -44,7 +44,7 @@ static void Sync() {
}
}
static void M121CW(uint32 A, uint8 V) {
static void M121CW(uint32_t A, uint8_t V) {
if (PRGsize[0] == CHRsize[0]) { /* A9713 multigame extension hack! */
setchr1(A, V | ((EXPREGS[3] & 0x80) << 1));
} else {
@@ -55,7 +55,7 @@ static void M121CW(uint32 A, uint8 V) {
}
}
static void M121PW(uint32 A, uint8 V) {
static void M121PW(uint32_t A, uint8_t V) {
setprg8(A, (V & 0x1F) | ((EXPREGS[3] & 0x80) >> 2));
if (EXPREGS[5] & 0x3F) {
setprg8(0xE000, (EXPREGS[0]) | ((EXPREGS[3] & 0x80) >> 2));
@@ -91,7 +91,7 @@ static DECLFW(M121Write) {
}
}
static uint8 prot_array[16] = { 0x83, 0x83, 0x42, 0x00 };
static uint8_t prot_array[16] = { 0x83, 0x83, 0x42, 0x00 };
static DECLFW(M121LoWrite) {
EXPREGS[4] = prot_array[V & 3]; /* 0x100 bit in address seems to be switch arrays 0, 2, 2, 3 (Contra Fighter) */
if ((A & 0x5180) == 0x5180) { /* A9713 multigame extension */

2
src/boards/122.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 reg[2];
static uint8_t reg[2];
static void sync () {
setprg32(0x8000, 0);

16
src/boards/126_422_534.c
View File

@@ -38,17 +38,17 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 reverseCHR_A18_A19;
static uint8 invertC000;
static uint8 SL0;
static uint8 submapper;
static uint8_t reverseCHR_A18_A19;
static uint8_t invertC000;
static uint8_t SL0;
static uint8_t submapper;
static uint8 getMMC3Bank(int bank) {
static uint8_t getMMC3Bank(int bank) {
if (~bank &1 && MMC3_cmd &0x40) bank ^=2;
return bank &2? 0xFE | bank &1: DRegBuf[6 | bank &1];
}
static void wrapPRG(uint32 A, uint8 V) {
static void wrapPRG(uint32_t A, uint8_t V) {
int prgAND = EXPREGS[0] &0x40? 0x0F: 0x1F; /* 128 KiB or 256 KiB inner PRG bank selection */
int prgOR =(EXPREGS[0] <<4 &0x70 | (EXPREGS[0] ^0x20) <<3 &0x180) &~prgAND; /* Outer PRG bank */
if (submapper ==1) prgOR =prgOR &0x7F | prgOR >>1 &0x80; /* Submapper 1 uses PRG A21 as a chip select between two 1 MiB chips */
@@ -78,7 +78,7 @@ static void wrapPRG(uint32 A, uint8 V) {
mwrap(A000B); /* After 8000 write */
}
static void wrapCHR(uint32 A, uint8 V) {
static void wrapCHR(uint32_t A, uint8_t V) {
int chrAND = EXPREGS[0] &0x80? 0x7F: 0xFF; /* 128 KiB or 256 KiB innter CHR bank selection */
int chrOR; /* outer CHR bank */
if (reverseCHR_A18_A19) /* Mapper 126 swaps CHR A18 and A19 */
@@ -99,7 +99,7 @@ static void wrapCHR(uint32 A, uint8 V) {
setchr1(A, (V & chrAND) | chrOR);
}
static void wrapMirroring(uint8 V) {
static void wrapMirroring(uint8_t V) {
A000B =V;
if (EXPREGS[3] &0x20) { /* ANROM mirroring */
if (DRegBuf[6] &0x10)

2
src/boards/128.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
#include "latch.h"
static uint16 outerbank = 0;
static uint16_t outerbank = 0;
static void Sync(void) {
setprg16(0x8000, (outerbank >> 2) | (latch.data & 7));

4
src/boards/12in1.c
View File

@@ -24,7 +24,7 @@
#include "mapinc.h"
static uint8 prgchr[2], ctrl;
static uint8_t prgchr[2], ctrl;
static SFORMAT StateRegs[] =
{
{ prgchr, 2, "REGS" },
@@ -33,7 +33,7 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
uint8 bank = (ctrl & 3) << 3;
uint8_t bank = (ctrl & 3) << 3;
setchr4(0x0000, (prgchr[0] >> 3) | (bank << 2));
setchr4(0x1000, (prgchr[1] >> 3) | (bank << 2));
if (ctrl & 8) {

6
src/boards/134.c
View File

@@ -25,9 +25,9 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 dip;
static uint8_t dip;
static void Mapper134_PRGWrap(uint32 A, uint8 V) {
static void Mapper134_PRGWrap(uint32_t A, uint8_t V) {
int prgAND =EXPREGS[1] &0x04? 0x0F: 0x1F;
int prgOR =EXPREGS[1] <<4 &0x30 | EXPREGS[0] <<2 &0x40;
if (EXPREGS[1] &0x80) { /* NROM mode */
@@ -46,7 +46,7 @@ static void Mapper134_PRGWrap(uint32 A, uint8 V) {
setprg8(A, V &prgAND | prgOR &~prgAND);
}
static void Mapper134_CHRWrap(uint32 A, uint8 V) {
static void Mapper134_CHRWrap(uint32_t A, uint8_t V) {
int chrAND =EXPREGS[1] &0x40? 0x7F: 0xFF;
int chrOR =EXPREGS[1] <<3 &0x180 | EXPREGS[0] <<4 &0x200;
if (EXPREGS[0] &0x08) V =EXPREGS[2] <<3 | A >>10 &7; /* In CNROM mode, outer bank register 2 replaces the MMC3's CHR registers, and CHR A10-A12 are PPU A10-A12. */

14
src/boards/14.c
View File

@@ -22,9 +22,9 @@
#include "asic_mmc3.h"
#include "asic_vrc2and4.h"
static uint8 reg;
static uint8 init; /* Games switch between ASICs expecting registers to keep their value, so initialize each ASIC only on the first switch and use this bitfield to track it */
static void applyMode (uint8);
static uint8_t reg;
static uint8_t init; /* Games switch between ASICs expecting registers to keep their value, so initialize each ASIC only on the first switch and use this bitfield to track it */
static void applyMode (uint8_t);
static SFORMAT StateRegs[] = {
{ &reg, 1, "MODE" },
@@ -44,16 +44,16 @@ static void sync (void) {
}
}
int getCHRBank_MMC3 (uint8 bank) {
int getCHRBank_MMC3 (uint8_t bank) {
return MMC3_getCHRBank(bank) | reg <<(~bank &4? 5: ~bank &2? 3: 1) &0x100;
}
int getCHRBank_VRC2 (uint8 bank) {
int getCHRBank_VRC2 (uint8_t bank) {
return VRC24_getCHRBank(bank) | reg <<(~bank &4? 5: ~bank &2? 3: 1) &0x100;
}
static DECLFW (writeReg) {
uint8 previousReg = reg;
uint8_t previousReg = reg;
reg = V;
if ((previousReg ^V) &2)
applyMode(1);
@@ -61,7 +61,7 @@ static DECLFW (writeReg) {
sync();
}
static void applyMode (uint8 clear) {
static void applyMode (uint8_t clear) {
PPU_hook = NULL;
MapIRQHook = NULL;
GameHBIRQHook = NULL;

14
src/boards/15.c
View File

@@ -21,10 +21,10 @@
#include "mapinc.h"
static uint16 latchea;
static uint8 latched;
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint16_t latchea;
static uint8_t latched;
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
{ &latchea, 2 | FCEUSTATE_RLSB, "AREG" },
@@ -33,8 +33,8 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
uint32 preg[4];
uint32 bank = (latched & 0x3F) << 1;
uint32_t preg[4];
uint32_t bank = (latched & 0x3F) << 1;
switch (latchea & 0x03) {
case 0:
preg[0] = bank + 0;
@@ -114,7 +114,7 @@ void Mapper15_Init(CartInfo *info) {
info->Close = M15Close;
GameStateRestore = StateRestore;
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
if (info->battery) {
info->SaveGame[0] = WRAM;

2
src/boards/151.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 regs[8];
static uint8_t regs[8];
static SFORMAT StateRegs[] =
{

12
src/boards/156.c
View File

@@ -26,9 +26,9 @@
#include "mapinc.h"
static uint8 chrlo[8], chrhi[8], prg, mirr, mirrisused = 0;
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t chrlo[8], chrhi[8], prg, mirr, mirrisused = 0;
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -40,7 +40,7 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
uint32 i;
uint32_t i;
for (i = 0; i < 8; i++)
setchr1(i << 10, chrlo[i] | (chrhi[i] << 8));
setprg8r(0x10, 0x6000, 0);
@@ -76,7 +76,7 @@ static DECLFW(M156Write) {
}
static void M156Reset(void) {
uint32 i;
uint32_t i;
for (i = 0; i < 8; i++) {
chrlo[i] = 0;
chrhi[i] = 0;
@@ -111,7 +111,7 @@ void Mapper156_Init(CartInfo *info) {
info->Close = M156Close;
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");

8
src/boards/162.c
View File

@@ -24,9 +24,9 @@
#include "mapinc.h"
static uint8 *WRAM;
static uint32 WRAMSIZE;
static uint8 reg[4];
static uint8_t *WRAM;
static uint32_t WRAMSIZE;
static uint8_t reg[4];
static SFORMAT StateRegs[] =
{
{ reg, 4, "REGS" },
@@ -107,7 +107,7 @@ void Mapper162_Init (CartInfo *info)
AddExState(StateRegs, ~0, 0, 0);
WRAMSIZE = info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize): 8192;
WRAM = (uint8*) FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*) FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);

10
src/boards/163.c
View File

@@ -24,9 +24,9 @@
#include "mapinc.h"
static uint8 *WRAM;
static uint32 WRAMSIZE;
static uint8 reg[4];
static uint8_t *WRAM;
static uint32_t WRAMSIZE;
static uint8_t reg[4];
static SFORMAT StateRegs[] =
{
{ reg, 4, "REGS" },
@@ -58,7 +58,7 @@ static DECLFR(readReg)
static DECLFW(writeReg)
{
uint8 index = A >>8 &3;
uint8_t index = A >>8 &3;
/* Swap bits of registers 0-2 again if the "swap bits" bit is set. Exclude register 2 on when PRG-ROM is 1 MiB. */
if (reg[3] &0x01 && index <= (ROM_size == 64? 1: 2))
@@ -112,7 +112,7 @@ void Mapper163_Init (CartInfo *info)
AddExState(StateRegs, ~0, 0, 0);
WRAMSIZE = info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize): 8192;
WRAM = (uint8*) FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*) FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);

14
src/boards/164.c
View File

@@ -28,10 +28,10 @@
#include "mapinc.h"
#include "eeprom_93Cx6.h"
static uint8 *WRAM;
static uint32 WRAMSIZE;
static uint8 reg[8];
static uint8 eeprom_data[512];
static uint8_t *WRAM;
static uint32_t WRAMSIZE;
static uint8_t reg[8];
static uint8_t eeprom_data[512];
static SFORMAT StateRegs[] =
{
{ reg, 8, "REGS" },
@@ -41,8 +41,8 @@ static SFORMAT StateRegs[] =
static void sync()
{
uint8 prgLow = reg[0] &0x0F | reg[0] >>1 &0x10;
uint8 prgHigh = reg[1] <<5;
uint8_t prgLow = reg[0] &0x0F | reg[0] >>1 &0x10;
uint8_t prgHigh = reg[1] <<5;
switch (reg[0] >>5 &2 | reg[0] >>4 &1)
{
case 0: /* UNROM-512 */
@@ -125,7 +125,7 @@ void Mapper164_Init (CartInfo *info)
AddExState(StateRegs, ~0, 0, 0);
WRAMSIZE = info->iNES2? (info->PRGRamSize + (info->PRGRamSaveSize &~0x7FF)): 8192;
WRAM = (uint8*) FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*) FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);

8
src/boards/168.c
View File

@@ -23,9 +23,9 @@
#include "mapinc.h"
static uint8 reg;
static uint8 *CHRRAM = NULL;
static uint32 CHRRAMSIZE;
static uint8_t reg;
static uint8_t *CHRRAM = NULL;
static uint32_t CHRRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -75,7 +75,7 @@ void Mapper168_Init(CartInfo *info) {
AddExState(&StateRegs, ~0, 0, 0);
CHRRAMSIZE = 8192 * 8;
CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
CHRRAM = (uint8_t*)FCEU_gmalloc(CHRRAMSIZE);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
AddExState(CHRRAM, CHRRAMSIZE, 0, "CRAM");
}

2
src/boards/170.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 reg;
static uint8_t reg;
static SFORMAT StateRegs[] =
{

2
src/boards/175.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 reg, delay, mirr;
static uint8_t reg, delay, mirr;
static SFORMAT StateRegs[] =
{

8
src/boards/177.c
View File

@@ -20,10 +20,10 @@
#include "mapinc.h"
static uint8 reg;
static uint8_t reg;
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -75,7 +75,7 @@ void Mapper177_Init(CartInfo *info) {
GameStateRestore = StateRestore;
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if (info->battery) {

40
src/boards/178.c
View File

@@ -27,16 +27,16 @@
#include "mapinc.h"
static uint8 submapper;
static uint8 reg[4];
static uint8 pad[2];
static uint8_t submapper;
static uint8_t reg[4];
static uint8_t pad[2];
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
/* SND Registers */
static uint8 pcm_enable = 0;
static int16 pcm_latch = 0x3F6, pcm_clock = 0x3F6;
static uint8_t pcm_enable = 0;
static int16_t pcm_latch = 0x3F6, pcm_clock = 0x3F6;
static writefunc pcmwrite;
static SFORMAT StateRegs[] =
@@ -45,19 +45,19 @@ static SFORMAT StateRegs[] =
{ 0 }
};
static int16 step_size[49] = {
static int16_t step_size[49] = {
16, 17, 19, 21, 23, 25, 28, 31, 34, 37,
41, 45, 50, 55, 60, 66, 73, 80, 88, 97,
107, 118, 130, 143, 157, 173, 190, 209, 230, 253,
279, 307, 337, 371, 408, 449, 494, 544, 598, 658,
724, 796, 876, 963, 1060, 1166, 1282, 1411, 1552
}; /* 49 items */
static int32 step_adj[16] = { -1, -1, -1, -1, 2, 5, 7, 9, -1, -1, -1, -1, 2, 5, 7, 9 };
static int32_t step_adj[16] = { -1, -1, -1, -1, 2, 5, 7, 9, -1, -1, -1, -1, 2, 5, 7, 9 };
/* decode stuff */
static int32 jedi_table[16 * 49];
static int32 acc = 0; /* ADPCM accumulator, initial condition must be 0 */
static int32 decstep = 0; /* ADPCM decoding step, initial condition must be 0 */
static int32_t jedi_table[16 * 49];
static int32_t acc = 0; /* ADPCM accumulator, initial condition must be 0 */
static int32_t decstep = 0; /* ADPCM decoding step, initial condition must be 0 */
static void jedi_table_init() {
int step, nib;
@@ -70,7 +70,7 @@ static void jedi_table_init() {
}
}
static uint8 decode(uint8 code) {
static uint8_t decode(uint8_t code) {
acc += jedi_table[decstep + code];
if ((acc & ~0x7ff) != 0) /* acc is > 2047 */
acc |= ~0xfff;
@@ -86,8 +86,8 @@ static DECLFR(readPad) {
}
static void M178Sync(void) {
uint32 sbank = reg[1] & 0x7;
uint32 bbank = reg[2];
uint32_t sbank = reg[1] & 0x7;
uint32_t bbank = reg[2];
setchr8(0);
setprg8r(0x10, 0x6000, reg[3] & 3);
if (reg[0] & 2) { /* UNROM mode */
@@ -97,7 +97,7 @@ static void M178Sync(void) {
else
setprg16(0xC000, (bbank << 3) | 7);
} else { /* NROM mode */
uint32 bank = (bbank << 3) | sbank;
uint32_t bank = (bbank << 3) | sbank;
if (reg[0] & 4) {
setprg16(0x8000, bank);
setprg16(0xC000, bank);
@@ -110,8 +110,8 @@ static void M178Sync(void) {
}
static void M551Sync(void) {
uint32 sbank = reg[1] & 0x7;
uint32 bbank = reg[2];
uint32_t sbank = reg[1] & 0x7;
uint32_t bbank = reg[2];
if (reg[0] & 2) { /* UNROM mode */
setprg16(0x8000, (bbank << 3) | sbank);
if (reg[0] & 4)
@@ -119,7 +119,7 @@ static void M551Sync(void) {
else
setprg16(0xC000, (bbank << 3) | 7);
} else { /* NROM mode */
uint32 bank = (bbank << 3) | sbank;
uint32_t bank = (bbank << 3) | sbank;
if (reg[0] & 4) {
setprg16(0x8000, bank);
setprg16(0xC000, bank);
@@ -249,7 +249,7 @@ void Mapper178_Init(CartInfo *info) {
AddExState(pad, 2, 0, "DIPS");
else {
WRAMSIZE = 32768;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
if (info->battery) {
info->SaveGame[0] = WRAM;

16
src/boards/18.c
View File

@@ -20,11 +20,11 @@
#include "mapinc.h"
static uint8 preg[4], creg[8];
static uint8 IRQa, mirr;
static int32 IRQCount, IRQLatch;
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t preg[4], creg[8];
static uint8_t IRQa, mirr;
static int32_t IRQCount, IRQLatch;
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -64,14 +64,14 @@ static DECLFW(M18WriteIRQ) {
}
static DECLFW(M18WritePrg) {
uint32 i = ((A >> 1) & 1) | ((A - 0x8000) >> 11);
uint32_t i = ((A >> 1) & 1) | ((A - 0x8000) >> 11);
preg[i] &= (0xF0) >> ((A & 1) << 2);
preg[i] |= (V & 0xF) << ((A & 1) << 2);
Sync();
}
static DECLFW(M18WriteChr) {
uint32 i = ((A >> 1) & 1) | ((A - 0xA000) >> 11);
uint32_t i = ((A >> 1) & 1) | ((A - 0xA000) >> 11);
creg[i] &= (0xF0) >> ((A & 1) << 2);
creg[i] |= (V & 0xF) << ((A & 1) << 2);
Sync();
@@ -120,7 +120,7 @@ void Mapper18_Init(CartInfo *info) {
GameStateRestore = StateRestore;
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if (info->battery) {

6
src/boards/182.c
View File

@@ -23,7 +23,7 @@
#include "mapinc.h"
#include "asic_mmc3.h"
static uint8 reg[4];
static uint8_t reg[4];
static void sync () {
int prgAND = reg[1] &0x20? 0x1F: 0x0F;
@@ -51,8 +51,8 @@ static DECLFW (writeReg) {
}
static DECLFW (unscramble) {
static const uint16 lutAddress[8] = { 0xA001, 0xA000, 0x8000, 0xC000, 0x8001, 0xC001, 0xE000, 0xE001 }; /* i <5? 4-i: i */
static const uint8 lutIndex[8] = { 0, 3, 1, 5, 6, 7, 2, 4 }; /* i <6? (i^3)-1: i */
static const uint16_t lutAddress[8] = { 0xA001, 0xA000, 0x8000, 0xC000, 0x8001, 0xC001, 0xE000, 0xE001 }; /* i <5? 4-i: i */
static const uint8_t lutIndex[8] = { 0, 3, 1, 5, 6, 7, 2, 4 }; /* i <6? (i^3)-1: i */
MMC3_writeReg(lutAddress[A >>12 &6 | A &1], (A &0xE001) == 0xA000? lutIndex[V &7]: V);
}

2
src/boards/183.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
#include "asic_vrc2and4.h"
static uint8 prg;
static uint8_t prg;
static SFORMAT stateRegs[] ={
{ &prg, 1, "PRG6" },

8
src/boards/185.c
View File

@@ -21,8 +21,8 @@
#include "mapinc.h"
static uint8 *DummyCHR = NULL;
static uint8 datareg;
static uint8_t *DummyCHR = NULL;
static uint8_t datareg;
static void (*Sync)(void);
@@ -87,7 +87,7 @@ void Mapper185_Init(CartInfo *info) {
info->Power = MPower;
info->Close = MClose;
GameStateRestore = MRestore;
DummyCHR = (uint8*)FCEU_gmalloc(8192);
DummyCHR = (uint8_t*)FCEU_gmalloc(8192);
for (x = 0; x < 8192; x++)
DummyCHR[x] = 0xff;
SetupCartCHRMapping(0x10, DummyCHR, 8192, 0);
@@ -100,7 +100,7 @@ void Mapper181_Init(CartInfo *info) {
info->Power = MPower;
info->Close = MClose;
GameStateRestore = MRestore;
DummyCHR = (uint8*)FCEU_gmalloc(8192);
DummyCHR = (uint8_t*)FCEU_gmalloc(8192);
for (x = 0; x < 8192; x++)
DummyCHR[x] = 0xff;
SetupCartCHRMapping(0x10, DummyCHR, 8192, 0);

8
src/boards/186.c
View File

@@ -22,9 +22,9 @@
#include "mapinc.h"
static uint8 SWRAM[3072];
static uint8 *WRAM = NULL;
static uint8 regs[4];
static uint8_t SWRAM[3072];
static uint8_t *WRAM = NULL;
static uint8_t regs[4];
static SFORMAT StateRegs[] =
{
@@ -88,7 +88,7 @@ void Mapper186_Init(CartInfo *info) {
info->Power = M186Power;
info->Close = M186Close;
GameStateRestore = M186Restore;
WRAM = (uint8*)FCEU_gmalloc(32768);
WRAM = (uint8_t*)FCEU_gmalloc(32768);
SetupCartPRGMapping(0x10, WRAM, 32768, 1);
AddExState(WRAM, 32768, 0, "WRAM");
AddExState(StateRegs, ~0, 0, 0);

8
src/boards/187.c
View File

@@ -25,16 +25,16 @@
#include "mapinc.h"
#include "mmc3.h"
static void M187CW(uint32 A, uint8 V) {
static void M187CW(uint32_t A, uint8_t V) {
if ((A & 0x1000) == ((MMC3_cmd & 0x80) << 5))
setchr1(A, V | 0x100);
else
setchr1(A, V);
}
static void M187PW(uint32 A, uint8 V) {
static void M187PW(uint32_t A, uint8_t V) {
if (EXPREGS[0] & 0x80) {
uint8 bank = EXPREGS[0] & 0x1F;
uint8_t bank = EXPREGS[0] & 0x1F;
if (EXPREGS[0] & 0x20) {
if (EXPREGS[0] & 0x40)
setprg32(0x8000, bank >> 2);
@@ -65,7 +65,7 @@ static DECLFW(M187WriteLo) {
}
}
static uint8 prot_data[4] = { 0x83, 0x83, 0x42, 0x00 };
static uint8_t prot_data[4] = { 0x83, 0x83, 0x42, 0x00 };
static DECLFR(M187Read) {
return prot_data[EXPREGS[1] & 3];
}

2
src/boards/189.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
#include "mmc3.h"
static void M189PW(uint32 A, uint8 V) {
static void M189PW(uint32_t A, uint8_t V) {
setprg32(0x8000, EXPREGS[0] & 7);
}

6
src/boards/190.c
View File

@@ -21,8 +21,8 @@
#include "mapinc.h"
static uint8 preg, creg[4];
static uint8 *WRAM = NULL;
static uint8_t preg, creg[4];
static uint8_t *WRAM = NULL;
static SFORMAT StateRegs[] =
{
@@ -82,7 +82,7 @@ static void StateRestore(int version) {
void Mapper190_Init(CartInfo *info) {
info->Power = M190Power;
info->Close = M190Close;
WRAM = (uint8*)FCEU_gmalloc(0x2000);
WRAM = (uint8_t*)FCEU_gmalloc(0x2000);
SetupCartPRGMapping(0x10, WRAM, 0x2000, 1);
AddExState(WRAM, 0x2000, 0, "WRAM");
GameStateRestore = StateRestore;

6
src/boards/191.c
View File

@@ -24,8 +24,8 @@
#include "asic_mmc3.h"
#include "cartram.h"
static uint8 submapper;
static uint8 reg;
static uint8_t submapper;
static uint8_t reg;
static void sync () {
int bank;
@@ -39,7 +39,7 @@ static void sync () {
MMC3_syncMirror();
}
static int getPRGBank (uint8 bank) {
static int getPRGBank (uint8_t bank) {
if (bank &2)
return MMC3_getPRGBank(bank) &~6 | reg <<1 &6;
else

4
src/boards/193.c
View File

@@ -23,8 +23,8 @@
#include "mapinc.h"
static uint8 reg[8];
static uint8 mirror, cmd, bank;
static uint8_t reg[8];
static uint8_t mirror, cmd, bank;
static SFORMAT StateRegs[] =
{

16
src/boards/195.c
View File

@@ -21,20 +21,20 @@
#include "mmc3.h"
static writefunc writePPU;
static uint8 *CHRRAM;
static uint32 CHRRAMSIZE;
static uint8 mask;
static uint8 compare;
extern uint32 RefreshAddr;
static uint8_t *CHRRAM;
static uint32_t CHRRAMSIZE;
static uint8_t mask;
static uint8_t compare;
extern uint32_t RefreshAddr;
static void Mapper195_CHRWrap(uint32 A, uint8 V) {
static void Mapper195_CHRWrap(uint32_t A, uint8_t V) {
if ((V &mask) ==compare)
setchr1r(0x10, A, V);
else
setchr1r(0, A, V);
}
static const uint8 compares[8] = { 0x28, 0x00, 0x4C, 0x64, 0x46, 0x7C, 0x04, 0xFF };
static const uint8_t compares[8] = { 0x28, 0x00, 0x4C, 0x64, 0x46, 0x7C, 0x04, 0xFF };
static DECLFW(Mapper195_InterceptPPUWrite) {
if (RefreshAddr <0x2000) {
int addr =RefreshAddr;
@@ -89,7 +89,7 @@ void Mapper195_Init(CartInfo *info) {
info->Reset = MMC3RegReset;
info->Close = Mapper195_Close;
CHRRAMSIZE =4096;
CHRRAM =(uint8*)FCEU_gmalloc(CHRRAMSIZE);
CHRRAM =(uint8_t*)FCEU_gmalloc(CHRRAMSIZE);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR");
AddExState(&mask, 1, 0, "EXP0");

2
src/boards/199.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
#include "mmc3.h"
static void Mapper199_CHRWrap(uint32 A, uint8 V) {
static void Mapper199_CHRWrap(uint32_t A, uint8_t V) {
setchr8(0); /* Unbanked CHR RAM */
}

4
src/boards/206_486.c
View File

@@ -20,8 +20,8 @@
#include "mapinc.h"
static uint8 cmd;
static uint8 DRegs[8];
static uint8_t cmd;
static uint8_t DRegs[8];
static SFORMAT StateRegs[] =
{

8
src/boards/208.c
View File

@@ -27,9 +27,9 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 submapper;
static uint8_t submapper;
static const uint8 lut[256] = {
static const uint8_t lut[256] = {
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09,
@@ -48,14 +48,14 @@ static const uint8 lut[256] = {
0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
static void M208PW(uint32 A, uint8 V) {
static void M208PW(uint32_t A, uint8_t V) {
if (submapper == 1)
setprg32(0x8000, DRegBuf[6] >> 2);
else
setprg32(0x8000, (EXPREGS[5] & 0x1) | ((EXPREGS[5] >> 3) & 0x2));
}
static void M208MW(uint8 V) {
static void M208MW(uint8_t V) {
if (submapper == 1)
setmirror((V & 1) ^ 1);
else

2
src/boards/21_22_23_25.c
View File

@@ -39,7 +39,7 @@ void Mapper21_Init (CartInfo *info) {
WRAM_init(info, 8);
}
static int Mapper22_getCHRBank(uint8 bank) {
static int Mapper22_getCHRBank(uint8_t bank) {
return VRC24_getCHRBank(bank &7) >>1;
}

12
src/boards/222.c
View File

@@ -21,11 +21,11 @@
#include "mapinc.h"
#include "asic_vrc2and4.h"
static uint8 clockMode;
static uint8 pending;
static uint8 counter1;
static uint8 counter2;
static uint8 prescaler;
static uint8_t clockMode;
static uint8_t pending;
static uint8_t counter1;
static uint8_t counter2;
static uint8_t prescaler;
static SFORMAT stateRegs[] = {
{ &clockMode, 1, "CLKM" },
@@ -66,7 +66,7 @@ static DECLFW (writeIRQ) {
static void FP_FASTAPASS(1) cpuCycle (int a) {
while (a--) {
uint8 previousPrescaler = prescaler;
uint8_t previousPrescaler = prescaler;
if (pending)
prescaler = 0;
else

6
src/boards/225.c
View File

@@ -30,8 +30,8 @@
#include "mapinc.h"
static uint8 extraRAM[4], prg, mode, chr, mirr;
static uint8 is255;
static uint8_t extraRAM[4], prg, mode, chr, mirr;
static uint8_t is255;
static SFORMAT StateRegs[] =
{
@@ -54,7 +54,7 @@ static void Sync(void) {
}
static DECLFW(M225Write) {
uint8 bank = (A >> 14) & 1;
uint8_t bank = (A >> 14) & 1;
mirr = (A >> 13) & 1;
mode = (A >> 12) & 1;
if (is255)

6
src/boards/228.c
View File

@@ -20,8 +20,8 @@
#include "mapinc.h"
static uint8 mram[4], vreg;
static uint16 areg;
static uint8_t mram[4], vreg;
static uint16_t areg;
static SFORMAT StateRegs[] =
{
@@ -32,7 +32,7 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
uint32 prgl, prgh, page = (areg >> 7) & 0x3F;
uint32_t prgl, prgh, page = (areg >> 7) & 0x3F;
if ((page & 0x30) == 0x30)
page -= 0x10;
prgl = prgh = (page << 1) + (((areg >> 6) & 1) & ((areg >> 5) & 1));

4
src/boards/230.c
View File

@@ -24,7 +24,7 @@
#include "mapinc.h"
static uint8 latche, reset;
static uint8_t latche, reset;
static SFORMAT StateRegs[] =
{
{ &reset, 1, "RST" },
@@ -38,7 +38,7 @@ static void Sync(void) {
setprg16(0xC000, 7);
setmirror(MI_V);
} else {
uint32 bank = (latche & 0x1F) + 8;
uint32_t bank = (latche & 0x1F) + 8;
if (latche & 0x20) {
setprg16(0x8000, bank);
setprg16(0xC000, bank);

6
src/boards/232.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 bank, preg;
static uint8_t bank, preg;
static SFORMAT StateRegs[] =
{
{ &bank, 1, "BANK" },
@@ -29,8 +29,8 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
/* uint32 bbank = (bank & 0x18) >> 1; */
uint32 bbank = ((bank & 0x10) >> 2) | (bank & 8); /* some dumps have bbanks swapped, if swap commands,
/* uint32_t bbank = (bank & 0x18) >> 1; */
uint32_t bbank = ((bank & 0x10) >> 2) | (bank & 8); /* some dumps have bbanks swapped, if swap commands,
* then all roms can be played, but with some swapped
* games in menu. if not, some dumps are unplayable
* make hard dump for both cart types to check

6
src/boards/233.c
View File

@@ -27,8 +27,8 @@
#include "mapinc.h"
static uint8 latche;
static uint8 reset;
static uint8_t latche;
static uint8_t reset;
static SFORMAT StateRegs[] =
{
@@ -38,7 +38,7 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
uint8 bank = (latche & 0x1f) | (reset << 5);
uint8_t bank = (latche & 0x1f) | (reset << 5);
if (!(latche & 0x20))
setprg32(0x8000, bank >> 1);

6
src/boards/234.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 bank, preg;
static uint8_t bank, preg;
static SFORMAT StateRegs[] =
{
{ &bank, 1, "BANK" },
@@ -40,7 +40,7 @@ static void Sync(void) {
}
DECLFR(M234ReadBank) {
uint8 r = CartBR(A);
uint8_t r = CartBR(A);
if (!bank) {
bank = r;
Sync();
@@ -49,7 +49,7 @@ DECLFR(M234ReadBank) {
}
DECLFR(M234ReadPreg) {
uint8 r = CartBR(A);
uint8_t r = CartBR(A);
preg = r;
Sync();
return r;

10
src/boards/235.c
View File

@@ -21,10 +21,10 @@
#include "mapinc.h"
static uint16 cmdreg;
static uint8 unrom, reg, openbus;
static uint16_t cmdreg;
static uint8_t unrom, reg, openbus;
static uint32 PRGROMSize;
static uint32_t PRGROMSize;
static SFORMAT StateRegs[] =
{
@@ -37,13 +37,13 @@ static SFORMAT StateRegs[] =
static void Sync(void) {
if (unrom) {
uint8 PRGPageSize = PRGROMSize / 16384;
uint8_t PRGPageSize = PRGROMSize / 16384;
setprg16(0x8000, (PRGPageSize & 0xC0) | (reg & 7));
setprg16(0xC000, (PRGPageSize & 0xC0) | 7);
setchr8(0);
setmirror(MI_V);
} else {
uint8 bank = ((cmdreg & 0x300) >> 3) | (cmdreg & 0x1F);
uint8_t bank = ((cmdreg & 0x300) >> 3) | (cmdreg & 0x1F);
if (cmdreg & 0x400)
setmirror(MI_0);
else

6
src/boards/236.c
View File

@@ -20,9 +20,9 @@
#include "mapinc.h"
static uint8 reg[2];
static uint8 dip;
static uint8 chrramvariant;
static uint8_t reg[2];
static uint8_t dip;
static uint8_t chrramvariant;
static SFORMAT StateRegs[] =
{
{ reg, 2, "REG " },

10
src/boards/237.c
View File

@@ -28,8 +28,8 @@
#include "mapinc.h"
static uint8 reg[2];
static uint8 dipswitch;
static uint8_t reg[2];
static uint8_t dipswitch;
static SFORMAT StateRegs[] =
{
@@ -40,9 +40,9 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
uint8 bank = (reg[1] & 0x07);
uint8 base = (reg[1] & 0x18) | ((reg[0] & 0x04) << 3);
uint8 mode = (reg[1] & 0xC0) >> 6;
uint8_t bank = (reg[1] & 0x07);
uint8_t base = (reg[1] & 0x18) | ((reg[0] & 0x04) << 3);
uint8_t mode = (reg[1] & 0xC0) >> 6;
setchr8(0);
setprg16(0x8000, base | (bank & ~(mode & 1)));

6
src/boards/244.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 preg, creg;
static uint8_t preg, creg;
static SFORMAT StateRegs[] =
{
{ &preg, 1, "PREG" },
@@ -28,14 +28,14 @@ static SFORMAT StateRegs[] =
{ 0 }
};
static uint8 prg_perm[4][4] = {
static uint8_t prg_perm[4][4] = {
{ 0, 1, 2, 3, },
{ 3, 2, 1, 0, },
{ 0, 2, 1, 3, },
{ 3, 1, 2, 0, },
};
static uint8 chr_perm[8][8] = {
static uint8_t chr_perm[8][8] = {
{ 0, 1, 2, 3, 4, 5, 6, 7, },
{ 0, 2, 1, 3, 4, 6, 5, 7, },
{ 0, 1, 4, 5, 2, 3, 6, 7, },

8
src/boards/246.c
View File

@@ -20,9 +20,9 @@
#include "mapinc.h"
static uint8 regs[8];
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t regs[8];
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -73,7 +73,7 @@ void Mapper246_Init(CartInfo *info) {
GameStateRestore = StateRestore;
WRAMSIZE = 2048;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");

6
src/boards/252_253.c
View File

@@ -22,10 +22,10 @@
#include "asic_vrc2and4.h"
#include "cartram.h"
static uint8 mask;
static uint8 compare;
static uint8_t mask;
static uint8_t compare;
extern uint32 RefreshAddr;
extern uint32_t RefreshAddr;
static writefunc writePPU;
static SFORMAT stateRegs[] = {

2
src/boards/265.c
View File

@@ -25,7 +25,7 @@
#include "latch.h"
static void Sync(void) {
uint8 bank = ((latch.addr >> 3) & 0x60) | ((latch.addr >> 2) & 0x18) | (latch.data & 0x07);
uint8_t bank = ((latch.addr >> 3) & 0x60) | ((latch.addr >> 2) & 0x18) | (latch.data & 0x07);
if (latch.addr & 0x80) {
if (!bank) {

2
src/boards/266.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
#include "asic_vrc2and4.h"
static uint8 prg;
static uint8_t prg;
static SFORMAT stateRegs[] ={
{ &prg, 1, "PRG8" },

4
src/boards/267.c
View File

@@ -25,11 +25,11 @@
#define OUTER_BANK (((EXPREGS[0] & 0x20) >> 2) | (EXPREGS[0] & 0x06))
static void M267CW(uint32 A, uint8 V) {
static void M267CW(uint32_t A, uint8_t V) {
setchr1(A, (V & 0x7F) | (OUTER_BANK << 6));
}
static void M267PW(uint32 A, uint8 V) {
static void M267PW(uint32_t A, uint8_t V) {
setprg8(A, (V & 0x1F) | (OUTER_BANK << 4));
}

12
src/boards/268.c
View File

@@ -20,10 +20,10 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 *CHRRAM =NULL;
static uint8 submapper;
static uint8_t *CHRRAM =NULL;
static uint8_t submapper;
static void Mapper268_PRGWrap(uint32 A, uint8 V) {
static void Mapper268_PRGWrap(uint32_t A, uint8_t V) {
int prgMaskMMC3, prgMaskGNROM, prgOffset;
prgMaskMMC3 =(EXPREGS[3] &0x10? 0x00: 0x0F) /* PRG A13-A16 */
@@ -83,7 +83,7 @@ static void Mapper268_PRGWrap(uint32 A, uint8 V) {
SetupCartCHRMapping(0, CHRptr[0], CHRsize[0], (submapper &~1) ==8 && EXPREGS[0] &0x10? 0: 1);
}
static void Mapper268_CHRWrap(uint32 A, uint8 V) {
static void Mapper268_CHRWrap(uint32_t A, uint8_t V) {
int chrMaskMMC3, chrMaskGNROM, chrOffset;
chrMaskMMC3 =EXPREGS[3] &0x10? 0x00: EXPREGS[0] &0x80? 0x7F: 0xFF;
@@ -94,7 +94,7 @@ static void Mapper268_CHRWrap(uint32 A, uint8 V) {
setchr1r(CHRRAM && EXPREGS[4] &0x01 && (V &0xFE) ==(EXPREGS[4] &0xFE)? 0x10: 0x00, A, V &chrMaskMMC3 | chrOffset | A >>10 &chrMaskGNROM);
}
void Mapper268_MirrorWrap(uint8 V) {
void Mapper268_MirrorWrap(uint8_t V) {
A000B =V;
if ((submapper &~1) ==10 && ~EXPREGS[0] &0x20)
setmirror(EXPREGS[0] &0x10? MI_1: MI_0);
@@ -169,7 +169,7 @@ void Mapper268_Init(CartInfo *info) {
AddExState(EXPREGS, 8, 0, "EXPR");
if (info->CHRRomSize && info->CHRRamSize + info->CHRRamSaveSize) {
CHRRAM =(uint8 *)FCEU_gmalloc(info->CHRRamSize + info->CHRRamSaveSize);
CHRRAM =(uint8_t *)FCEU_gmalloc(info->CHRRamSize + info->CHRRamSaveSize);
SetupCartCHRMapping(0x10, CHRRAM, info->CHRRamSize + info->CHRRamSaveSize, 1);
AddExState(CHRRAM, info->CHRRamSize + info->CHRRamSaveSize, 0, "CRAM");
}

18
src/boards/269.c
View File

@@ -27,19 +27,19 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 *CHRROM;
static uint32 CHRROMSIZE;
static uint8_t *CHRROM;
static uint32_t CHRROMSIZE;
static void M269CW(uint32 A, uint8 V) {
uint16 NV = V;
static void M269CW(uint32_t A, uint8_t V) {
uint16_t NV = V;
if (EXPREGS[2] & 8)
NV &= (1 << ((EXPREGS[2] & 7) + 1)) - 1;
NV |= EXPREGS[0] | ((EXPREGS[2] & 0xF0) << 4);
setchr1(A, NV);
}
static void M269PW(uint32 A, uint8 V) {
uint16 MV = V & ((EXPREGS[3] & 0x3F) ^ 0x3F);
static void M269PW(uint32_t A, uint8_t V) {
uint16_t MV = V & ((EXPREGS[3] & 0x3F) ^ 0x3F);
MV |= EXPREGS[1];
MV |= ((EXPREGS[3] & 0x40) << 2);
setprg8(A, MV);
@@ -74,13 +74,13 @@ static void M269Power(void) {
SetWriteHandler(0x5000, 0x5FFF, M269Write5);
}
static uint8 unscrambleCHR(uint8 data) {
static uint8_t unscrambleCHR(uint8_t data) {
return ((data & 0x01) << 6) | ((data & 0x02) << 3) | ((data & 0x04) << 0) | ((data & 0x08) >> 3) |
((data & 0x10) >> 3) | ((data & 0x20) >> 2) | ((data & 0x40) >> 1) | ((data & 0x80) << 0);
}
void Mapper269_Init(CartInfo *info) {
uint32 i;
uint32_t i;
GenMMC3_Init(info, 512, 0, 8, 0);
cwrap = M269CW;
pwrap = M269PW;
@@ -90,7 +90,7 @@ void Mapper269_Init(CartInfo *info) {
AddExState(EXPREGS, 5, 0, "EXPR");
CHRROMSIZE = PRGsize[0];
CHRROM = (uint8*)FCEU_gmalloc(CHRROMSIZE);
CHRROM = (uint8_t*)FCEU_gmalloc(CHRROMSIZE);
/* unscramble CHR data from PRG */
for (i = 0; i < CHRROMSIZE; i++)
CHRROM[i] = unscrambleCHR(PRGptr[0][i]);

22
src/boards/272.c
View File

@@ -27,13 +27,13 @@
#include "mapinc.h"
static uint8 prg[2];
static uint8 chr[8];
static uint8 mirr;
static uint8 pal_mirr;
static uint8 last_pa13;
static uint8 IRQCount;
static uint8 IRQa;
static uint8_t prg[2];
static uint8_t chr[8];
static uint8_t mirr;
static uint8_t pal_mirr;
static uint8_t last_pa13;
static uint8_t IRQCount;
static uint8_t IRQa;
static SFORMAT StateRegs[] =
{
@@ -51,13 +51,13 @@ static SFORMAT StateRegs[] =
#define shi(exp, bit, pos) \
((((exp) & (1 << (bit))) >> (bit)) << (pos))
static uint32 vrc_addr_mix(uint32 A) {
static uint32_t vrc_addr_mix(uint32_t A) {
/* this game wires A0 to VRC_A0 and A1 to VRC_A1 */
return (A & 0xf000) | shi(A, 0, 0) | shi(A, 1, 1);
}
static void Sync(void) {
uint8 i;
uint8_t i;
setprg8(0x8000, prg[0]);
setprg8(0xa000, prg[1]);
setprg16(0xc000, -1);
@@ -141,8 +141,8 @@ static void M272Power(void) {
SetReadHandler(0x8000, 0xFFFF, CartBR);
}
static void M272Hook(uint32 A) {
uint8 pa13 = (A >> 13) & 1;
static void M272Hook(uint32_t A) {
uint8_t pa13 = (A >> 13) & 1;
if ((last_pa13 == 1) && (pa13 == 0)) {
if (IRQa) {
IRQCount++;

8
src/boards/273.c
View File

@@ -21,10 +21,10 @@
#include "mapinc.h"
#include "asic_vrc2and4.h"
static uint8 irqEnabled;
static uint8 irqCounter;
static uint8 irqPrescaler;
static uint8 irqMask;
static uint8_t irqEnabled;
static uint8_t irqCounter;
static uint8_t irqPrescaler;
static uint8_t irqMask;
static SFORMAT stateRegs[] ={
{ &irqEnabled, 1, "IRQE" },

2
src/boards/277.c
View File

@@ -22,7 +22,7 @@
#include "mapinc.h"
#include "latch.h"
static uint8 inesMirroring;
static uint8_t inesMirroring;
static void Sync(void) {
if (!(latch.data & 1) && (latch.data & 8)) {

12
src/boards/28.c
View File

@@ -24,8 +24,8 @@
#include "mapinc.h"
static uint8 prg_mask_16k;
static uint8 reg, chr, prg, mode, outer;
static uint8_t prg_mask_16k;
static uint8_t reg, chr, prg, mode, outer;
static SFORMAT StateRegs[] = {
{&reg, 1, "REG"},
@@ -45,7 +45,7 @@ void SyncMirror() {
}
}
void Mirror(uint8 value)
void Mirror(uint8_t value)
{
if ((mode & 2) == 0) {
mode &= 0xfe;
@@ -56,10 +56,10 @@ void Mirror(uint8 value)
static void Sync() {
uint8 prglo = 0;
uint8 prghi = 0;
uint8_t prglo = 0;
uint8_t prghi = 0;
uint8 outb = outer << 1;
uint8_t outb = outer << 1;
/* this can probably be rolled up, but i have no motivation to do so
* until it's been tested */

8
src/boards/280.c
View File

@@ -20,10 +20,10 @@
#include "mapinc.h"
static uint16 latchAddr;
static uint8 latchData;
static uint8 mode;
static uint8 submapper;
static uint16_t latchAddr;
static uint8_t latchData;
static uint8_t mode;
static uint8_t submapper;
static SFORMAT StateRegs[] = {
{ &latchAddr, 2 | FCEUSTATE_RLSB, "LATC" },

2
src/boards/283.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 reg, mirr;
static uint8_t reg, mirr;
static SFORMAT StateRegs[] =
{
{ &reg, 1, "REGS" },

2
src/boards/285.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
#include "asic_latch.h"
static uint8 pad;
static uint8_t pad;
static void sync_submapper0 () {
if (Latch_data &0x40)

4
src/boards/291.c
View File

@@ -21,11 +21,11 @@
#include "mapinc.h"
#include "mmc3.h"
static void M291CW(uint32 A, uint8 V) {
static void M291CW(uint32_t A, uint8_t V) {
setchr1(A, V | ((EXPREGS[0] << 2) & 0x100));
}
static void M291PW(uint32 A, uint8 V) {
static void M291PW(uint32_t A, uint8_t V) {
if (EXPREGS[0] & 0x20)
setprg32(0x8000, ((EXPREGS[0] >> 1) & 3) | ((EXPREGS[0] >> 4) & 4));
else

8
src/boards/293.c
View File

@@ -22,7 +22,7 @@
#include "mapinc.h"
static uint8 regs[2];
static uint8_t regs[2];
static SFORMAT StateRegs[] =
{
{ regs, 2, "REGS" },
@@ -30,9 +30,9 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
uint8 mode = ((regs[0] >> 2) & 2) | ((regs[1] >> 6) & 1);
uint8 bank = ((regs[1] << 5) & 0x20) | ((regs[1] >> 1) & 0x18);
uint8 block = (regs[0] & 7);
uint8_t mode = ((regs[0] >> 2) & 2) | ((regs[1] >> 6) & 1);
uint8_t bank = ((regs[1] << 5) & 0x20) | ((regs[1] >> 1) & 0x18);
uint8_t block = (regs[0] & 7);
switch (mode) {
case 0: /* UNROM */
setprg16(0x8000, bank | block);

2
src/boards/294.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
static uint8 latch;
static uint8_t latch;
static void Mapper294_sync (void) {
setprg16(0x8000, latch);

4
src/boards/301.c
View File

@@ -21,8 +21,8 @@
#include "mapinc.h"
#include "asic_latch.h"
static uint8 half;
static uint8 reg;
static uint8_t half;
static uint8_t reg;
static void sync () {
setprg16(0x8000, half <<5 &0x20 | reg <<3 &0x18 | Latch_data &0x07);

6
src/boards/308.c
View File

@@ -21,9 +21,9 @@
#include "mapinc.h"
#include "asic_vrc2and4.h"
static uint8 irqEnabled;
static uint16 irqCounterLow;
static uint8 irqCounterHigh;
static uint8_t irqEnabled;
static uint16_t irqCounterLow;
static uint8_t irqCounterHigh;
static SFORMAT stateRegs[] ={
{ &irqEnabled, 1, "IRQE" },

2
src/boards/31.c
View File

@@ -23,7 +23,7 @@
#include "mapinc.h"
static uint8 preg[8];
static uint8_t preg[8];
static SFORMAT StateRegs[] =
{

4
src/boards/310.c
View File

@@ -21,8 +21,8 @@
#include "mapinc.h"
static uint8 regData[2];
static uint8 regAddr;
static uint8_t regData[2];
static uint8_t regAddr;
static SFORMAT K1053_state[] =
{

6
src/boards/319.c
View File

@@ -21,9 +21,9 @@
#include "mapinc.h"
static uint8 reg[2];
static uint8 latch;
static uint8 pad;
static uint8_t reg[2];
static uint8_t latch;
static uint8_t pad;
static SFORMAT StateRegs[] =
{

12
src/boards/32.c
View File

@@ -20,10 +20,10 @@
#include "mapinc.h"
static uint8 preg[2], creg[8], mirr;
static uint8_t preg[2], creg[8], mirr;
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -34,8 +34,8 @@ static SFORMAT StateRegs[] =
};
static void Sync(void) {
uint8 i;
uint16 swap = ((mirr & 2) << 13);
uint8_t i;
uint16_t swap = ((mirr & 2) << 13);
setmirror((mirr & 1) ^ 1);
setprg8r(0x10, 0x6000, 0);
setprg8(0x8000 ^ swap, preg[0]);
@@ -94,7 +94,7 @@ void Mapper32_Init(CartInfo *info) {
GameStateRestore = StateRestore;
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");

2
src/boards/321.c
View File

@@ -23,7 +23,7 @@
#include "mapinc.h"
#include "asic_mmc3.h"
static uint8 reg;
static uint8_t reg;
static void sync () {
if (reg &0x08)

6
src/boards/326.c
View File

@@ -24,7 +24,7 @@
#include "mapinc.h"
static uint8 PRG[3], CHR[8], NTAPage[4];
static uint8_t PRG[3], CHR[8], NTAPage[4];
static SFORMAT StateRegs[] =
{
@@ -41,7 +41,7 @@ static void SyncPRG(void) {
setprg8(0xE000, ~0);
}
static void DoCHR(int x, uint8 V) {
static void DoCHR(int x, uint8_t V) {
CHR[x] = V;
setchr1(x << 10, V);
}
@@ -52,7 +52,7 @@ static void FixCHR(void) {
DoCHR(x, CHR[x]);
}
static void FASTAPASS(2) DoNTARAM(int w, uint8 V) {
static void FASTAPASS(2) DoNTARAM(int w, uint8_t V) {
NTAPage[w] = V;
setntamem(NTARAM + ((V & 1) << 10), 1, w);
}

8
src/boards/33.c
View File

@@ -20,10 +20,10 @@
#include "mapinc.h"
static uint8 is48;
static uint8 regs[8], mirr;
static uint8 IRQa;
static int16 IRQCount, IRQLatch;
static uint8_t is48;
static uint8_t regs[8], mirr;
static uint8_t IRQa;
static int16_t IRQCount, IRQLatch;
static SFORMAT StateRegs[] =
{

14
src/boards/330.c
View File

@@ -24,11 +24,11 @@
#include "mapinc.h"
static uint8 *WRAM;
static uint8_t *WRAM;
static uint8 PRG[3], CHR[8], NTAPage[4];
static uint8 IRQa;
static uint16 IRQCount;
static uint8_t PRG[3], CHR[8], NTAPage[4];
static uint8_t IRQa;
static uint16_t IRQCount;
static SFORMAT StateRegs[] =
{
@@ -47,7 +47,7 @@ static void SyncPRG(void) {
setprg8(0xE000, ~0);
}
static void DoCHR(int x, uint8 V) {
static void DoCHR(int x, uint8_t V) {
CHR[x] = V;
setchr1(x << 10, V);
}
@@ -58,7 +58,7 @@ static void FixCHR(void) {
DoCHR(x, CHR[x]);
}
static void FASTAPASS(2) DoNTARAM(int w, uint8 V) {
static void FASTAPASS(2) DoNTARAM(int w, uint8_t V) {
NTAPage[w] = V;
setntamem(NTARAM + ((V & 1) << 10), 1, w);
}
@@ -139,7 +139,7 @@ void Mapper330_Init(CartInfo *info) {
MapIRQHook = M330IRQHook;
GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
WRAM = (uint8 *)FCEU_gmalloc(8192);
WRAM = (uint8_t *)FCEU_gmalloc(8192);
SetupCartPRGMapping(0x10, WRAM, 8192, 1);
AddExState(WRAM, 8192, 0, "WRAM");
}

4
src/boards/334.c
View File

@@ -23,9 +23,9 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 dipswitch;
static uint8_t dipswitch;
static void M334PW(uint32 A, uint8 V) {
static void M334PW(uint32_t A, uint8_t V) {
setprg32(0x8000, EXPREGS[0] >> 1);
}

8
src/boards/34.c
View File

@@ -29,9 +29,9 @@
#include "mapinc.h"
static uint8 regs[3];
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8_t regs[3];
static uint8_t *WRAM = NULL;
static uint32_t WRAMSIZE;
static SFORMAT StateRegs[] =
{
@@ -85,7 +85,7 @@ void Mapper34_Init(CartInfo *info) {
GameStateRestore = StateRestore;
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM = (uint8_t*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");

2
src/boards/340.c
View File

@@ -25,7 +25,7 @@
Submapper 1 - K-3055 PCB: H mirroring via A2 in NROM mode, and via A3=0,A4=1 in UNROM mode (used by Thundercade).
*/
static uint8 submapper;
static uint8_t submapper;
static void sync () {
int prg = Latch_address >>2 &0x20 | Latch_address &0x1F;
if (Latch_address &0x20) { /* NROM mode */

4
src/boards/341.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
#include "asic_latch.h"
static uint8 submapper;
static uint8_t submapper;
static void sync () {
setprg32(0x8000, Latch_address >>8);
@@ -29,7 +29,7 @@ static void sync () {
setmirror(Latch_address &(submapper == 1? 0x800: 0x200)? MI_H: MI_V);
}
static void trapLatchWrite (uint16 *newAddress, uint8 *newValue, uint8 romValue) {
static void trapLatchWrite (uint16_t *newAddress, uint8_t *newValue, uint8_t romValue) {
if (!((*newAddress &0xF0) == 0xA0)) *newAddress = Latch_address; /* Update address only if new A7..A4 = $A */
}

2
src/boards/343.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
#include "asic_latch.h"
static uint8 reg;
static uint8_t reg;
static void sync () {
setprg32(0x8000, Latch_data);

14
src/boards/351.c
View File

@@ -23,9 +23,9 @@
#include "asic_mmc3.h"
#include "asic_vrc2and4.h"
static uint8 reg[4], dip;
static uint8 *CHRRAM = NULL;
static uint8 *PRGCHR = NULL;
static uint8_t reg[4], dip;
static uint8_t *CHRRAM = NULL;
static uint8_t *PRGCHR = NULL;
static int prgMask_CHRROM; /* PRG-ROM bank mask when CHR-ROM is active (outside of PRG address space */
static int prgMask_CHRRAM; /* PRG-ROM bank mask when CHR-RAM is active (CHR-ROM becomes part of PRG address space) */
@@ -90,7 +90,7 @@ DECLFW (VRC24_trapWriteReg) { /* When A11 is set, VRC4's A0 and A1 are swapped *
VRC24_writeReg(A, V);
}
static void applyMode (uint8 clear) {
static void applyMode (uint8_t clear) {
PPU_hook = NULL;
MapIRQHook = NULL;
GameHBIRQHook = NULL;
@@ -162,12 +162,12 @@ void Mapper351_Init (CartInfo *info) {
/* When CHR-RAM is enabled, CHR-ROM becomes part of PRG-ROM address space. */
prgMask_CHRROM = prgMask_CHRRAM = PRGsize[0] /8192 -1;
if (CHRRAMSIZE) {
uint8* newROM;
CHRRAM = (uint8 *)FCEU_gmalloc(CHRRAMSIZE);
uint8_t* newROM;
CHRRAM = (uint8_t *)FCEU_gmalloc(CHRRAMSIZE);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
AddExState(CHRRAM, CHRRAMSIZE, 0, "CRAM");
prgMask_CHRRAM = (PRGsize[0] +CHRsize[0]) /8192 -1;
newROM = (uint8*)FCEU_gmalloc(PRGsize[0] +CHRsize[0]);
newROM = (uint8_t*)FCEU_gmalloc(PRGsize[0] +CHRsize[0]);
memcpy(newROM, ROM, info->PRGRomSize);
memcpy(newROM +PRGsize[0], VROM, info->CHRRomSize);
FCEU_gfree(ROM);

2
src/boards/352.c
View File

@@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 game;
static uint8_t game;
static void sync () {
setprg32(0x8000, game);

20
src/boards/353.c
View File

@@ -27,12 +27,12 @@
#include "mmc3.h"
#include "../fds_apu.h"
static uint8* CHRRAM = NULL;
static uint32 CHRRAMSIZE;
static uint8 PPUCHRBus;
static uint8 MIR[8];
static uint8_t* CHRRAM = NULL;
static uint32_t CHRRAMSIZE;
static uint8_t PPUCHRBus;
static uint8_t MIR[8];
static void M353PPU(uint32 A) {
static void M353PPU(uint32_t A) {
A &= 0x1FFF;
A >>= 10;
PPUCHRBus = A;
@@ -40,8 +40,8 @@ static void M353PPU(uint32 A) {
setmirror(MI_0 + MIR[A]);
}
static void M353PW(uint32 A, uint8 V) {
uint8 bank = V;
static void M353PW(uint32_t A, uint8_t V) {
uint8_t bank = V;
if (EXPREGS[0] == 2) {
bank &= 0x0F;
@@ -64,7 +64,7 @@ static void M353PW(uint32 A, uint8 V) {
setprg8(A, bank);
}
static void M353CW(uint32 A, uint8 V) {
static void M353CW(uint32_t A, uint8_t V) {
if ((EXPREGS[0] == 2) && (DRegBuf[0] & 0x80))
setchr8r(0x10, 0);
else
@@ -75,7 +75,7 @@ static void M353CW(uint32 A, uint8 V) {
setmirror(MI_0 + (V >> 7));
}
static void M353MW(uint8 V) {
static void M353MW(uint8_t V) {
if (EXPREGS[0] != 0) {
A000B = V;
setmirror((V & 1) ^ 1);
@@ -128,7 +128,7 @@ void Mapper353_Init(CartInfo* info) {
AddExState(EXPREGS, 1, 0, "EXPR");
CHRRAMSIZE = 8192;
CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
CHRRAM = (uint8_t*)FCEU_gmalloc(CHRRAMSIZE);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR");
}

6
src/boards/354.c
View File

@@ -20,9 +20,9 @@
#include "mapinc.h"
static uint16 latchAddr;
static uint8 latchData;
static uint8 submapper;
static uint16_t latchAddr;
static uint8_t latchData;
static uint8_t submapper;
static SFORMAT StateRegs[] =
{

4
src/boards/355.c
View File

@@ -22,8 +22,8 @@
#include "mapinc.h"
#include "pic16c5x.h"
static uint32 address;
static uint8 *picrom = NULL;
static uint32_t address;
static uint8_t *picrom = NULL;
static uint8_t pci16c5x_read(int port) {
if (port == 0) {

6
src/boards/356.c
View File

@@ -23,8 +23,8 @@
#include "mapinc.h"
#include "asic_tc3294.h"
static uint8 *CHRRAM = NULL;
static uint32 CHRRAMSize;
static uint8_t *CHRRAM = NULL;
static uint32_t CHRRAMSize;
static void sync () {
TC3294_syncPRG(0xFF, 0x00);
@@ -52,7 +52,7 @@ void Mapper356_Init (CartInfo *info) {
TC3294_init(info, sync);
info->Close = close;
CHRRAMSize = 8192;
CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSize);
CHRRAM = (uint8_t*)FCEU_gmalloc(CHRRAMSize);
AddExState(CHRRAM, CHRRAMSize, 0, "CRAM");
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSize, 1);
}

12
src/boards/357.c
View File

@@ -27,13 +27,13 @@
#include "mapinc.h"
static uint8 preg[4];
static uint8 dipswitch;
static uint8 IRQa;
static uint16 IRQCount;
static uint8_t preg[4];
static uint8_t dipswitch;
static uint8_t IRQa;
static uint16_t IRQCount;
static const uint8 banks[8] = { 4, 3, 5, 3, 6, 3, 7, 3 };
static const uint8 outer_bank[4] = { 0x00, 0x08, 0x10, 0x18 };
static const uint8_t banks[8] = { 4, 3, 5, 3, 6, 3, 7, 3 };
static const uint8_t outer_bank[4] = { 0x00, 0x08, 0x10, 0x18 };
static SFORMAT StateRegs[] =
{

38
src/boards/359.c
View File

@@ -25,17 +25,17 @@
#include "mapinc.h"
#include "../fds_apu.h"
static uint32 mapperNum;
static uint8 preg[4];
static uint8 creg[8];
static uint8 exRegs[4];
static uint8 IRQReload;
static uint8 IRQa;
static uint8 irqPA12;
static uint8 IRQAutoEnable;
static uint8 IRQLatch;
static uint8 IRQCount;
static int16 IRQCount16;
static uint32_t mapperNum;
static uint8_t preg[4];
static uint8_t creg[8];
static uint8_t exRegs[4];
static uint8_t IRQReload;
static uint8_t IRQa;
static uint8_t irqPA12;
static uint8_t IRQAutoEnable;
static uint8_t IRQLatch;
static uint8_t IRQCount;
static int16_t IRQCount16;
static SFORMAT StateRegs[] = {
{ preg, 4, "PREG" },
@@ -52,8 +52,8 @@ static SFORMAT StateRegs[] = {
};
static void Sync(void) {
uint8 prgMask = 0x3F;
uint8 prgOuterBank = (exRegs[0] & 0x38) << 1;
uint8_t prgMask = 0x3F;
uint8_t prgOuterBank = (exRegs[0] & 0x38) << 1;
switch (exRegs[1] & 3) {
case 0: prgMask = 0x3F; break;
@@ -71,9 +71,9 @@ static void Sync(void) {
if (!UNIFchrrama) {
switch (mapperNum) {
case 359: {
uint8 i;
uint8 chrMask = (exRegs[1] & 0x40) ? 0xFF : 0x7F;
uint16 chrOuterBank = (exRegs[3] << 7);
uint8_t i;
uint8_t chrMask = (exRegs[1] & 0x40) ? 0xFF : 0x7F;
uint16_t chrOuterBank = (exRegs[3] << 7);
for (i = 0; i < 8; i++)
setchr1(i << 10, (creg[i] & chrMask) | chrOuterBank);
@@ -124,19 +124,19 @@ static DECLFW(M359WriteIRQ) {
}
static DECLFW(M359WritePRG) {
uint8 i = A & 3;
uint8_t i = A & 3;
preg[i] = V;
Sync();
}
static DECLFW(M359WriteCHR) {
uint8 i = ((A >> 10) & 4) | (A & 3);
uint8_t i = ((A >> 10) & 4) | (A & 3);
creg[i] = V;
Sync();
}
static DECLFW(M359WriteEx) {
uint8 i = A & 3;
uint8_t i = A & 3;
exRegs[i] = V;
Sync();
}

4
src/boards/360.c
View File

@@ -22,8 +22,8 @@
#include "mapinc.h"
static uint8 reg;
static uint8 submapper;
static uint8_t reg;
static uint8_t submapper;
static SFORMAT StateRegs[] =
{

2
src/boards/361.c
View File

@@ -23,7 +23,7 @@
#include "mapinc.h"
#include "asic_mmc3.h"
static uint8 reg;
static uint8_t reg;
static void sync () {
MMC3_syncPRG(0x0F, reg &~0x0F);

2
src/boards/362.c
View File

@@ -21,7 +21,7 @@
#include "mapinc.h"
#include "asic_vrc2and4.h"
static uint8 game;
static uint8_t game;
static SFORMAT stateRegs[] ={
{ &game, 1, "GAME" },

2
src/boards/363.c
View File

@@ -28,7 +28,7 @@ static void sync () {
setmirror(Latch_address &0x20? MI_H: MI_V);
}
static void trapLatchWrite (uint16 *newAddress, uint8 *newValue, uint8 romValue) {
static void trapLatchWrite (uint16_t *newAddress, uint8_t *newValue, uint8_t romValue) {
if (!(~Latch_address &0x10 && *newAddress &0x10)) *newAddress = Latch_address; /* Address bits only latched on a rising edge of A4 */
*newValue &= romValue; /* AND-type bus conflicts */
}

4
src/boards/364.c
View File

@@ -22,12 +22,12 @@
#include "mapinc.h"
#include "mmc3.h"
static void M364CW(uint32 A, uint8 V) {
static void M364CW(uint32_t A, uint8_t V) {
V &= (EXPREGS[0] & 0x20) ? 0x7F : 0xFF;
setchr1(A, V | ((EXPREGS[0] << 4) & 0x100));
}
static void M364PW(uint32 A, uint8 V) {
static void M364PW(uint32_t A, uint8_t V) {
V &= (EXPREGS[0] & 0x20) ? 0x0F : 0x1F;
setprg8(A, V | ((EXPREGS[0] >> 1) & 0x20));
}

2
src/boards/366.c
View File

@@ -24,7 +24,7 @@
#include "asic_mmc3.h"
#include "cartram.h"
static uint8 reg;
static uint8_t reg;
static void sync () {
MMC3_syncWRAM(0);

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