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core: stride-aware savestate, iNES2 helpers, -Wundef, -Wmissing-prototypes

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Audit pass 5 - five distinct cleanups bundled into one omnibus.

1. Element-stride byte-swapping for savestate fields (state.h, state.c,
   fceu-endian.{h,c})

   The SFORMAT 's' field was previously {bit 31 = RLSB, bits 0..30 =
   byte size}. RLSB triggers FlipByteOrder() on MSB hosts, which
   reverses the entire entry buffer end-to-end. That is correct for a
   single primitive (size <= 8 bytes) but wrong for an array of
   multi-byte primitives - reversing the whole buffer would swap
   element 0 with element N-1 and reverse their bytes too, scrambling
   the data.

   The previous workaround was either splitting an N-element array
   into N separate single-primitive entries with distinct chunk IDs
   (n106 PlayIndex split into IDX0..IDX7) or skipping the entry
   entirely on big-endian hosts (the GEKKO #ifndef in vrc6.c / vrc7.c).
   Both approaches mean BE saves are not portable to LE and vice
   versa, and force the same workaround at every new array site.

   This pass adds proper stride support:

     * SFORMAT 's' encoding is now {bit 31 = RLSB, bits 24..30 =
       stride in bytes (0 = legacy/unset), bits 0..23 = byte size}.
       16 MiB max size, well above any actual savestate field.
     * FCEUSTATE_RLSB_ARRAY(stride) macro for the new pattern.
     * FlipByteOrderStrided() byte-swaps each element of an array
       independently. Round-trip identity verified: [01 00 00 00 ...]
       -> [00 00 00 01 ...] -> [01 00 00 00 ...].
     * state.c's SubWrite / ReadStateChunk / CheckS use new helpers
       sf_size() / sf_stride() / sf_flip() that mask the size out of
       the new bit layout and dispatch to the strided variant when
       stride < size.

   Backwards compatible: legacy single-primitive entries (size == 1,
   2, 4, 8) leave the stride bits at zero, which sf_stride() reads
   as "stride equals size" and falls through to FlipByteOrder() as
   before. No on-disk format change. Existing single-primitive RLSB
   sites are unchanged.

   The infrastructure is now in place so any future SFORMAT entry
   that is an array of multi-byte primitives can be expressed as a
   single entry (e.g. "{ buf, sizeof(buf) | FCEUSTATE_RLSB_ARRAY(4),
   "BUF." }") without splitting or skipping. The existing PlayIndex
   split and GEKKO #ifndefs are intentionally left untouched -
   migrating them would alter the on-disk savestate format and is a
   separate decision.

2. iNES1-vs-iNES2 sizing helpers (cart.h)

   Twelve sites across the codebase encoded the same conditional:

     info->iNES2 ? (info->PRGRamSize + info->PRGRamSaveSize) : default

   Sometimes for PRGRAM, sometimes for CHRRAM, sometimes in bytes,
   sometimes after dividing by 1024. The pattern is verbose and easy
   to write inconsistently.

   Added two inline helpers in cart.h:
     - CartInfo_PRGRAM_bytes(info, default_bytes)
     - CartInfo_CHRRAM_bytes(info, default_bytes)

   Migrated 9 of the 13 sites: cartram.c (2), 162.c, 163.c, 134.c,
   399.c, 478.c, 480.c, 484.c. The remaining 4 are non-helper-fitting
   variants (164.c special masking, 2 cartram SaveGameLen sites with
   different fallback semantics, mmc3.c Boogerman submapper detection).

3. -Wundef enabled permanently (Makefile.libretro)

   Zero warnings out of the box - no #if-on-undefined-macro footguns
   in the codebase. Now part of WARNING_DEFINES alongside the existing
   -Wsign-compare.

4. -Wmissing-prototypes enabled permanently (Makefile.libretro)

   Started at 198 warnings, cleared all of them:

     * Mass-static-ified ~96 functions across 75 files that were
       defined non-static but only used within their own translation
       unit. (See static_prototype_fixer.py in the development notes.)
     * K&R-style empty-parens prototypes "()" replaced with explicit
       "(void)" across all asic_*.{c,h} files - GCC treats "()" as
       "any args" and refuses to match it against a separate K&R
       definition.
     * Added missing forward declarations to public headers:
         - fds.h (FDSLoad)
         - nsf.h (NSFLoad)
         - ines.h (iNESLoad)
         - unif.h (UNIFLoad)
         - latch.h (LatchHardReset, K&R fix)
         - eeprom_93Cx6.h (eeprom_93Cx6_read, K&R fix)
       Each header gained an "#include "file.h"" where needed.
     * fds_apu.c now includes its own fds_apu.h header (was missing).
     * fds_apu.h: removed unused FDSSoundRead declaration (the function
       is internal-static).
     * cartram.h: removed unused CartRAM_close declaration (the function
       is internal-static).
     * input.h: added a centralised block of FCEU_Init* prototypes
       (Zapper, Mouse, Powerpad, Arkanoid, VirtualBoy, FKB, SuborKB,
       PEC586KB, HS, Mahjong, FamilyTrainerA/B, OekaKids, TopRider,
       BarcodeWorld, BattleBox, QuizKing, FTrainerA/B, SpaceShadow,
       LCDCompZapper, ArkanoidFC) plus FCEU_ZapperSetTolerance. These
       were previously declared as "extern" inside src/input.c.
     * Static-ified FP_FASTAPASS callbacks in 106.c, 65.c, 67.c,
       asic_h3001.c, asic_vrc3.c (those with no external callers);
       left non-static for those that have header decls or are
       referenced from sibling .c files (asic_mmc1, asic_vrc6,
       asic_vrc7, flashrom).
     * For a small set of cross-file functions where adding a header
       was disproportionate to the value (MMC5_hb, NSFMMC5_Close,
       GetKeyboard, FCEU_GetJoyJoy), placed a forward declaration
       immediately above the definition. This satisfies
       -Wmissing-prototypes (which checks for any prior declaration
       in scope) without churning the public-header layout.

5. -Wshadow partial cleanup (not enabled permanently)

   Fixed five real shadows that were either bugs or actively
   misleading:

     * src/boards/476.c: removed an inner "int i" that shadowed the
       outer loop counter.
     * src/boards/mmc5.c MMC5_hb: parameter "scanline" renamed to
       "sl_param" (was shadowing the global "scanline").
     * src/boards/n106.c DoNamcoSound: parameter "Wave" renamed to
       "WaveBuf" (was shadowing the global Wave audio buffer); also
       updated the forward declaration and the matching parameter
       on sound.h's NeoFill function pointer typedef.
     * src/boards/vrc7.c UpdateOPLNEO: same Wave -> WaveBuf rename.
     * src/ntsc/nes_ntsc_impl.h: renamed an inner loop counter "n"
       that shadowed an outer "n".
     * src/drivers/libretro/libretro.c FCEUD_RegionOverride: local
       "pal" renamed to "is_pal" (was shadowing the typedef "pal" from
       palette.h).
     * src/palette.c FCEUI_SetPaletteArray: parameter "pal" renamed
       to "data" (same shadow); driver.h declaration updated to match.

   -Wshadow itself is NOT enabled permanently because the remaining
   warnings are deliberate parameter naming conventions (XBuf in
   draw functions, X in cpu hooks) and third-party blargg ntsc code.

In addition, four files were touched as part of an MSVC-build fix
that came up mid-pass: src/fds.c, src/nsf.c, src/ines.c, and
src/drivers/libretro/libretro_dipswitch.c had snprintf() calls
introduced in pass 4 that fail to link on pre-MSVC2015 toolchains
when STATIC_LINKING=1 (the libretro-common compat_snprintf.c shim
isn't compiled in those configurations). Replaced each snprintf with
either sprintf-into-bounded-buffer (the format strings have known
maximum output) or strlcpy/strlcat for the dipswitch key-build case.
All output is still bounded; truncation happens via strl*'s normal
truncation semantics where applicable.

All added code is C89-clean (top-of-block declarations only, no
mixed decls, no // comments, INLINE macro from fceu-types.h instead
of bare "inline"). Builds clean under -std=gnu11 with -Wno-write-
strings -Wsign-compare -Wundef -Wmissing-prototypes; zero errors,
zero warnings.

Determinism audit (audit_determinism.py): no rand/time/long
double/threads issues introduced.
This commit is contained in:
U-DESKTOP-SPFP6AQ\twistedtechre
2026-05-04 04:44:52 +02:00
parent 492b335705
commit 6359a0b36e
105 changed files with 847 additions and 660 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile.libretro
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@@ -781,7 +781,7 @@ else ifneq (,$(findstring msvc,$(platform)))
WARNING_DEFINES = WARNING_DEFINES =
LIBM := LIBM :=
else else
WARNING_DEFINES = -Wno-write-strings -Wsign-compare WARNING_DEFINES = -Wno-write-strings -Wsign-compare -Wundef -Wmissing-prototypes
endif endif
CFLAGS += $(fpic) $(WARNING_DEFINES) $(DEFINES) $(ENDIANNESS_DEFINES) CFLAGS += $(fpic) $(WARNING_DEFINES) $(DEFINES) $(ENDIANNESS_DEFINES)

2
src/boards/106.c
View File

@@ -78,7 +78,7 @@ static void M106Close(void) {
WRAM = NULL; WRAM = NULL;
} }
void FP_FASTAPASS(1) M106CpuHook(int a) { static void FP_FASTAPASS(1) M106CpuHook(int a) {
if (IRQa) { if (IRQa) {
IRQCount += a; IRQCount += a;
if (IRQCount > 0x10000) { if (IRQCount > 0x10000) {

2
src/boards/116.c
View File

@@ -72,7 +72,7 @@ static void sync (void) {
} }
} }
int Huang2_getPRGBank (uint8_t bank) { static int Huang2_getPRGBank (uint8_t bank) {
return MMC1_getPRGBank(bank) >>1; return MMC1_getPRGBank(bank) >>1;
} }

2
src/boards/134.c
View File

@@ -86,7 +86,7 @@ static void Mapper134_Power(void) {
} }
void Mapper134_Init(CartInfo *info) { void Mapper134_Init(CartInfo *info) {
GenMMC3_Init(info, 256, 256, info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize) /1024: 8, info->battery); GenMMC3_Init(info, 256, 256, CartInfo_PRGRAM_bytes(info, 8 * 1024) / 1024, info->battery);
cwrap = Mapper134_CHRWrap; cwrap = Mapper134_CHRWrap;
pwrap = Mapper134_PRGWrap; pwrap = Mapper134_PRGWrap;
info->Power = Mapper134_Power; info->Power = Mapper134_Power;

4
src/boards/14.c
View File

@@ -44,11 +44,11 @@ static void sync (void) {
} }
} }
int getCHRBank_MMC3 (uint8_t bank) { static int getCHRBank_MMC3 (uint8_t bank) {
return MMC3_getCHRBank(bank) | reg <<(~bank &4? 5: ~bank &2? 3: 1) &0x100; return MMC3_getCHRBank(bank) | reg <<(~bank &4? 5: ~bank &2? 3: 1) &0x100;
} }
int getCHRBank_VRC2 (uint8_t bank) { static int getCHRBank_VRC2 (uint8_t bank) {
return VRC24_getCHRBank(bank) | reg <<(~bank &4? 5: ~bank &2? 3: 1) &0x100; return VRC24_getCHRBank(bank) | reg <<(~bank &4? 5: ~bank &2? 3: 1) &0x100;
} }

2
src/boards/162.c
View File

@@ -106,7 +106,7 @@ void Mapper162_Init (CartInfo *info)
GameStateRestore = StateRestore; GameStateRestore = StateRestore;
AddExState(StateRegs, ~0, 0, 0); AddExState(StateRegs, ~0, 0, 0);
WRAMSIZE = info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize): 8192; WRAMSIZE = CartInfo_PRGRAM_bytes(info, 8192);
WRAM = (uint8_t*) FCEU_gmalloc(WRAMSIZE); WRAM = (uint8_t*) FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");

2
src/boards/163.c
View File

@@ -111,7 +111,7 @@ void Mapper163_Init (CartInfo *info)
GameStateRestore = StateRestore; GameStateRestore = StateRestore;
AddExState(StateRegs, ~0, 0, 0); AddExState(StateRegs, ~0, 0, 0);
WRAMSIZE = info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize): 8192; WRAMSIZE = CartInfo_PRGRAM_bytes(info, 8192);
WRAM = (uint8_t*) FCEU_gmalloc(WRAMSIZE); WRAM = (uint8_t*) FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");

2
src/boards/195.c
View File

@@ -76,7 +76,7 @@ static void Mapper195_Power(void) {
} }
} }
void Mapper195_Close(void) { static void Mapper195_Close(void) {
if (CHRRAM) if (CHRRAM)
FCEU_gfree(CHRRAM); FCEU_gfree(CHRRAM);
CHRRAM = NULL; CHRRAM = NULL;

4
src/boards/234.c
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@@ -39,7 +39,7 @@ static void Sync(void) {
setmirror((bank >> 7) ^ 1); setmirror((bank >> 7) ^ 1);
} }
DECLFR(M234ReadBank) { static DECLFR(M234ReadBank) {
uint8_t r = CartBR(A); uint8_t r = CartBR(A);
if (!bank) { if (!bank) {
bank = r; bank = r;
@@ -48,7 +48,7 @@ DECLFR(M234ReadBank) {
return r; return r;
} }
DECLFR(M234ReadPreg) { static DECLFR(M234ReadPreg) {
uint8_t r = CartBR(A); uint8_t r = CartBR(A);
preg = r; preg = r;
Sync(); Sync();

2
src/boards/268.c
View File

@@ -94,7 +94,7 @@ static void Mapper268_CHRWrap(uint32_t A, uint8_t V) {
setchr1r(CHRRAM && EXPREGS[4] &0x01 && (V &0xFE) ==(EXPREGS[4] &0xFE)? 0x10: 0x00, A, V &chrMaskMMC3 | chrOffset | A >>10 &chrMaskGNROM); setchr1r(CHRRAM && EXPREGS[4] &0x01 && (V &0xFE) ==(EXPREGS[4] &0xFE)? 0x10: 0x00, A, V &chrMaskMMC3 | chrOffset | A >>10 &chrMaskGNROM);
} }
void Mapper268_MirrorWrap(uint8_t V) { static void Mapper268_MirrorWrap(uint8_t V) {
A000B =V; A000B =V;
if ((submapper &~1) ==10 && ~EXPREGS[0] &0x20) if ((submapper &~1) ==10 && ~EXPREGS[0] &0x20)
setmirror(EXPREGS[0] &0x10? MI_1: MI_0); setmirror(EXPREGS[0] &0x10? MI_1: MI_0);

4
src/boards/28.c
View File

@@ -36,7 +36,7 @@ static SFORMAT StateRegs[] = {
{0} {0}
}; };
void SyncMirror() { static void SyncMirror(void) {
switch (mode & 3) { switch (mode & 3) {
case 0: setmirror(MI_0); break; case 0: setmirror(MI_0); break;
case 1: setmirror(MI_1); break; case 1: setmirror(MI_1); break;
@@ -45,7 +45,7 @@ void SyncMirror() {
} }
} }
void Mirror(uint8_t value) static void Mirror(uint8_t value)
{ {
if ((mode & 2) == 0) { if ((mode & 2) == 0) {
mode &= 0xfe; mode &= 0xfe;

2
src/boards/351.c
View File

@@ -85,7 +85,7 @@ static void sync () {
MMC1_syncMirror(); MMC1_syncMirror();
} }
DECLFW (VRC24_trapWriteReg) { /* When A11 is set, VRC4's A0 and A1 are swapped */ static DECLFW (VRC24_trapWriteReg) { /* When A11 is set, VRC4's A0 and A1 are swapped */
if (A &0x800) A = A &~0xF | A >>1 &0x5 | A <<1 &0xA; if (A &0x800) A = A &~0xF | A >>1 &0x5 | A <<1 &0xA;
VRC24_writeReg(A, V); VRC24_writeReg(A, V);
} }

2
src/boards/399.c
View File

@@ -69,7 +69,7 @@ static void power(void) {
void Mapper399_Init(CartInfo *info) { void Mapper399_Init(CartInfo *info) {
submapper =info->submapper; submapper =info->submapper;
GenMMC3_Init(info, 256, 32, info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize) /1024: 8, info->battery); GenMMC3_Init(info, 256, 32, CartInfo_PRGRAM_bytes(info, 8 * 1024) / 1024, info->battery);
cwrap =CHRWrap; cwrap =CHRWrap;
pwrap =PRGWrap; pwrap =PRGWrap;
info->Power =power; info->Power =power;

1
src/boards/476.c
View File

@@ -53,7 +53,6 @@ static DECLFR(remapButtons) {
(result &0x60? 0x02: 0x00) ; /* SELECT/B */ (result &0x60? 0x02: 0x00) ; /* SELECT/B */
} else } else
if (A ==0x4017) { if (A ==0x4017) {
int i;
for (i =0; i <8; i++) { for (i =0; i <8; i++) {
result <<=1; result <<=1;
result |=read4016(0x4016) &1; result |=read4016(0x4016) &1;

2
src/boards/478.c
View File

@@ -71,7 +71,7 @@ static void Reset(void) {
} }
void Mapper478_Init(CartInfo *info) { void Mapper478_Init(CartInfo *info) {
GenMMC3_Init(info, 128, 128, info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize) /1024: 8, info->battery); GenMMC3_Init(info, 128, 128, CartInfo_PRGRAM_bytes(info, 8 * 1024) / 1024, info->battery);
pwrap = PRGWrap; pwrap = PRGWrap;
cwrap = CHRWrap; cwrap = CHRWrap;
info->Power = Power; info->Power = Power;

2
src/boards/480.c
View File

@@ -97,7 +97,7 @@ static void Close(void) {
void Mapper480_Init(CartInfo *info) { void Mapper480_Init(CartInfo *info) {
submapper =info->submapper; submapper =info->submapper;
GenMMC3_Init(info, 256, 256, info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize) /1024: 8, info->battery); GenMMC3_Init(info, 256, 256, CartInfo_PRGRAM_bytes(info, 8 * 1024) / 1024, info->battery);
pwrap = submapper ==2? PRGWrap2: submapper==1? PRGWrap1: PRGWrap0; pwrap = submapper ==2? PRGWrap2: submapper==1? PRGWrap1: PRGWrap0;
cwrap = submapper ==2? CHRWrap2: submapper==1? CHRWrap1: CHRWrap0; cwrap = submapper ==2? CHRWrap2: submapper==1? CHRWrap1: CHRWrap0;
info->Power = Power; info->Power = Power;

2
src/boards/484.c
View File

@@ -41,7 +41,7 @@ static void Power(void) {
} }
void Mapper484_Init(CartInfo *info) { void Mapper484_Init(CartInfo *info) {
GenMMC3_Init(info, 512, 256, info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize) /1024: 8, info->battery); GenMMC3_Init(info, 512, 256, CartInfo_PRGRAM_bytes(info, 8 * 1024) / 1024, info->battery);
pwrap = PRGWrap; pwrap = PRGWrap;
info->Power = Power; info->Power = Power;
AddExState(EXPREGS, 1, 0, "EXPR"); AddExState(EXPREGS, 1, 0, "EXPR");

4
src/boards/525.c
View File

@@ -27,12 +27,12 @@ static void sync () {
VRC24_syncMirror(); VRC24_syncMirror();
} }
DECLFW (UNLKS7021A_writeCHR) { static DECLFW (UNLKS7021A_writeCHR) {
VRC24_writeReg(0xB000 +(A <<11 &0x3000 | A <<1 &0x0002), V &0x0F); VRC24_writeReg(0xB000 +(A <<11 &0x3000 | A <<1 &0x0002), V &0x0F);
VRC24_writeReg(0xB001 +(A <<11 &0x3000 | A <<1 &0x0002), V >>4); VRC24_writeReg(0xB001 +(A <<11 &0x3000 | A <<1 &0x0002), V >>4);
} }
void UNLKS7021A_power (void) { static void UNLKS7021A_power (void) {
VRC24_power(); VRC24_power();
SetWriteHandler(0xB000, 0xEFFF, UNLKS7021A_writeCHR); SetWriteHandler(0xB000, 0xEFFF, UNLKS7021A_writeCHR);
} }

4
src/boards/542.c
View File

@@ -36,7 +36,7 @@ static void sync () {
if (reg &1) setchr1r(0x10, 0x0C00, 1); if (reg &1) setchr1r(0x10, 0x0C00, 1);
} }
DECLFW (writeExtra) { static DECLFW (writeExtra) {
if (A &0x800) { if (A &0x800) {
reg =A >>12; reg =A >>12;
sync(); sync();
@@ -45,7 +45,7 @@ DECLFW (writeExtra) {
} }
void power (void) { static void power (void) {
reg =0; reg =0;
VRC24_power(); VRC24_power();
SetReadHandler(0x6000, 0x7FFF, CartBR); SetReadHandler(0x6000, 0x7FFF, CartBR);

2
src/boards/65.c
View File

@@ -80,7 +80,7 @@ static void M65Power(void) {
SetWriteHandler(0x8000, 0xFFFF, M65Write); SetWriteHandler(0x8000, 0xFFFF, M65Write);
} }
void FP_FASTAPASS(1) M65IRQ(int a) { static void FP_FASTAPASS(1) M65IRQ(int a) {
if (IRQa) { if (IRQa) {
IRQCount -= a; IRQCount -= a;
if (IRQCount < -4) { if (IRQCount < -4) {

2
src/boards/67.c
View File

@@ -81,7 +81,7 @@ static void M67Power(void) {
SetWriteHandler(0x8000, 0xFFFF, M67Write); SetWriteHandler(0x8000, 0xFFFF, M67Write);
} }
void FP_FASTAPASS(1) M67IRQ(int a) { static void FP_FASTAPASS(1) M67IRQ(int a) {
if (IRQa) { if (IRQa) {
IRQCount -= a; IRQCount -= a;
if (IRQCount <= 0) { if (IRQCount <= 0) {

2
src/boards/69.c
View File

@@ -247,7 +247,7 @@ static void AYHiSync(int32_t ts) {
CAYBC[x] = ts; CAYBC[x] = ts;
} }
void Mapper69_ESI(void) { static void Mapper69_ESI(void) {
GameExpSound.RChange = Mapper69_ESI; GameExpSound.RChange = Mapper69_ESI;
GameExpSound.HiSync = AYHiSync; GameExpSound.HiSync = AYHiSync;
memset(dcount, 0, sizeof(dcount)); memset(dcount, 0, sizeof(dcount));

2
src/boards/82_552.c
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@@ -35,7 +35,7 @@ static SFORMAT StateRegs[] =
{ 0 } { 0 }
}; };
uint8_t prgBits (uint8_t val) { static uint8_t prgBits (uint8_t val) {
if (is552) if (is552)
return val >>5 &0x01 | val >>3 &0x02 | val >>1 &0x04 | val <<1 &0x08 | val <<3 &0x10 | val <<5 &0x20; return val >>5 &0x01 | val >>3 &0x02 | val >>1 &0x04 | val <<1 &0x08 | val <<3 &0x10 | val <<5 &0x20;
else else

9
src/boards/83_264.c
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@@ -156,7 +156,7 @@ static DECLFW (writeReg) {
} }
} }
void clockCounter (void) { static void clockCounter (void) {
uint16_t counter = reg[2] | reg[3] <<8; uint16_t counter = reg[2] | reg[3] <<8;
if (flags &0x80 && counter) { if (flags &0x80 && counter) {
if (reg[1] &0x40) if (reg[1] &0x40)
@@ -172,11 +172,11 @@ void clockCounter (void) {
reg[3] = counter >>8 &0xFF; reg[3] = counter >>8 &0xFF;
} }
void FP_FASTAPASS(1) cycleCounter (int a) { static void FP_FASTAPASS(1) cycleCounter (int a) {
while (a--) if (~flags &0x40) clockCounter(); while (a--) if (~flags &0x40) clockCounter();
} }
void scanlineCounter() { static void scanlineCounter() {
if (flags &0x40) { if (flags &0x40) {
clockCounter(); clockCounter();
clockCounter(); clockCounter();
@@ -211,7 +211,8 @@ static void power () {
sync(); sync();
} }
void restore (int version) { static void restore (int version) {
(void)version;
sync(); sync();
} }

2
src/boards/__dummy_mapper.c
View File

@@ -73,7 +73,7 @@ static void StateRestore(int version) {
Sync(); Sync();
} }
void MapperNNN_Init(CartInfo *info) { static void MapperNNN_Init(CartInfo *info) {
info->Reset = MNNNReset; info->Reset = MNNNReset;
info->Power = MNNNPower; info->Power = MNNNPower;
/* info->Close = MNNNClose; */ /* info->Close = MNNNClose; */

10
src/boards/addrlatch.c
View File

@@ -188,7 +188,7 @@ static void M61Sync(void) {
setmirror(((latche >> 7) & 1) ^ 1); setmirror(((latche >> 7) & 1) ^ 1);
} }
void Mapper61_Reset() { static void Mapper61_Reset() {
latche =0; latche =0;
RAM[0x1A] =0; RAM[0x1A] =0;
RAM[0x1B] =0; RAM[0x1B] =0;
@@ -640,7 +640,7 @@ static void BMC810544CA1Sync(void) {
setmirror(((latche >> 4) & 1) ^ 1); setmirror(((latche >> 4) & 1) ^ 1);
} }
void BMC810544CA1Reset() { static void BMC810544CA1Reset() {
latche =0; latche =0;
RAM[0x133] =0; RAM[0x133] =0;
BMC810544CA1Sync(); BMC810544CA1Sync();
@@ -784,13 +784,13 @@ static void M435Sync(void) {
SetReadHandler(0x8000, 0xFFFF, ~latche &0x200 && latche &(submapper == 1? 0x001: 0x400) && dipswitch &1? ReadOB: CartBR); SetReadHandler(0x8000, 0xFFFF, ~latche &0x200 && latche &(submapper == 1? 0x001: 0x400) && dipswitch &1? ReadOB: CartBR);
} }
void Mapper435_Power() { static void Mapper435_Power() {
LatchPower(); LatchPower();
dipswitch = 0; dipswitch = 0;
M435Sync(); M435Sync();
} }
void Mapper435_Reset() { static void Mapper435_Reset() {
latche = 0; latche = 0;
dipswitch++; dipswitch++;
M435Sync(); M435Sync();
@@ -836,7 +836,7 @@ static void M464Sync(void) {
setmirror(latche &0x20? MI_H: MI_V); setmirror(latche &0x20? MI_H: MI_V);
} }
void Mapper464_reset () { static void Mapper464_reset () {
RAM[0x133] = 0; RAM[0x133] = 0;
latche = 0; latche = 0;
M464Sync(); M464Sync();

8
src/boards/asic_fme7.c
View File

@@ -54,7 +54,7 @@ void FME7_syncCHR (int AND, int OR) {
setchr1(0x1C00, FME7_reg[7] &AND | OR); setchr1(0x1C00, FME7_reg[7] &AND | OR);
} }
void FME7_syncMirror () { void FME7_syncMirror(void) {
setmirror(FME7_reg[12] &2? (FME7_reg[12] &1? MI_1: MI_0): FME7_reg[12] &1? MI_H: MI_V); setmirror(FME7_reg[12] &2? (FME7_reg[12] &1? MI_1: MI_0): FME7_reg[12] &1? MI_H: MI_V);
} }
@@ -84,7 +84,7 @@ void FP_FASTAPASS(1) FME7_cpuCycle (int a) {
} }
} }
void FME7_clear () { void FME7_clear(void) {
int i; int i;
for (i = 0; i < 16; i++) FME7_reg[i] = 0; for (i = 0; i < 16; i++) FME7_reg[i] = 0;
FME7_cbSync(); FME7_cbSync();
@@ -111,7 +111,7 @@ void FME7_activate (uint8_t clear, void (*sync)()) {
FME7_cbSync(); FME7_cbSync();
} }
void FME7_addExState () { void FME7_addExState(void) {
AddExState(FME7_stateRegs, ~0, 0, 0); AddExState(FME7_stateRegs, ~0, 0, 0);
} }
@@ -119,7 +119,7 @@ void FME7_restore (int version) {
FME7_cbSync(); FME7_cbSync();
} }
void FME7_power () { void FME7_power(void) {
FME7_setHandlers(); FME7_setHandlers();
FME7_clear(); FME7_clear();
} }

8
src/boards/asic_fme7.h
View File

@@ -24,16 +24,16 @@
void FME7_syncWRAM (int); void FME7_syncWRAM (int);
void FME7_syncPRG (int, int); void FME7_syncPRG (int, int);
void FME7_syncCHR (int, int); void FME7_syncCHR (int, int);
void FME7_syncMirror (); void FME7_syncMirror(void);
DECLFR (FME7_readWRAM); DECLFR (FME7_readWRAM);
DECLFW (FME7_writeWRAM); DECLFW (FME7_writeWRAM);
DECLFW (FME7_writeReg); DECLFW (FME7_writeReg);
void FP_FASTAPASS(1) FME7_cpuCycle (int); void FP_FASTAPASS(1) FME7_cpuCycle (int);
void FME7_clear (); void FME7_clear(void);
void FME7_activate (uint8_t, void (*)()); void FME7_activate (uint8_t, void (*)());
void FME7_addExState (); void FME7_addExState(void);
void FME7_restore (int); void FME7_restore (int);
void FME7_power (); void FME7_power(void);
void FME7_init (CartInfo *, void (*)()); void FME7_init (CartInfo *, void (*)());
#endif #endif

10
src/boards/asic_h3001.c
View File

@@ -64,7 +64,7 @@ void H3001_syncCHR (int AND, int OR) {
setchr1(0x1C00, H3001_chr[7]); setchr1(0x1C00, H3001_chr[7]);
} }
void H3001_syncMirror () { void H3001_syncMirror(void) {
setmirror(H3001_nt &0x40? (H3001_nt &0x80? MI_1: MI_0): H3001_nt &0x80? MI_H: MI_V); setmirror(H3001_nt &0x40? (H3001_nt &0x80? MI_1: MI_0): H3001_nt &0x80? MI_H: MI_V);
} }
@@ -107,14 +107,14 @@ DECLFW (H3001_write) {
} }
} }
void FP_FASTAPASS(1) H3001_cpuCycle (int a) { static void FP_FASTAPASS(1) H3001_cpuCycle (int a) {
while (a--) if (H3001_irq &0x80 && !--H3001_count) { while (a--) if (H3001_irq &0x80 && !--H3001_count) {
X6502_IRQBegin(FCEU_IQEXT); X6502_IRQBegin(FCEU_IQEXT);
H3001_irq = 0; H3001_irq = 0;
} }
} }
void H3001_clear () { void H3001_clear(void) {
int i; int i;
for (i = 0; i < 2; i++) H3001_prg[i] = i; for (i = 0; i < 2; i++) H3001_prg[i] = i;
for (i = 0; i < 8; i++) H3001_chr[i] = i; for (i = 0; i < 8; i++) H3001_chr[i] = i;
@@ -143,7 +143,7 @@ void H3001_activate (uint8_t clear, void (*sync)()) {
} }
void H3001_addExState () { void H3001_addExState(void) {
AddExState(H3001_state, ~0, 0, 0); AddExState(H3001_state, ~0, 0, 0);
} }
@@ -151,7 +151,7 @@ void H3001_restore (int version) {
H3001_cbSync(); H3001_cbSync();
} }
void H3001_power () { void H3001_power(void) {
H3001_setHandlers(); H3001_setHandlers();
H3001_clear(); H3001_clear();
} }

8
src/boards/asic_h3001.h
View File

@@ -23,13 +23,13 @@
void H3001_syncPRG (int, int); void H3001_syncPRG (int, int);
void H3001_syncCHR (int, int); void H3001_syncCHR (int, int);
void H3001_syncMirror (); void H3001_syncMirror(void);
DECLFW (H3001_write); DECLFW (H3001_write);
void H3001_clear (); void H3001_clear(void);
void H3001_activate (uint8_t, void (*)()); void H3001_activate (uint8_t, void (*)());
void H3001_addExState (); void H3001_addExState(void);
void H3001_restore (int); void H3001_restore (int);
void H3001_power (); void H3001_power(void);
void H3001_init (CartInfo *, void (*)()); void H3001_init (CartInfo *, void (*)());
#endif #endif

6
src/boards/asic_latch.c
View File

@@ -41,7 +41,7 @@ DECLFW (Latch_write) {
Latch_cbSync(); Latch_cbSync();
} }
void Latch_clear () { void Latch_clear(void) {
Latch_address = 0; Latch_address = 0;
Latch_data = 0; Latch_data = 0;
Latch_cbSync(); Latch_cbSync();
@@ -69,7 +69,7 @@ void Latch_activate (uint8_t clear, void (*sync)(), uint16_t from, uint16_t to,
Latch_cbSync(); Latch_cbSync();
} }
void Latch_addExState () { void Latch_addExState(void) {
AddExState(Latch_state, ~0, 0, 0); AddExState(Latch_state, ~0, 0, 0);
} }
@@ -77,7 +77,7 @@ void Latch_restore (int version) {
Latch_cbSync(); Latch_cbSync();
} }
void Latch_power () { void Latch_power(void) {
Latch_setHandlers(); Latch_setHandlers();
Latch_clear(); Latch_clear();
} }

6
src/boards/asic_latch.h
View File

@@ -25,10 +25,10 @@ extern uint16_t Latch_address;
extern uint8_t Latch_data; extern uint8_t Latch_data;
DECLFW (Latch_write); DECLFW (Latch_write);
void Latch_addExState (); void Latch_addExState(void);
void Latch_restore (int); void Latch_restore (int);
void Latch_clear (); void Latch_clear(void);
void Latch_power (); void Latch_power(void);
void Latch_activate (uint8_t, void (*)(), uint16_t, uint16_t, void (*)(uint16_t*, uint8_t*, uint8_t)); void Latch_activate (uint8_t, void (*)(), uint16_t, uint16_t, void (*)(uint16_t*, uint8_t*, uint8_t));
void Latch6_activate (uint8_t, void (*)(), uint16_t, uint16_t, void (*)(uint16_t*, uint8_t*, uint8_t)); void Latch6_activate (uint8_t, void (*)(), uint16_t, uint16_t, void (*)(uint16_t*, uint8_t*, uint8_t));
void Latch_init (CartInfo *, void (*)(), uint16_t, uint16_t, void (*)(uint16_t*, uint8_t*, uint8_t)); void Latch_init (CartInfo *, void (*)(), uint16_t, uint16_t, void (*)(uint16_t*, uint8_t*, uint8_t));

12
src/boards/asic_mmc1.c
View File

@@ -64,14 +64,14 @@ int MMC1_getCHRBank (uint8_t bank) {
return MMC1_reg[1] &~1 |bank; return MMC1_reg[1] &~1 |bank;
} }
DECLFR (MMC1_readWRAM) { static DECLFR (MMC1_readWRAM) {
if (MMC1_type == MMC1_TYPE_MMC1A || ~MMC1_reg[3] &0x10) if (MMC1_type == MMC1_TYPE_MMC1A || ~MMC1_reg[3] &0x10)
return MMC1_cbReadWRAM? MMC1_cbReadWRAM(A): CartBR(A); return MMC1_cbReadWRAM? MMC1_cbReadWRAM(A): CartBR(A);
else else
return A >>8; return A >>8;
} }
DECLFW (MMC1_writeWRAM) { static DECLFW (MMC1_writeWRAM) {
if (MMC1_type == MMC1_TYPE_MMC1A || ~MMC1_reg[3] &0x10) { if (MMC1_type == MMC1_TYPE_MMC1A || ~MMC1_reg[3] &0x10) {
CartBW(A, V); CartBW(A, V);
if (MMC1_cbWriteWRAM) MMC1_cbWriteWRAM(A, V); if (MMC1_cbWriteWRAM) MMC1_cbWriteWRAM(A, V);
@@ -88,7 +88,7 @@ void MMC1_syncCHR (int AND, int OR) {
setchr4(0x1000, MMC1_cbGetCHRBank(1) &AND |OR); setchr4(0x1000, MMC1_cbGetCHRBank(1) &AND |OR);
} }
void MMC1_syncMirror () { void MMC1_syncMirror(void) {
setmirror(MMC1_reg[0] &2? (MMC1_reg[0] &1? MI_H: MI_V): (MMC1_reg[0] &1? MI_1: MI_0)); setmirror(MMC1_reg[0] &2? (MMC1_reg[0] &1? MI_H: MI_V): (MMC1_reg[0] &1? MI_1: MI_0));
} }
@@ -115,7 +115,7 @@ DECLFW (MMC1_writeReg) {
MMC1_filter = 2; MMC1_filter = 2;
} }
void MMC1_clear () { void MMC1_clear(void) {
MMC1_reg[0] = 0x0C; MMC1_reg[1] = 0; MMC1_reg[2] = 0; MMC1_reg[3] = 0; /* "Bad News Baseball" is sensitive to the initial CHR bank register content. 0/0 seems to work. */ MMC1_reg[0] = 0x0C; MMC1_reg[1] = 0; MMC1_reg[2] = 0; MMC1_reg[3] = 0; /* "Bad News Baseball" is sensitive to the initial CHR bank register content. 0/0 seems to work. */
MMC1_bits = 0; MMC1_shift = 0; MMC1_filter = 0; MMC1_bits = 0; MMC1_shift = 0; MMC1_filter = 0;
MMC1_cbSync(); MMC1_cbSync();
@@ -147,7 +147,7 @@ void MMC1_activate (uint8_t clear, void (*sync)(), uint8_t type, int (*prg)(uint
MMC1_cbSync(); MMC1_cbSync();
} }
void MMC1_addExState () { void MMC1_addExState(void) {
AddExState(MMC1_state, ~0, 0, 0); AddExState(MMC1_state, ~0, 0, 0);
} }
@@ -155,7 +155,7 @@ void MMC1_restore (int version) {
MMC1_cbSync(); MMC1_cbSync();
} }
void MMC1_power () { void MMC1_power(void) {
MMC1_setHandlers(); MMC1_setHandlers();
MMC1_clear(); MMC1_clear();
} }

8
src/boards/asic_mmc1.h
View File

@@ -29,13 +29,13 @@ int MMC1_getPRGBank (uint8_t);
int MMC1_getCHRBank (uint8_t); int MMC1_getCHRBank (uint8_t);
void MMC1_syncPRG (int, int); void MMC1_syncPRG (int, int);
void MMC1_syncCHR (int, int); void MMC1_syncCHR (int, int);
void MMC1_syncMirror (); void MMC1_syncMirror(void);
void FP_FASTAPASS(1) MMC1_cpuCycle(int); void FP_FASTAPASS(1) MMC1_cpuCycle(int);
DECLFW (MMC1_writeReg); DECLFW (MMC1_writeReg);
void MMC1_clear (); void MMC1_clear(void);
void MMC1_addExState (); void MMC1_addExState(void);
void MMC1_restore (int); void MMC1_restore (int);
void MMC1_power (); void MMC1_power(void);
void MMC1_activate (uint8_t, void (*)(), uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*))); void MMC1_activate (uint8_t, void (*)(), uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)));
void MMC1_init (CartInfo *, void (*)(), uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*))); void MMC1_init (CartInfo *, void (*)(), uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)));

8
src/boards/asic_mmc2and4.c
View File

@@ -54,7 +54,7 @@ void MMC24_syncCHR (int AND, int OR) {
setchr4(0x1000, MMC24_reg[3 +MMC24_latch[1]] &AND |OR); setchr4(0x1000, MMC24_reg[3 +MMC24_latch[1]] &AND |OR);
} }
void MMC24_syncMirror () { void MMC24_syncMirror(void) {
setmirror(MMC24_reg[5] &1? MI_H: MI_V); setmirror(MMC24_reg[5] &1? MI_H: MI_V);
} }
@@ -70,7 +70,7 @@ DECLFW (MMC24_write) {
MMC24_cbSync(); MMC24_cbSync();
} }
void MMC24_clear () { void MMC24_clear(void) {
MMC24_reg[0] = 0; MMC24_reg[1] = 0; MMC24_reg[2] = 2; MMC24_reg[3] = 0; MMC24_reg[4] = 0; MMC24_reg[5] = 0; MMC24_reg[0] = 0; MMC24_reg[1] = 0; MMC24_reg[2] = 2; MMC24_reg[3] = 0; MMC24_reg[4] = 0; MMC24_reg[5] = 0;
MMC24_latch[0] = 0; MMC24_latch[1] = 0; MMC24_latch[0] = 0; MMC24_latch[1] = 0;
MMC24_cbSync(); MMC24_cbSync();
@@ -95,7 +95,7 @@ void MMC24_activate (uint8_t clear, void (*sync)()) {
MMC24_cbSync(); MMC24_cbSync();
} }
void MMC24_addExState () { void MMC24_addExState(void) {
AddExState(MMC24_state, ~0, 0, 0); AddExState(MMC24_state, ~0, 0, 0);
} }
@@ -103,7 +103,7 @@ void MMC24_restore (int version) {
MMC24_cbSync(); MMC24_cbSync();
} }
void MMC24_power () { void MMC24_power(void) {
MMC24_setHandlers(); MMC24_setHandlers();
MMC24_clear(); MMC24_clear();
} }

8
src/boards/asic_mmc2and4.h
View File

@@ -25,12 +25,12 @@ void MMC24_syncWRAM (int);
void MMC2_syncPRG (int, int); void MMC2_syncPRG (int, int);
void MMC4_syncPRG (int, int); void MMC4_syncPRG (int, int);
void MMC24_syncCHR (int, int); void MMC24_syncCHR (int, int);
void MMC24_syncMirror (); void MMC24_syncMirror(void);
DECLFW (MMC24_write); DECLFW (MMC24_write);
void MMC24_clear (); void MMC24_clear(void);
void MMC24_power (); void MMC24_power(void);
void MMC24_restore (int); void MMC24_restore (int);
void MMC24_addExState (); void MMC24_addExState(void);
void MMC24_activate (uint8_t, void (*)()); void MMC24_activate (uint8_t, void (*)());
void MMC24_init (CartInfo *, void (*)()); void MMC24_init (CartInfo *, void (*)());

16
src/boards/asic_mmc3.c
View File

@@ -68,14 +68,14 @@ uint8_t MMC3_getMirroring (void) {
return MMC3_mirroring; return MMC3_mirroring;
} }
DECLFR (MMC3_readWRAM) { static DECLFR (MMC3_readWRAM) {
if (MMC3_wramControl &0x80 || MMC3_type == MMC3_TYPE_AX5202P || MMC3_type == MMC3_TYPE_MMC6) if (MMC3_wramControl &0x80 || MMC3_type == MMC3_TYPE_AX5202P || MMC3_type == MMC3_TYPE_MMC6)
return MMC3_cbReadWRAM? MMC3_cbReadWRAM(A): CartBR(A); return MMC3_cbReadWRAM? MMC3_cbReadWRAM(A): CartBR(A);
else else
return A >>8; return A >>8;
} }
DECLFW (MMC3_writeWRAM) { static DECLFW (MMC3_writeWRAM) {
if ((MMC3_wramControl &0x80 || MMC3_type == MMC3_TYPE_AX5202P) && ~MMC3_wramControl &0x40 || MMC3_type == MMC3_TYPE_MMC6) { if ((MMC3_wramControl &0x80 || MMC3_type == MMC3_TYPE_AX5202P) && ~MMC3_wramControl &0x40 || MMC3_type == MMC3_TYPE_MMC6) {
CartBW(A, V); CartBW(A, V);
if (MMC3_cbWriteWRAM) MMC3_cbWriteWRAM(A, V); if (MMC3_cbWriteWRAM) MMC3_cbWriteWRAM(A, V);
@@ -101,11 +101,11 @@ void MMC3_syncCHR (int AND, int OR) {
for (bank = 0; bank < 8; bank++) setchr1(bank <<10, MMC3_cbGetCHRBank(bank) &AND |OR); for (bank = 0; bank < 8; bank++) setchr1(bank <<10, MMC3_cbGetCHRBank(bank) &AND |OR);
} }
void MMC3_syncMirror () { void MMC3_syncMirror(void) {
setmirror(MMC3_mirroring &1? MI_H: MI_V); setmirror(MMC3_mirroring &1? MI_H: MI_V);
} }
void MMC3_clockCounter () { void MMC3_clockCounter(void) {
uint8_t prevCounter = MMC3_counter; uint8_t prevCounter = MMC3_counter;
if (MMC3_reloadRequest || !MMC3_counter) if (MMC3_reloadRequest || !MMC3_counter)
MMC3_counter = MMC3_reloadValue; MMC3_counter = MMC3_reloadValue;
@@ -115,7 +115,7 @@ void MMC3_clockCounter () {
MMC3_reloadRequest = 0; MMC3_reloadRequest = 0;
} }
void MMC3_clockCounter_KickMaster () { void MMC3_clockCounter_KickMaster(void) {
if (scanline == 238) MMC3_clockCounter(); if (scanline == 238) MMC3_clockCounter();
MMC3_clockCounter(); MMC3_clockCounter();
} }
@@ -134,7 +134,7 @@ DECLFW(MMC3_writeReg) {
if (A <0xC000) MMC3_cbSync(); if (A <0xC000) MMC3_cbSync();
} }
void MMC3_clear () { void MMC3_clear(void) {
MMC3_reg[0] = 0; MMC3_reg[1] = 2; MMC3_reg[2] = 4; MMC3_reg[3] = 5; MMC3_reg[4] = 6; MMC3_reg[5] = 7; MMC3_reg[6] = 0; MMC3_reg[7] = 1; MMC3_reg[0] = 0; MMC3_reg[1] = 2; MMC3_reg[2] = 4; MMC3_reg[3] = 5; MMC3_reg[4] = 6; MMC3_reg[5] = 7; MMC3_reg[6] = 0; MMC3_reg[7] = 1;
MMC3_index = MMC3_mirroring = MMC3_wramControl = MMC3_reloadValue = MMC3_reloadRequest = MMC3_irqEnable = MMC3_counter = 0; MMC3_index = MMC3_mirroring = MMC3_wramControl = MMC3_reloadValue = MMC3_reloadRequest = MMC3_irqEnable = MMC3_counter = 0;
MMC3_cbSync(); MMC3_cbSync();
@@ -166,7 +166,7 @@ void MMC3_activate (uint8_t clear, void (*sync)(), uint8_t type, int (*prg)(uint
MMC3_cbSync(); MMC3_cbSync();
} }
void MMC3_addExState () { void MMC3_addExState(void) {
AddExState(MMC3_state, ~0, 0, 0); AddExState(MMC3_state, ~0, 0, 0);
} }
@@ -174,7 +174,7 @@ void MMC3_restore (int version) {
MMC3_cbSync(); MMC3_cbSync();
} }
void MMC3_power () { void MMC3_power(void) {
MMC3_setHandlers(); MMC3_setHandlers();
MMC3_clear(); MMC3_clear();
} }

12
src/boards/asic_mmc3.h
View File

@@ -33,15 +33,15 @@ int MMC3_getCHRBank (uint8_t);
uint8_t MMC3_getMirroring (void); uint8_t MMC3_getMirroring (void);
void MMC3_syncPRG (int, int); void MMC3_syncPRG (int, int);
void MMC3_syncCHR (int, int); void MMC3_syncCHR (int, int);
void MMC3_syncMirror (); void MMC3_syncMirror(void);
void MMC3_clockCounter (); void MMC3_clockCounter(void);
void MMC3_clockCounter_KickMaster (); void MMC3_clockCounter_KickMaster(void);
DECLFW (MMC3_writeReg); DECLFW (MMC3_writeReg);
void MMC3_clear (); void MMC3_clear(void);
void MMC3_activate (uint8_t, void (*)(), uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*))); void MMC3_activate (uint8_t, void (*)(), uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)));
void MMC3_addExState(); void MMC3_addExState(void);
void MMC3_restore (int); void MMC3_restore (int);
void MMC3_power (); void MMC3_power(void);
void MMC3_init (CartInfo *, void (*)(), uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*))); void MMC3_init (CartInfo *, void (*)(), uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)));
#endif #endif

6
src/boards/asic_n118.c
View File

@@ -59,7 +59,7 @@ DECLFW (N118_writeReg) {
N118_index = V; N118_index = V;
} }
void N118_clear () { void N118_clear(void) {
N118_reg[0] = 0; N118_reg[1] = 2; N118_reg[2] = 4; N118_reg[3] = 5; N118_reg[4] = 6; N118_reg[5] = 7; N118_reg[6] = 0; N118_reg[7] = 1; N118_reg[0] = 0; N118_reg[1] = 2; N118_reg[2] = 4; N118_reg[3] = 5; N118_reg[4] = 6; N118_reg[5] = 7; N118_reg[6] = 0; N118_reg[7] = 1;
N118_index = 0; N118_index = 0;
N118_cbSync(); N118_cbSync();
@@ -86,7 +86,7 @@ void N118_activate (uint8_t clear, void (*sync)(), int (*prg)(uint8_t), int (*ch
N118_cbSync(); N118_cbSync();
} }
void N118_addExState () { void N118_addExState(void) {
AddExState(N118_state, ~0, 0, 0); AddExState(N118_state, ~0, 0, 0);
} }
@@ -94,7 +94,7 @@ void N118_restore (int version) {
N118_cbSync(); N118_cbSync();
} }
void N118_power () { void N118_power(void) {
N118_setHandlers(); N118_setHandlers();
N118_clear(); N118_clear();
} }

6
src/boards/asic_n118.h
View File

@@ -26,11 +26,11 @@ int N118_getCHRBank (uint8_t);
void N118_syncPRG (int, int); void N118_syncPRG (int, int);
void N118_syncCHR (int, int); void N118_syncCHR (int, int);
DECLFW (N118_writeReg); DECLFW (N118_writeReg);
void N118_clear (); void N118_clear(void);
void N118_activate (uint8_t, void (*)(), int (*)(uint8_t), int (*)(uint8_t)); void N118_activate (uint8_t, void (*)(), int (*)(uint8_t), int (*)(uint8_t));
void N118_addExState(); void N118_addExState(void);
void N118_restore (int); void N118_restore (int);
void N118_power (); void N118_power(void);
void N118_init (CartInfo *, void (*)(), int (*)(uint8_t), int (*)(uint8_t)); void N118_init (CartInfo *, void (*)(), int (*)(uint8_t), int (*)(uint8_t));
#endif #endif

8
src/boards/asic_pt8154.c
View File

@@ -40,7 +40,7 @@ void PT8154_syncCHR (int AND, int OR) {
MMC3_syncCHR(AND, OR &~AND); MMC3_syncCHR(AND, OR &~AND);
} }
void PT8154_syncMirror () { void PT8154_syncMirror(void) {
MMC3_syncMirror(); MMC3_syncMirror();
} }
@@ -56,7 +56,7 @@ DECLFW (PT8154_writeWRAM) {
PT8154_cbSync(); PT8154_cbSync();
} }
void PT8154_clear () { void PT8154_clear(void) {
PT8154_reg = 0; PT8154_reg = 0;
PT8154_cbSync(); PT8154_cbSync();
} }
@@ -79,7 +79,7 @@ void PT8154_activate (uint8_t clear, void (*sync)()) {
PT8154_cbSync(); PT8154_cbSync();
} }
void PT8154_addExState () { void PT8154_addExState(void) {
AddExState(PT8154_state, ~0, 0, 0); AddExState(PT8154_state, ~0, 0, 0);
} }
@@ -87,7 +87,7 @@ void PT8154_restore (int version) {
PT8154_cbSync(); PT8154_cbSync();
} }
void PT8154_power () { void PT8154_power(void) {
MMC3_power(); MMC3_power();
PT8154_setHandlers(); PT8154_setHandlers();
PT8154_clear(); PT8154_clear();

8
src/boards/asic_pt8154.h
View File

@@ -23,14 +23,14 @@
void PT8154_syncPRG (int, int); void PT8154_syncPRG (int, int);
void PT8154_syncCHR (int, int); void PT8154_syncCHR (int, int);
void PT8154_syncMirror (); void PT8154_syncMirror(void);
DECLFW (PT8154_writeExtra); DECLFW (PT8154_writeExtra);
DECLFW (PT8154_writeWRAM); DECLFW (PT8154_writeWRAM);
void PT8154_clear (); void PT8154_clear(void);
void PT8154_activate (uint8_t, void (*)()); void PT8154_activate (uint8_t, void (*)());
void PT8154_addExState (); void PT8154_addExState(void);
void PT8154_restore (int); void PT8154_restore (int);
void PT8154_power (); void PT8154_power(void);
void PT8154_init (CartInfo *, void (*)()); void PT8154_init (CartInfo *, void (*)());
#endif #endif

10
src/boards/asic_qj.c
View File

@@ -38,16 +38,16 @@ void QJ_syncCHR (int AND, int OR) {
MMC3_syncCHR(0x7F &AND, QJ_reg <<7 &AND | OR &~AND); MMC3_syncCHR(0x7F &AND, QJ_reg <<7 &AND | OR &~AND);
} }
void QJ_syncMirror () { void QJ_syncMirror(void) {
MMC3_syncMirror(); MMC3_syncMirror();
} }
DECLFW (QJ_writeWRAM) { static DECLFW (QJ_writeWRAM) {
QJ_reg = V; QJ_reg = V;
QJ_cbSync(); QJ_cbSync();
} }
void QJ_clear () { void QJ_clear(void) {
QJ_reg = 0; QJ_reg = 0;
QJ_cbSync(); QJ_cbSync();
} }
@@ -69,7 +69,7 @@ void QJ_activate (uint8_t clear, void (*sync)()) {
QJ_cbSync(); QJ_cbSync();
} }
void QJ_addExState () { void QJ_addExState(void) {
AddExState(QJ_state, ~0, 0, 0); AddExState(QJ_state, ~0, 0, 0);
} }
@@ -77,7 +77,7 @@ void QJ_restore (int version) {
QJ_cbSync(); QJ_cbSync();
} }
void QJ_power () { void QJ_power(void) {
MMC3_power(); MMC3_power();
QJ_setHandlers(); QJ_setHandlers();
QJ_clear(); QJ_clear();

8
src/boards/asic_qj.h
View File

@@ -24,13 +24,13 @@
void QJ_syncWRAM (int); void QJ_syncWRAM (int);
void QJ_syncPRG (int, int); void QJ_syncPRG (int, int);
void QJ_syncCHR (int, int); void QJ_syncCHR (int, int);
void QJ_syncMirror (); void QJ_syncMirror(void);
DECLFW (QJ_write); DECLFW (QJ_write);
void QJ_clear (); void QJ_clear(void);
void QJ_activate (uint8_t, void (*)()); void QJ_activate (uint8_t, void (*)());
void QJ_addExState (); void QJ_addExState(void);
void QJ_restore (int); void QJ_restore (int);
void QJ_power (); void QJ_power(void);
void QJ_init (CartInfo *, void (*)()); void QJ_init (CartInfo *, void (*)());
#endif #endif

8
src/boards/asic_tc3294.c
View File

@@ -48,7 +48,7 @@ void TC3294_syncCHR (int AND, int OR) {
MMC3_syncCHR(chrAND &AND, chrOR &~chrAND &AND | OR &~AND); MMC3_syncCHR(chrAND &AND, chrOR &~chrAND &AND | OR &~AND);
} }
void TC3294_syncMirror () { void TC3294_syncMirror(void) {
MMC3_syncMirror(); MMC3_syncMirror();
} }
@@ -59,7 +59,7 @@ DECLFW(TC3294_writeReg) {
} }
} }
void TC3294_clear () { void TC3294_clear(void) {
TC3294_reg[0] = 0x00; TC3294_reg[1] = 0x00; TC3294_reg[2] = 0x0F; TC3294_reg[3] = 0x00; TC3294_reg[0] = 0x00; TC3294_reg[1] = 0x00; TC3294_reg[2] = 0x0F; TC3294_reg[3] = 0x00;
TC3294_index = 0; TC3294_index = 0;
TC3294_cbSync(); TC3294_cbSync();
@@ -82,7 +82,7 @@ void TC3294_activate (uint8_t clear, void (*sync)()) {
TC3294_cbSync(); TC3294_cbSync();
} }
void TC3294_addExState () { void TC3294_addExState(void) {
AddExState(TC3294_state, ~0, 0, 0); AddExState(TC3294_state, ~0, 0, 0);
} }
@@ -90,7 +90,7 @@ void TC3294_restore (int version) {
TC3294_cbSync(); TC3294_cbSync();
} }
void TC3294_power () { void TC3294_power(void) {
MMC3_power(); MMC3_power();
TC3294_setHandlers(); TC3294_setHandlers();
TC3294_clear(); TC3294_clear();

8
src/boards/asic_tc3294.h
View File

@@ -25,13 +25,13 @@ extern uint8_t TC3294_reg[4];
void TC3294_syncWRAM (int); void TC3294_syncWRAM (int);
void TC3294_syncPRG (int, int); void TC3294_syncPRG (int, int);
void TC3294_syncCHR (int, int); void TC3294_syncCHR (int, int);
void TC3294_syncMirror (); void TC3294_syncMirror(void);
DECLFW (TC3294_writeReg); DECLFW (TC3294_writeReg);
void TC3294_clear (); void TC3294_clear(void);
void TC3294_activate (uint8_t, void (*)()); void TC3294_activate (uint8_t, void (*)());
void TC3294_addExState (); void TC3294_addExState(void);
void TC3294_restore (int); void TC3294_restore (int);
void TC3294_power (); void TC3294_power(void);
void TC3294_init (CartInfo *, void (*)()); void TC3294_init (CartInfo *, void (*)());
#endif #endif

8
src/boards/asic_vrc1.c
View File

@@ -41,7 +41,7 @@ void VRC1_syncCHR (int AND, int OR) {
setchr4(0x1000, (VRC1_reg[7] &0x0F | VRC1_reg[1] <<2 &0x10) &AND |OR); setchr4(0x1000, (VRC1_reg[7] &0x0F | VRC1_reg[1] <<2 &0x10) &AND |OR);
} }
void VRC1_syncMirror () { void VRC1_syncMirror(void) {
setmirror(VRC1_reg[1] &0x01? MI_H: MI_V); setmirror(VRC1_reg[1] &0x01? MI_H: MI_V);
} }
@@ -50,7 +50,7 @@ DECLFW (VRC1_writeReg) {
VRC1_cbSync(); VRC1_cbSync();
} }
void VRC1_clear () { void VRC1_clear(void) {
VRC1_reg[0] = 0x00; VRC1_reg[1] = 0; VRC1_reg[2] = 2; VRC1_reg[3] = 0;VRC1_reg[4] = 0x00; VRC1_reg[5] = 0; VRC1_reg[6] = 2; VRC1_reg[7] = 0; VRC1_reg[0] = 0x00; VRC1_reg[1] = 0; VRC1_reg[2] = 2; VRC1_reg[3] = 0;VRC1_reg[4] = 0x00; VRC1_reg[5] = 0; VRC1_reg[6] = 2; VRC1_reg[7] = 0;
VRC1_cbSync(); VRC1_cbSync();
} }
@@ -73,7 +73,7 @@ void VRC1_activate (uint8_t clear, void (*sync)()) {
VRC1_cbSync(); VRC1_cbSync();
} }
void VRC1_addExState () { void VRC1_addExState(void) {
AddExState(VRC1_state, ~0, 0, 0); AddExState(VRC1_state, ~0, 0, 0);
} }
@@ -81,7 +81,7 @@ void VRC1_restore (int version) {
VRC1_cbSync(); VRC1_cbSync();
} }
void VRC1_power () { void VRC1_power(void) {
VRC1_setHandlers(); VRC1_setHandlers();
VRC1_clear(); VRC1_clear();
} }

8
src/boards/asic_vrc1.h
View File

@@ -23,13 +23,13 @@
void VRC1_syncPRG (int, int); void VRC1_syncPRG (int, int);
void VRC1_syncCHR (int, int); void VRC1_syncCHR (int, int);
void VRC1_syncMirror (); void VRC1_syncMirror(void);
DECLFW (VRC1_writeReg); DECLFW (VRC1_writeReg);
void VRC1_clear (); void VRC1_clear(void);
void VRC1_activate (uint8_t, void (*)()); void VRC1_activate (uint8_t, void (*)());
void VRC1_addExState (); void VRC1_addExState(void);
void VRC1_restore (int); void VRC1_restore (int);
void VRC1_power (); void VRC1_power(void);
void VRC1_init (CartInfo *, void (*)()); void VRC1_init (CartInfo *, void (*)());
#endif #endif

12
src/boards/asic_vrc2and4.c
View File

@@ -99,7 +99,7 @@ int VRC24_getCHRBank (uint8_t bank) {
return VRC24_chr[bank &7]; return VRC24_chr[bank &7];
} }
void VRC24_syncMirror () { void VRC24_syncMirror(void) {
setmirror(VRC24_isVRC4 && VRC24_mirroring &2? (VRC24_mirroring &1? MI_1: MI_0): (VRC24_mirroring &1? MI_H: MI_V)); setmirror(VRC24_isVRC4 && VRC24_mirroring &2? (VRC24_mirroring &1? MI_1: MI_0): (VRC24_mirroring &1? MI_H: MI_V));
} }
@@ -194,7 +194,7 @@ void FP_FASTAPASS(1) VRC4_cpuCycle (int a) {
} }
} }
void VRC24_clear () { void VRC24_clear(void) {
VRC24_prg[0] = 0; VRC24_prg[1] = 0; VRC24_prg[0] = 0; VRC24_prg[1] = 0;
VRC24_chr[0] = 0; VRC24_chr[1] = 1; VRC24_chr[2] = 2; VRC24_chr[3] = 3; VRC24_chr[4] = 4; VRC24_chr[5] = 5; VRC24_chr[6] = 6; VRC24_chr[7] = 7; VRC24_chr[0] = 0; VRC24_chr[1] = 1; VRC24_chr[2] = 2; VRC24_chr[3] = 3; VRC24_chr[4] = 4; VRC24_chr[5] = 5; VRC24_chr[6] = 6; VRC24_chr[7] = 7;
VRC24_mirroring = VRC2_pins = VRC4_latch = VRC4_mode = VRC4_count = VRC4_cycles = 0; VRC24_mirroring = VRC2_pins = VRC4_latch = VRC4_mode = VRC4_count = VRC4_cycles = 0;
@@ -263,17 +263,17 @@ void VRC4_activate (uint8_t clear, void (*sync)(), int A0, int A1, uint8_t useRe
VRC24_cbSync(); VRC24_cbSync();
} }
void VRC2_addExState () { void VRC2_addExState(void) {
AddExState(VRC24_stateRegs, ~0, 0, 0); AddExState(VRC24_stateRegs, ~0, 0, 0);
AddExState(VRC2_stateRegs, ~0, 0, 0); AddExState(VRC2_stateRegs, ~0, 0, 0);
} }
void VRC4_addExState () { void VRC4_addExState(void) {
AddExState(VRC24_stateRegs, ~0, 0, 0); AddExState(VRC24_stateRegs, ~0, 0, 0);
AddExState(VRC4_stateRegs, ~0, 0, 0); AddExState(VRC4_stateRegs, ~0, 0, 0);
} }
void VRC24_addExState () { void VRC24_addExState(void) {
AddExState(VRC24_stateRegs, ~0, 0, 0); AddExState(VRC24_stateRegs, ~0, 0, 0);
AddExState(VRC2_stateRegs, ~0, 0, 0); AddExState(VRC2_stateRegs, ~0, 0, 0);
AddExState(VRC4_stateRegs, ~0, 0, 0); AddExState(VRC4_stateRegs, ~0, 0, 0);
@@ -283,7 +283,7 @@ void VRC24_restore (int version) {
VRC24_cbSync(); VRC24_cbSync();
} }
void VRC24_power () { void VRC24_power(void) {
VRC24_setHandlers(); VRC24_setHandlers();
VRC24_clear(); VRC24_clear();
} }

12
src/boards/asic_vrc2and4.h
View File

@@ -33,19 +33,19 @@ void VRC24_syncPRG (int, int);
void VRC24_syncCHR (int, int); void VRC24_syncCHR (int, int);
int VRC24_getPRGBank (uint8_t); int VRC24_getPRGBank (uint8_t);
int VRC24_getCHRBank (uint8_t); int VRC24_getCHRBank (uint8_t);
void VRC24_syncMirror (); void VRC24_syncMirror(void);
DECLFW(VRC24_writeReg); DECLFW(VRC24_writeReg);
void FP_FASTAPASS(1) VRC4_cpuCycle(int); void FP_FASTAPASS(1) VRC4_cpuCycle(int);
void VRC24_reconfigure (int, int); void VRC24_reconfigure (int, int);
void VRC24_clear (); void VRC24_clear(void);
void VRC2_activate (uint8_t, void (*)(), int, int, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*))); void VRC2_activate (uint8_t, void (*)(), int, int, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)));
void VRC4_activate (uint8_t, void (*)(), int, int, uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)), DECLFW((*))); void VRC4_activate (uint8_t, void (*)(), int, int, uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)), DECLFW((*)));
void VRC2_addExState (); void VRC2_addExState(void);
void VRC4_addExState (); void VRC4_addExState(void);
void VRC24_addExState (); void VRC24_addExState(void);
void VRC24_restore (int); void VRC24_restore (int);
void VRC24_power (); void VRC24_power(void);
void VRC2_init (CartInfo *, void (*)(), int, int, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*))); void VRC2_init (CartInfo *, void (*)(), int, int, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)));
void VRC4_init (CartInfo *, void (*)(), int, int, uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)), DECLFW((*))); void VRC4_init (CartInfo *, void (*)(), int, int, uint8_t, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)), DECLFW((*)));

8
src/boards/asic_vrc3.c
View File

@@ -71,7 +71,7 @@ DECLFW (VRC3_write) {
} }
} }
void FP_FASTAPASS(1) VRC3_cpuCycle (int a) { static void FP_FASTAPASS(1) VRC3_cpuCycle (int a) {
while (a--) { while (a--) {
int mask = VRC3_irq &4? 0xFF: 0xFFFF; int mask = VRC3_irq &4? 0xFF: 0xFFFF;
if ((VRC3_count++ &mask) == mask) { if ((VRC3_count++ &mask) == mask) {
@@ -81,7 +81,7 @@ void FP_FASTAPASS(1) VRC3_cpuCycle (int a) {
} }
} }
void VRC3_clear () { void VRC3_clear(void) {
VRC3_prg = VRC3_irq = VRC3_count = VRC3_reload = 0; VRC3_prg = VRC3_irq = VRC3_count = VRC3_reload = 0;
X6502_IRQEnd(FCEU_IQEXT); X6502_IRQEnd(FCEU_IQEXT);
VRC3_cbSync(); VRC3_cbSync();
@@ -107,7 +107,7 @@ void VRC3_activate (uint8_t clear, void (*sync)()) {
VRC3_cbSync(); VRC3_cbSync();
} }
void VRC3_addExState () { void VRC3_addExState(void) {
AddExState(VRC3_state, ~0, 0, 0); AddExState(VRC3_state, ~0, 0, 0);
} }
@@ -115,7 +115,7 @@ void VRC3_restore (int version) {
VRC3_cbSync(); VRC3_cbSync();
} }
void VRC3_power () { void VRC3_power(void) {
VRC3_setHandlers(); VRC3_setHandlers();
VRC3_clear(); VRC3_clear();
} }

6
src/boards/asic_vrc3.h
View File

@@ -25,11 +25,11 @@ void VRC3_syncWRAM (int);
void VRC3_syncPRG (int, int); void VRC3_syncPRG (int, int);
void VRC3_syncCHR (int, int); void VRC3_syncCHR (int, int);
DECLFW (VRC3_write); DECLFW (VRC3_write);
void VRC3_clear (); void VRC3_clear(void);
void VRC3_activate (uint8_t, void (*)()); void VRC3_activate (uint8_t, void (*)());
void VRC3_addExState (); void VRC3_addExState(void);
void VRC3_restore (int); void VRC3_restore (int);
void VRC3_power (); void VRC3_power(void);
void VRC3_init (CartInfo *, void (*)()); void VRC3_init (CartInfo *, void (*)());
#endif #endif

10
src/boards/asic_vrc6.c
View File

@@ -68,7 +68,7 @@ void VRC6_syncCHR (int AND, int OR) {
setchr1(0x1C00, VRC6_cbGetCHRBank(7) &AND | OR); setchr1(0x1C00, VRC6_cbGetCHRBank(7) &AND | OR);
} }
void VRC6_syncMirror () { /* Only emulates features used by known games, meaning mode 0 with CHR A10 substitution */ void VRC6_syncMirror(void) { /* Only emulates features used by known games, meaning mode 0 with CHR A10 substitution */
setmirror(VRC6_misc &8? (VRC6_misc &4? MI_1: MI_0): VRC6_misc &4? MI_H: MI_V); setmirror(VRC6_misc &8? (VRC6_misc &4? MI_1: MI_0): VRC6_misc &4? MI_H: MI_V);
} }
@@ -90,7 +90,7 @@ DECLFR (VRC6_readWRAM) {
return A >>8; return A >>8;
} }
DECLFW (VRC6_writeWRAM) { static DECLFW (VRC6_writeWRAM) {
if (VRC6_misc &0x80) { if (VRC6_misc &0x80) {
CartBW(A, V); CartBW(A, V);
if (VRC6_cbWriteWRAM) VRC6_cbWriteWRAM(A, V); if (VRC6_cbWriteWRAM) VRC6_cbWriteWRAM(A, V);
@@ -151,7 +151,7 @@ void FP_FASTAPASS(1) VRC6_cpuCycle (int a) {
} }
} }
void VRC6_clear () { void VRC6_clear(void) {
VRC6_prg[0] = 0; VRC6_prg[1] = 0xFE; VRC6_prg[0] = 0; VRC6_prg[1] = 0xFE;
VRC6_chr[0] = 0; VRC6_chr[1] = 1; VRC6_chr[2] = 2; VRC6_chr[3] = 3; VRC6_chr[4] = 4; VRC6_chr[5] = 5; VRC6_chr[6] = 6; VRC6_chr[7] = 7; VRC6_chr[0] = 0; VRC6_chr[1] = 1; VRC6_chr[2] = 2; VRC6_chr[3] = 3; VRC6_chr[4] = 4; VRC6_chr[5] = 5; VRC6_chr[6] = 6; VRC6_chr[7] = 7;
VRC6_misc = VRC6_latch = VRC6_mode = VRC6_count = VRC6_cycles = 0; VRC6_misc = VRC6_latch = VRC6_mode = VRC6_count = VRC6_cycles = 0;
@@ -185,7 +185,7 @@ void VRC6_activate (uint8_t clear, void (*sync)(), int A0, int A1, int (*prg)(ui
VRC6_cbSync(); VRC6_cbSync();
} }
void VRC6_addExState () { void VRC6_addExState(void) {
AddExState(VRC6_stateRegs, ~0, 0, 0); AddExState(VRC6_stateRegs, ~0, 0, 0);
} }
@@ -193,7 +193,7 @@ void VRC6_restore (int version) {
VRC6_cbSync(); VRC6_cbSync();
} }
void VRC6_power () { void VRC6_power(void) {
VRC6_setHandlers(); VRC6_setHandlers();
VRC6_clear(); VRC6_clear();
} }

8
src/boards/asic_vrc6.h
View File

@@ -24,18 +24,18 @@
void VRC6_syncWRAM (int); void VRC6_syncWRAM (int);
void VRC6_syncPRG (int, int); void VRC6_syncPRG (int, int);
void VRC6_syncCHR (int, int); void VRC6_syncCHR (int, int);
void VRC6_syncMirror (); void VRC6_syncMirror(void);
int VRC6_getPRGBank (uint8_t); int VRC6_getPRGBank (uint8_t);
int VRC6_getCHRBank (uint8_t); int VRC6_getCHRBank (uint8_t);
DECLFR(VRC6_readWRAM); DECLFR(VRC6_readWRAM);
DECLFW(MMC3_writeWRAM); DECLFW(MMC3_writeWRAM);
DECLFW(VRC6_writeReg); DECLFW(VRC6_writeReg);
void FP_FASTAPASS(1) VRC6_cpuCycle (int); void FP_FASTAPASS(1) VRC6_cpuCycle (int);
void VRC6_clear (); void VRC6_clear(void);
void VRC6_activate (uint8_t, void (*)(), int, int, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*))); void VRC6_activate (uint8_t, void (*)(), int, int, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)));
void VRC6_addExState (); void VRC6_addExState(void);
void VRC6_restore (int); void VRC6_restore (int);
void VRC6_power (); void VRC6_power(void);
void VRC6_init (CartInfo *, void (*)(), int, int, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*))); void VRC6_init (CartInfo *, void (*)(), int, int, int (*)(uint8_t), int (*)(uint8_t), DECLFR((*)), DECLFW((*)));
#endif #endif

10
src/boards/asic_vrc7.c
View File

@@ -64,7 +64,7 @@ void VRC7_syncCHR (int AND, int OR) {
setchr1(0x1C00, VRC7_chr[7] &AND | OR); setchr1(0x1C00, VRC7_chr[7] &AND | OR);
} }
void VRC7_syncMirror () { void VRC7_syncMirror(void) {
setmirror(VRC7_misc &2? (VRC7_misc &1? MI_1: MI_0): VRC7_misc &1? MI_H: MI_V); setmirror(VRC7_misc &2? (VRC7_misc &1? MI_1: MI_0): VRC7_misc &1? MI_H: MI_V);
} }
@@ -72,7 +72,7 @@ DECLFR (VRC7_readWRAM) {
return VRC7_misc &0x80? CartBR(A): A >>8; return VRC7_misc &0x80? CartBR(A): A >>8;
} }
DECLFW (VRC7_writeWRAM) { static DECLFW (VRC7_writeWRAM) {
if (VRC7_misc &0x80) CartBW(A, V); if (VRC7_misc &0x80) CartBW(A, V);
} }
@@ -128,7 +128,7 @@ void FP_FASTAPASS(1) VRC7_cpuCycle (int a) {
} }
} }
void VRC7_clear () { void VRC7_clear(void) {
VRC7_prg[0] = 0; VRC7_prg[1] = 1; VRC7_prg[2] = 0xFE; VRC7_prg[0] = 0; VRC7_prg[1] = 1; VRC7_prg[2] = 0xFE;
VRC7_chr[0] = 0; VRC7_chr[1] = 1; VRC7_chr[2] = 2; VRC7_chr[3] = 3; VRC7_chr[4] = 4; VRC7_chr[5] = 5; VRC7_chr[6] = 6; VRC7_chr[7] = 7; VRC7_chr[0] = 0; VRC7_chr[1] = 1; VRC7_chr[2] = 2; VRC7_chr[3] = 3; VRC7_chr[4] = 4; VRC7_chr[5] = 5; VRC7_chr[6] = 6; VRC7_chr[7] = 7;
VRC7_misc = VRC7_latch = VRC7_mode = VRC7_count = VRC7_cycles = 0; VRC7_misc = VRC7_latch = VRC7_mode = VRC7_count = VRC7_cycles = 0;
@@ -157,7 +157,7 @@ void VRC7_activate (uint8_t clear, void (*sync)(), int A0) {
VRC7_cbSync(); VRC7_cbSync();
} }
void VRC7_addExState () { void VRC7_addExState(void) {
AddExState(VRC7_stateRegs, ~0, 0, 0); AddExState(VRC7_stateRegs, ~0, 0, 0);
} }
@@ -165,7 +165,7 @@ void VRC7_restore (int version) {
VRC7_cbSync(); VRC7_cbSync();
} }
void VRC7_power () { void VRC7_power(void) {
VRC7_setHandlers(); VRC7_setHandlers();
VRC7_clear(); VRC7_clear();
} }

8
src/boards/asic_vrc7.h
View File

@@ -24,16 +24,16 @@
void VRC7_syncWRAM (int); void VRC7_syncWRAM (int);
void VRC7_syncPRG (int, int); void VRC7_syncPRG (int, int);
void VRC7_syncCHR (int, int); void VRC7_syncCHR (int, int);
void VRC7_syncMirror (); void VRC7_syncMirror(void);
DECLFR(VRC7_readWRAM); DECLFR(VRC7_readWRAM);
DECLFW(MMC3_writeWRAM); DECLFW(MMC3_writeWRAM);
DECLFW(VRC7_writeReg); DECLFW(VRC7_writeReg);
void FP_FASTAPASS(1) VRC7_cpuCycle (int); void FP_FASTAPASS(1) VRC7_cpuCycle (int);
void VRC7_clear (); void VRC7_clear(void);
void VRC7_activate (uint8_t, void (*)(), int); void VRC7_activate (uint8_t, void (*)(), int);
void VRC7_addExState (); void VRC7_addExState(void);
void VRC7_restore (int); void VRC7_restore (int);
void VRC7_power (); void VRC7_power(void);
void VRC7_init (CartInfo *, void (*)(), int); void VRC7_init (CartInfo *, void (*)(), int);
#endif #endif

6
src/boards/cartram.c
View File

@@ -26,7 +26,7 @@ static uint8_t *WRAMData = NULL;
uint32_t CHRRAMSize = 0; uint32_t CHRRAMSize = 0;
uint32_t WRAMSize = 0; uint32_t WRAMSize = 0;
void CartRAM_close (void) { /* Need to combine this in one function to avoid the problem of having to properly cascade two separate Close() functions for WRAM and CHR-RAM each */ static void CartRAM_close (void) { /* Need to combine this in one function to avoid the problem of having to properly cascade two separate Close() functions for WRAM and CHR-RAM each */
if (WRAMData) { if (WRAMData) {
FCEU_gfree(WRAMData); FCEU_gfree(WRAMData);
WRAMData = NULL; WRAMData = NULL;
@@ -38,7 +38,7 @@ void CartRAM_close (void) { /* Need to combine this in one function to avoid the
} }
void CartRAM_init (CartInfo *info, uint8_t defaultWRAMSizeKiB, uint8_t defaultCHRRAMSizeKiB) { void CartRAM_init (CartInfo *info, uint8_t defaultWRAMSizeKiB, uint8_t defaultCHRRAMSizeKiB) {
WRAMSize = info->iNES2? (info->PRGRamSize +info->PRGRamSaveSize): (defaultWRAMSizeKiB *1024); WRAMSize = CartInfo_PRGRAM_bytes(info, (uint32_t)defaultWRAMSizeKiB * 1024);
if (WRAMSize) { if (WRAMSize) {
WRAMData = (uint8_t*)FCEU_gmalloc(WRAMSize); WRAMData = (uint8_t*)FCEU_gmalloc(WRAMSize);
SetupCartPRGMapping(0x10, WRAMData, WRAMSize, 1); SetupCartPRGMapping(0x10, WRAMData, WRAMSize, 1);
@@ -48,7 +48,7 @@ void CartRAM_init (CartInfo *info, uint8_t defaultWRAMSizeKiB, uint8_t defaultCH
info->SaveGameLen[0] = info->iNES2? (uint32_t)info->PRGRamSaveSize: WRAMSize; info->SaveGameLen[0] = info->iNES2? (uint32_t)info->PRGRamSaveSize: WRAMSize;
} }
} }
CHRRAMSize = info->iNES2? (info->CHRRamSize +info->CHRRamSaveSize): (defaultCHRRAMSizeKiB *1024); CHRRAMSize = CartInfo_CHRRAM_bytes(info, (uint32_t)defaultCHRRAMSizeKiB * 1024);
if (ROM_size == 0) CHRRAMSize = 0; /* If there is no CHR-ROM, then any CHR-RAM will not be "extra" and therefore will be handled by ines.c, not here. */ if (ROM_size == 0) CHRRAMSize = 0; /* If there is no CHR-ROM, then any CHR-RAM will not be "extra" and therefore will be handled by ines.c, not here. */
if (CHRRAMSize) { if (CHRRAMSize) {
CHRRAMData = (uint8_t*)FCEU_gmalloc(CHRRAMSize); CHRRAMData = (uint8_t*)FCEU_gmalloc(CHRRAMSize);

1
src/boards/cartram.h
View File

@@ -26,6 +26,5 @@ extern uint32_t WRAMSize;
void CartRAM_init (CartInfo *, uint8_t, uint8_t); void CartRAM_init (CartInfo *, uint8_t, uint8_t);
void CHRRAM_init (CartInfo *, uint8_t); void CHRRAM_init (CartInfo *, uint8_t);
void WRAM_init (CartInfo *, uint8_t); void WRAM_init (CartInfo *, uint8_t);
void CartRAM_close ();
#endif #endif

4
src/boards/cheapocabra.c
View File

@@ -96,14 +96,14 @@ static DECLFR(M111FlashID) {
} }
} }
void M111FlashIDEnter() { static void M111FlashIDEnter() {
if (flash_id) if (flash_id)
return; return;
flash_id = 1; flash_id = 1;
SetReadHandler(0x8000, 0xFFFF, M111FlashID); SetReadHandler(0x8000, 0xFFFF, M111FlashID);
} }
void M111FlashIDExit() { static void M111FlashIDExit() {
if (!flash_id) if (!flash_id)
return; return;
flash_id = 0; flash_id = 0;

2
src/boards/eeprom_93Cx6.c
View File

@@ -47,7 +47,7 @@ void eeprom_93Cx6_init (size_t capacity, uint8_t wordSize) {
} }
} }
uint8_t eeprom_93Cx6_read () { uint8_t eeprom_93Cx6_read (void) {
return eeprom_93Cx6_output; return eeprom_93Cx6_output;
} }

2
src/boards/eeprom_93Cx6.h
View File

@@ -5,6 +5,6 @@
extern uint8_t* eeprom_93Cx6_storage; extern uint8_t* eeprom_93Cx6_storage;
void eeprom_93Cx6_init (size_t capacity, uint8_t wordSize); void eeprom_93Cx6_init (size_t capacity, uint8_t wordSize);
uint8_t eeprom_93Cx6_read (); uint8_t eeprom_93Cx6_read (void);
void eeprom_93Cx6_write (uint8_t CS, uint8_t CLK, uint8_t DAT); void eeprom_93Cx6_write (uint8_t CS, uint8_t CLK, uint8_t DAT);
#endif #endif

2
src/boards/fk23c.c
View File

@@ -465,7 +465,7 @@ static void StateRestore(int version)
Sync(); Sync();
} }
void Init(CartInfo *info) static void Init(CartInfo *info)
{ {
/* Initialization for iNES and UNIF. subType and dipsw_enable must have been set. */ /* Initialization for iNES and UNIF. subType and dipsw_enable must have been set. */
info->Power = Power; info->Power = Power;

18
src/boards/jyasic.c
View File

@@ -440,7 +440,7 @@ static void JYASIC_restore (int version)
sync(); sync();
} }
void JYASIC_init (CartInfo *info) static void JYASIC_init (CartInfo *info)
{ {
cpuWriteHandlersSet =0; cpuWriteHandlersSet =0;
info->Reset = JYASIC_reset; info->Reset = JYASIC_reset;
@@ -549,7 +549,7 @@ void Mapper282_Init(CartInfo *info)
JYASIC_init(info); JYASIC_init(info);
} }
void sync295 (void) static void sync295 (void)
{ {
syncPRG(0x0F, mode[3] <<4); syncPRG(0x0F, mode[3] <<4);
syncCHR(0x7F, mode[3] <<7); syncCHR(0x7F, mode[3] <<7);
@@ -564,7 +564,7 @@ void Mapper295_Init(CartInfo *info)
JYASIC_init(info); JYASIC_init(info);
} }
void sync358 (void) static void sync358 (void)
{ {
syncPRG(0x1F, mode[3] <<4 &~0x1F); syncPRG(0x1F, mode[3] <<4 &~0x1F);
if (mode[3] &0x20) if (mode[3] &0x20)
@@ -587,7 +587,7 @@ void Mapper358_Init(CartInfo *info)
JYASIC_init(info); JYASIC_init(info);
} }
void sync386 (void) static void sync386 (void)
{ {
syncPRG(0x1F, mode[3] <<4 &0x20 | mode[3] <<3 &0x40); syncPRG(0x1F, mode[3] <<4 &0x20 | mode[3] <<3 &0x40);
if (mode[3] &0x20) if (mode[3] &0x20)
@@ -610,7 +610,7 @@ void Mapper386_Init(CartInfo *info)
JYASIC_init(info); JYASIC_init(info);
} }
void sync387(void) static void sync387(void)
{ {
syncPRG(0x0F, mode[3] <<3 &0x10 | mode[3] <<2 &0x20); syncPRG(0x0F, mode[3] <<3 &0x10 | mode[3] <<2 &0x20);
if (mode[3] &0x20) if (mode[3] &0x20)
@@ -633,7 +633,7 @@ void Mapper387_Init(CartInfo *info)
JYASIC_init(info); JYASIC_init(info);
} }
void sync388 (void) static void sync388 (void)
{ {
syncPRG(0x1F, mode[3] <<3 &0x60); syncPRG(0x1F, mode[3] <<3 &0x60);
@@ -657,7 +657,7 @@ void Mapper388_Init(CartInfo *info)
JYASIC_init(info); JYASIC_init(info);
} }
void sync397 (void) static void sync397 (void)
{ {
syncPRG(0x1F, mode[3] <<4 &~0x1F); syncPRG(0x1F, mode[3] <<4 &~0x1F);
syncCHR(0x7F, mode[3] <<7); syncCHR(0x7F, mode[3] <<7);
@@ -672,7 +672,7 @@ void Mapper397_Init(CartInfo *info)
JYASIC_init(info); JYASIC_init(info);
} }
void sync421 (void) static void sync421 (void)
{ {
if (mode[3] &0x04) if (mode[3] &0x04)
syncPRG(0x3F, mode[3] <<4 &~0x3F); syncPRG(0x3F, mode[3] <<4 &~0x3F);
@@ -692,7 +692,7 @@ void Mapper421_Init(CartInfo *info)
/* Mapper 394: HSK007 circuit board that can simulate J.Y. ASIC, MMC3, and NROM. */ /* Mapper 394: HSK007 circuit board that can simulate J.Y. ASIC, MMC3, and NROM. */
static uint8_t HSK007Reg[4]; static uint8_t HSK007Reg[4];
void sync394 (void) /* Called when J.Y. ASIC is active */ static void sync394 (void) /* Called when J.Y. ASIC is active */
{ {
int prgOR =HSK007Reg[3] <<1 &0x010 | HSK007Reg[1] <<5 &0x060; int prgOR =HSK007Reg[3] <<1 &0x010 | HSK007Reg[1] <<5 &0x060;
int chrOR =HSK007Reg[3] <<1 &0x080 | HSK007Reg[1] <<6 &0x100 | HSK007Reg[1] <<8 &0x200; int chrOR =HSK007Reg[3] <<1 &0x080 | HSK007Reg[1] <<6 &0x100 | HSK007Reg[1] <<8 &0x200;

2
src/boards/latch.c
View File

@@ -38,7 +38,7 @@ DECLFW(LatchWrite) {
WSync(); WSync();
} }
void LatchHardReset() { void LatchHardReset(void) {
latch.addr = 0; latch.addr = 0;
latch.data = 0; latch.data = 0;
WSync(); WSync();

2
src/boards/latch.h
View File

@@ -12,6 +12,6 @@ void Latch_Init(CartInfo *info, void (*proc)(void), readfunc func, uint8_t wram,
void LatchPower(void); void LatchPower(void);
void LatchClose(void); void LatchClose(void);
void LatchWrite(uint32_t A, uint8_t V); void LatchWrite(uint32_t A, uint8_t V);
void LatchHardReset(); void LatchHardReset(void);
#endif /* _FCEU_LATCH_H */ #endif /* _FCEU_LATCH_H */

6
src/boards/mmc1.c
View File

@@ -401,15 +401,15 @@ void SL1ROM_Init(CartInfo *info) {
similarly functioning boards? similarly functioning boards?
*/ */
void SL2ROM_Init(CartInfo *info) { static void SL2ROM_Init(CartInfo *info) {
GenMMC1Init(info, 256, 256, 0, 0); GenMMC1Init(info, 256, 256, 0, 0);
} }
void SFROM_Init(CartInfo *info) { static void SFROM_Init(CartInfo *info) {
GenMMC1Init(info, 256, 256, 0, 0); GenMMC1Init(info, 256, 256, 0, 0);
} }
void SHROM_Init(CartInfo *info) { static void SHROM_Init(CartInfo *info) {
GenMMC1Init(info, 256, 256, 0, 0); GenMMC1Init(info, 256, 256, 0, 0);
} }

2
src/boards/mmc2and4.c
View File

@@ -54,7 +54,7 @@ static void Sync(void) {
setmirror(mirr); setmirror(mirr);
} }
DECLFW(MMC2and4Write) { static DECLFW(MMC2and4Write) {
switch (A & 0xF000) { switch (A & 0xF000) {
case 0xA000: preg = V & 0xF; Sync(); break; case 0xA000: preg = V & 0xF; Sync(); break;
case 0xB000: creg[0] = V & 0x1F; Sync(); break; case 0xB000: creg[0] = V & 0x1F; Sync(); break;

2
src/boards/mmc3.c
View File

@@ -1342,7 +1342,7 @@ static void GN45Power(void) {
SetWriteHandler(0x7000, 0x7fff, GN45Write1); /* OK-411 boards, the same logic, but data latched, 2-in-1 frankenstein */ SetWriteHandler(0x7000, 0x7fff, GN45Write1); /* OK-411 boards, the same logic, but data latched, 2-in-1 frankenstein */
} }
void GN45_Init(CartInfo *info) { static void GN45_Init(CartInfo *info) {
GenMMC3_Init(info, 128, 128, 8, 0); GenMMC3_Init(info, 128, 128, 8, 0);
pwrap = GN45PW; pwrap = GN45PW;
cwrap = GN45CW; cwrap = GN45CW;

14
src/boards/mmc5.c
View File

@@ -386,7 +386,7 @@ static DECLFR(MMC5_read) {
return(X.DB); return(X.DB);
} }
void MMC5Synco(void) { static void MMC5Synco(void) {
int x; int x;
MMC5PRG(); MMC5PRG();
@@ -422,10 +422,11 @@ void MMC5Synco(void) {
/* X6502_IRQEnd(FCEU_IQEXT); */ /* X6502_IRQEnd(FCEU_IQEXT); */
} }
void MMC5_hb(int scanline) { void MMC5_hb(int sl_param);
void MMC5_hb(int sl_param) {
/* zero 24-jul-2014 - revised for newer understanding, to fix metal slader glory credits. see r7371 in bizhawk */ /* zero 24-jul-2014 - revised for newer understanding, to fix metal slader glory credits. see r7371 in bizhawk */
int sl = scanline + 1; int sl = sl_param + 1;
int ppuon = (PPU[1] & 0x18); int ppuon = (PPU[1] & 0x18);
if (!ppuon || sl >= 241) if (!ppuon || sl >= 241)
@@ -460,7 +461,7 @@ void MMC5_hb(int scanline) {
} }
void MMC5_StateRestore(int version) { static void MMC5_StateRestore(int version) {
MMC5Synco(); MMC5Synco();
} }
@@ -612,7 +613,7 @@ void MMC5RunSoundHQ(void) {
Do5PCMHQ(); Do5PCMHQ();
} }
void MMC5HiSync(int32_t ts) { static void MMC5HiSync(int32_t ts) {
int x; int x;
for (x = 0; x < 3; x++) for (x = 0; x < 3; x++)
MMC5Sound.BC[x] = ts; MMC5Sound.BC[x] = ts;
@@ -627,7 +628,7 @@ void MMC5RunSound(int Count) {
MMC5Sound.BC[x] = Count; MMC5Sound.BC[x] = Count;
} }
void Mapper5_ESI(void) { static void Mapper5_ESI(void) {
GameExpSound.RChange = Mapper5_ESI; GameExpSound.RChange = Mapper5_ESI;
if (FSettings.SndRate) { if (FSettings.SndRate) {
if (FSettings.soundq >= 1) { if (FSettings.soundq >= 1) {
@@ -659,6 +660,7 @@ void NSFMMC5_Init(void) {
SetReadHandler(0x5205, 0x5206, MMC5_read); SetReadHandler(0x5205, 0x5206, MMC5_read);
} }
void NSFMMC5_Close(void);
void NSFMMC5_Close(void) { void NSFMMC5_Close(void) {
if (WRAM) if (WRAM)
FCEU_gfree(WRAM); FCEU_gfree(WRAM);

6
src/boards/n106.c
View File

@@ -44,7 +44,7 @@ static uint8_t gorko;
static void NamcoSound(int Count); static void NamcoSound(int Count);
static void NamcoSoundHack(void); static void NamcoSoundHack(void);
static void DoNamcoSound(int32_t *Wave, int Count); static void DoNamcoSound(int32_t *WaveBuf, int Count);
static void DoNamcoSoundHQ(void); static void DoNamcoSoundHQ(void);
static void SyncHQ(int32_t ts); static void SyncHQ(int32_t ts);
@@ -319,7 +319,7 @@ static void DoNamcoSoundHQ(void) {
} }
static void DoNamcoSound(int32_t *Wave, int Count) { static void DoNamcoSound(int32_t *WaveBuf, int Count) {
int P, V; int P, V;
for (P = 7; P >= 7 - ((IRAM[0x7F] >> 4) & 7); P--) { for (P = 7; P >= 7 - ((IRAM[0x7F] >> 4) & 7); P--) {
if ((IRAM[0x44 + (P << 3)] & 0xE0) && (IRAM[0x47 + (P << 3)] & 0xF)) { if ((IRAM[0x44 + (P << 3)] & 0xE0) && (IRAM[0x47 + (P << 3)] & 0xF)) {
@@ -362,7 +362,7 @@ static void DoNamcoSound(int32_t *Wave, int Count) {
duff &= 0xF; duff &= 0xF;
duff2 = (duff * envelope) >> 19; duff2 = (duff * envelope) >> 19;
} }
Wave[V >> 4] += duff2; WaveBuf[V >> 4] += duff2;
vco += 0x8000; vco += 0x8000;
} }
vcount[P] = vco; vcount[P] = vco;

2
src/boards/onebus.c
View File

@@ -371,7 +371,7 @@ static void StateRestore(int version) {
Sync(); Sync();
} }
void UNLOneBus_Close(void) { static void UNLOneBus_Close(void) {
if (WRAM) if (WRAM)
FCEU_gfree(WRAM); FCEU_gfree(WRAM);
WRAM = NULL; WRAM = NULL;

6
src/boards/unrom512.c
View File

@@ -70,7 +70,7 @@ static INLINE void setfpageptr(int s, uint32_t A, uint8_t *p) {
} }
} }
void setfprg16(uint32_t A, uint32_t V) { static void setfprg16(uint32_t A, uint32_t V) {
if (PRGsize[0] >= 16384) { if (PRGsize[0] >= 16384) {
V &= PRGmask16[0]; V &= PRGmask16[0];
setfpageptr(16, A, flashdata ? (&flashdata[V << 14]) : 0); setfpageptr(16, A, flashdata ? (&flashdata[V << 14]) : 0);
@@ -109,14 +109,14 @@ static INLINE void fwc_store(uint32_t idx, uint32_t v) {
#endif #endif
} }
void inc_flash_write_count(uint8_t bank, uint32_t A) { static void inc_flash_write_count(uint8_t bank, uint32_t A) {
uint32_t idx = (bank * 4) + ((A & 0x3000) >> 12); uint32_t idx = (bank * 4) + ((A & 0x3000) >> 12);
uint32_t v = fwc_load(idx) + 1; uint32_t v = fwc_load(idx) + 1;
if (v == 0) v = 1; /* avoid wrap to 0 (which means "never written") */ if (v == 0) v = 1; /* avoid wrap to 0 (which means "never written") */
fwc_store(idx, v); fwc_store(idx, v);
} }
uint32_t GetFlashWriteCount(uint8_t bank, uint32_t A) { static uint32_t GetFlashWriteCount(uint8_t bank, uint32_t A) {
return fwc_load((bank * 4) + ((A & 0x3000) >> 12)); return fwc_load((bank * 4) + ((A & 0x3000) >> 12));
} }

6
src/boards/vrc6.c
View File

@@ -316,7 +316,7 @@ static void DoSawVHQ(void) {
cvbc[2] = SOUNDTS; cvbc[2] = SOUNDTS;
} }
void VRC6Sound(int Count) { static void VRC6Sound(int Count) {
int x; int x;
DoSQV1(); DoSQV1();
@@ -326,13 +326,13 @@ void VRC6Sound(int Count) {
cvbc[x] = Count; cvbc[x] = Count;
} }
void VRC6SoundHQ(void) { static void VRC6SoundHQ(void) {
DoSQV1HQ(); DoSQV1HQ();
DoSQV2HQ(); DoSQV2HQ();
DoSawVHQ(); DoSawVHQ();
} }
void VRC6SyncHQ(int32_t ts) { static void VRC6SyncHQ(int32_t ts) {
int x; int x;
for (x = 0; x < 3; x++) cvbc[x] = ts; for (x = 0; x < 3; x++) cvbc[x] = ts;
} }

8
src/boards/vrc7.c
View File

@@ -45,7 +45,7 @@ static SFORMAT StateRegs[] =
/* VRC7 Sound */ /* VRC7 Sound */
void DoVRC7Sound(void) { static void DoVRC7Sound(void) {
int32_t z, a; int32_t z, a;
if (FSettings.soundq >= 1) if (FSettings.soundq >= 1)
return; return;
@@ -55,11 +55,11 @@ void DoVRC7Sound(void) {
dwave += a; dwave += a;
} }
void UpdateOPLNEO(int32_t *Wave, int Count) { static void UpdateOPLNEO(int32_t *WaveBuf, int Count) {
OPLL_fillbuf(VRC7Sound, Wave, Count, 4); OPLL_fillbuf(VRC7Sound, WaveBuf, Count, 4);
} }
void UpdateOPL(int Count) { static void UpdateOPL(int Count) {
int32_t z, a; int32_t z, a;
z = ((SOUNDTS << 16) / soundtsinc) >> 4; z = ((SOUNDTS << 16) / soundtsinc) >> 4;
a = z - dwave; a = z - dwave;

27
src/cart.h
View File

@@ -1,6 +1,8 @@
#ifndef _FCEU_CART_H #ifndef _FCEU_CART_H
#define _FCEU_CART_H #define _FCEU_CART_H
#include "fceu-types.h"
typedef struct { typedef struct {
/* Set by mapper/board code: */ /* Set by mapper/board code: */
void (*Power)(void); void (*Power)(void);
@@ -107,4 +109,29 @@ void FCEU_OpenGenie(void);
void FCEU_CloseGenie(void); void FCEU_CloseGenie(void);
void FCEU_KillGenie(void); void FCEU_KillGenie(void);
/* Helpers for the iNES1-vs-iNES2 sizing dichotomy.
*
* iNES1 headers don't carry explicit RAM-size fields, so mappers fall
* back to a default (typically 8 KiB WRAM). iNES2 headers do, in which
* case the runtime must use PRGRamSize + PRGRamSaveSize (resp.
* CHRRamSize + CHRRamSaveSize). This pattern was hand-coded at every
* site as `info->iNES2 ? (info->PRGRamSize + info->PRGRamSaveSize)
* : default_bytes`, which is verbose and easy to write inconsistently.
*
* These inline helpers centralise the rule. They return byte counts
* (caller divides by 1024 if it needs KiB). */
static INLINE uint32_t CartInfo_PRGRAM_bytes(const CartInfo *info, uint32_t default_bytes)
{
if (info->iNES2)
return (uint32_t)(info->PRGRamSize + info->PRGRamSaveSize);
return default_bytes;
}
static INLINE uint32_t CartInfo_CHRRAM_bytes(const CartInfo *info, uint32_t default_bytes)
{
if (info->iNES2)
return (uint32_t)(info->CHRRamSize + info->CHRRamSaveSize);
return default_bytes;
}
#endif #endif

2
src/cheat.c
View File

@@ -104,7 +104,7 @@ static DECLFR(SubCheatsRead) {
return(0); /* We should never get here. */ return(0); /* We should never get here. */
} }
void RebuildSubCheats(void) { static void RebuildSubCheats(void) {
int x; int x;
struct CHEATF *c = cheats; struct CHEATF *c = cheats;

2
src/driver.h
View File

@@ -127,7 +127,7 @@ void FCEUI_SetBaseDirectory(const char *dir);
/* Tells FCE Ultra to copy the palette data pointed to by pal and use it. /* Tells FCE Ultra to copy the palette data pointed to by pal and use it.
Data pointed to by pal needs to be 64*3 bytes in length. Data pointed to by pal needs to be 64*3 bytes in length.
*/ */
void FCEUI_SetPaletteArray(uint8_t *pal, int nEntries); void FCEUI_SetPaletteArray(uint8_t *data, int nEntries);
/* Sets up sound code to render sound at the specified rate, in samples /* Sets up sound code to render sound at the specified rate, in samples
per second. Only sample rates of 44100, 48000, and 96000 are currently per second. Only sample rates of 44100, 48000, and 96000 are currently

28
src/drivers/libretro/libretro-common/streams/file_stream_transforms.c
View File

@@ -26,7 +26,7 @@
#include <libretro.h> #include <libretro.h>
#include <streams/file_stream.h> #include <streams/file_stream.h>
RFILE* rfopen(const char *path, const char *mode) static RFILE* rfopen(const char *path, const char *mode)
{ {
RFILE *output = NULL; RFILE *output = NULL;
unsigned int retro_mode = RETRO_VFS_FILE_ACCESS_READ; unsigned int retro_mode = RETRO_VFS_FILE_ACCESS_READ;
@@ -67,7 +67,7 @@ RFILE* rfopen(const char *path, const char *mode)
return output; return output;
} }
int rfclose(RFILE* stream) static int rfclose(RFILE* stream)
{ {
if (!stream) if (!stream)
return EOF; return EOF;
@@ -75,7 +75,7 @@ int rfclose(RFILE* stream)
return filestream_close(stream); return filestream_close(stream);
} }
int64_t rftell(RFILE* stream) static int64_t rftell(RFILE* stream)
{ {
if (!stream) if (!stream)
return -1; return -1;
@@ -83,7 +83,7 @@ int64_t rftell(RFILE* stream)
return filestream_tell(stream); return filestream_tell(stream);
} }
int64_t rfseek(RFILE* stream, int64_t offset, int origin) static int64_t rfseek(RFILE* stream, int64_t offset, int origin)
{ {
int seek_position = -1; int seek_position = -1;
@@ -106,7 +106,7 @@ int64_t rfseek(RFILE* stream, int64_t offset, int origin)
return filestream_seek(stream, offset, seek_position); return filestream_seek(stream, offset, seek_position);
} }
int64_t rfread(void* buffer, static int64_t rfread(void* buffer,
size_t elem_size, size_t elem_count, RFILE* stream) size_t elem_size, size_t elem_count, RFILE* stream)
{ {
if (!stream || (elem_size == 0) || (elem_count == 0)) if (!stream || (elem_size == 0) || (elem_count == 0))
@@ -115,7 +115,7 @@ int64_t rfread(void* buffer,
return (filestream_read(stream, buffer, elem_size * elem_count) / elem_size); return (filestream_read(stream, buffer, elem_size * elem_count) / elem_size);
} }
char *rfgets(char *buffer, int maxCount, RFILE* stream) static char *rfgets(char *buffer, int maxCount, RFILE* stream)
{ {
if (!stream) if (!stream)
return NULL; return NULL;
@@ -123,7 +123,7 @@ char *rfgets(char *buffer, int maxCount, RFILE* stream)
return filestream_gets(stream, buffer, maxCount); return filestream_gets(stream, buffer, maxCount);
} }
int rfgetc(RFILE* stream) static int rfgetc(RFILE* stream)
{ {
if (!stream) if (!stream)
return EOF; return EOF;
@@ -131,7 +131,7 @@ int rfgetc(RFILE* stream)
return filestream_getc(stream); return filestream_getc(stream);
} }
int64_t rfwrite(void const* buffer, static int64_t rfwrite(void const* buffer,
size_t elem_size, size_t elem_count, RFILE* stream) size_t elem_size, size_t elem_count, RFILE* stream)
{ {
if (!stream || (elem_size == 0) || (elem_count == 0)) if (!stream || (elem_size == 0) || (elem_count == 0))
@@ -140,7 +140,7 @@ int64_t rfwrite(void const* buffer,
return (filestream_write(stream, buffer, elem_size * elem_count) / elem_size); return (filestream_write(stream, buffer, elem_size * elem_count) / elem_size);
} }
int rfputc(int character, RFILE * stream) static int rfputc(int character, RFILE * stream)
{ {
if (!stream) if (!stream)
return EOF; return EOF;
@@ -148,7 +148,7 @@ int rfputc(int character, RFILE * stream)
return filestream_putc(stream, character); return filestream_putc(stream, character);
} }
int64_t rfflush(RFILE * stream) static int64_t rfflush(RFILE * stream)
{ {
if (!stream) if (!stream)
return EOF; return EOF;
@@ -156,7 +156,7 @@ int64_t rfflush(RFILE * stream)
return filestream_flush(stream); return filestream_flush(stream);
} }
int rfprintf(RFILE * stream, const char * format, ...) static int rfprintf(RFILE * stream, const char * format, ...)
{ {
int result; int result;
va_list vl; va_list vl;
@@ -170,17 +170,17 @@ int rfprintf(RFILE * stream, const char * format, ...)
return result; return result;
} }
int rferror(RFILE* stream) static int rferror(RFILE* stream)
{ {
return filestream_error(stream); return filestream_error(stream);
} }
int rfeof(RFILE* stream) static int rfeof(RFILE* stream)
{ {
return filestream_eof(stream); return filestream_eof(stream);
} }
int rfscanf(RFILE * stream, const char * format, ...) static int rfscanf(RFILE * stream, const char * format, ...)
{ {
int result; int result;
va_list vl; va_list vl;

2
src/drivers/libretro/libretro-common/vfs/vfs_implementation.c
View File

@@ -221,7 +221,7 @@
#define RFILE_HINT_UNBUFFERED (1 << 8) #define RFILE_HINT_UNBUFFERED (1 << 8)
int64_t retro_vfs_file_seek_internal( static int64_t retro_vfs_file_seek_internal(
libretro_vfs_implementation_file *stream, libretro_vfs_implementation_file *stream,
int64_t offset, int whence) int64_t offset, int whence)
{ {

21
src/drivers/libretro/libretro.c
View File

@@ -308,6 +308,7 @@ extern int zapper_sensor_invert_option;
/* emulator-specific callback functions */ /* emulator-specific callback functions */
const char *GetKeyboard(void); /* used by src/boards/transformer.c */
const char * GetKeyboard(void) const char * GetKeyboard(void)
{ {
return ""; return "";
@@ -406,7 +407,7 @@ void FCEUD_DispMessage(enum retro_log_level level, unsigned duration, const char
} }
} }
void FCEUD_SoundToggle (void) static void FCEUD_SoundToggle (void)
{ {
FCEUI_SetSoundVolume(sndvolume); FCEUI_SetSoundVolume(sndvolume);
} }
@@ -1904,20 +1905,20 @@ static void retro_set_custom_palette(void)
*/ */
static void FCEUD_RegionOverride(unsigned region) static void FCEUD_RegionOverride(unsigned region)
{ {
unsigned pal = 0; unsigned is_pal = 0;
unsigned d = 0; unsigned d = 0;
switch (region) switch (region)
{ {
case 0: /* auto */ case 0: /* auto */
d = (systemRegion >> 1) & 1; d = (systemRegion >> 1) & 1;
pal = systemRegion & 1; is_pal = systemRegion & 1;
break; break;
case 1: /* ntsc */ case 1: /* ntsc */
FCEUD_DispMessage(RETRO_LOG_INFO, 2000, "System: NTSC"); FCEUD_DispMessage(RETRO_LOG_INFO, 2000, "System: NTSC");
break; break;
case 2: /* pal */ case 2: /* pal */
pal = 1; is_pal = 1;
FCEUD_DispMessage(RETRO_LOG_INFO, 2000, "System: PAL"); FCEUD_DispMessage(RETRO_LOG_INFO, 2000, "System: PAL");
break; break;
case 3: /* dendy */ case 3: /* dendy */
@@ -1927,7 +1928,7 @@ static void FCEUD_RegionOverride(unsigned region)
} }
dendy = d; dendy = d;
FCEUI_SetVidSystem(pal); FCEUI_SetVidSystem(is_pal);
ResetPalette(); ResetPalette();
} }
@@ -2458,7 +2459,7 @@ static void check_variables(bool startup)
update_option_visibility(); update_option_visibility();
} }
void add_powerpad_input(unsigned port, uint32_t variant, uint32_t *ppdata) { static void add_powerpad_input(unsigned port, uint32_t variant, uint32_t *ppdata) {
unsigned k; unsigned k;
const uint32_t* map = powerpadmap; const uint32_t* map = powerpadmap;
for (k = 0 ; k < 12 ; k++) for (k = 0 ; k < 12 ; k++)
@@ -2466,7 +2467,7 @@ void add_powerpad_input(unsigned port, uint32_t variant, uint32_t *ppdata) {
*ppdata |= (1 << k); *ppdata |= (1 << k);
} }
void add_fkb_input(unsigned port, uint32_t variant, uint8_t *fkbkeys) { static void add_fkb_input(unsigned port, uint32_t variant, uint8_t *fkbkeys) {
unsigned k; unsigned k;
const uint32_t* map = fkbmap; const uint32_t* map = fkbmap;
for (k = 0 ; k < 0x48 ; k++) for (k = 0 ; k < 0x48 ; k++)
@@ -2476,7 +2477,7 @@ void add_fkb_input(unsigned port, uint32_t variant, uint8_t *fkbkeys) {
fkbkeys[k]=0; fkbkeys[k]=0;
} }
void add_suborkey_input(unsigned port, uint32_t variant, uint8_t *suborkeys) { static void add_suborkey_input(unsigned port, uint32_t variant, uint8_t *suborkeys) {
unsigned k; unsigned k;
const uint32_t* map = suborkbmap; const uint32_t* map = suborkbmap;
for (k = 0 ; k < 0x65 ; k++) for (k = 0 ; k < 0x65 ; k++)
@@ -2488,7 +2489,7 @@ void add_suborkey_input(unsigned port, uint32_t variant, uint8_t *suborkeys) {
static int mzx = 0, mzy = 0; static int mzx = 0, mzy = 0;
void get_mouse_input(unsigned port, uint32_t variant, uint32_t *mousedata) static void get_mouse_input(unsigned port, uint32_t variant, uint32_t *mousedata)
{ {
int min_width, min_height, max_width, max_height; int min_width, min_height, max_width, max_height;
@@ -2910,7 +2911,7 @@ static void FCEUD_UpdateInput(void)
palette_switch_counter = 0; palette_switch_counter = 0;
} }
void FCEUD_Update(uint8_t *XBuf, int32_t *Buffer, int Count) static void FCEUD_Update(uint8_t *XBuf, int32_t *Buffer, int Count)
{ {
} }

12
src/drivers/libretro/libretro_dipswitch.c
View File

@@ -4,7 +4,6 @@
#include <string.h> #include <string.h>
#include <compat/strl.h> #include <compat/strl.h>
#include "../../fceu.h" #include "../../fceu.h"
#include "../../fceu-types.h" #include "../../fceu-types.h"
#include "../../vsuni.h" #include "../../vsuni.h"
@@ -1110,8 +1109,15 @@ static void make_core_options(struct retro_core_option_v2_definition *vs_core_op
memset(&vs_core_options[i], 0, memset(&vs_core_options[i], 0,
sizeof(struct retro_core_option_v2_definition)); sizeof(struct retro_core_option_v2_definition));
/* Set core key and sanitize string */ /* Set core key and sanitize string. Build "fceumm_dipswitch_<game>-<option>"
snprintf(key, sizeof(key), "fceumm_dipswitch_%s-%s", game_name, option_name); * with strlcpy/strlcat instead of snprintf, since snprintf isn't
* available on pre-MSVC2015 unless compat_snprintf.c is linked
* (some build configurations omit it). strlcpy/strlcat truncate
* safely if the inputs together would overflow key[]. */
strlcpy(key, "fceumm_dipswitch_", sizeof(key));
strlcat(key, game_name, sizeof(key));
strlcat(key, "-", sizeof(key));
strlcat(key, option_name, sizeof(key));
{ {
size_t key_size = strlen(key) + 1; size_t key_size = strlen(key) + 1;
core_key[i] = calloc(key_size, sizeof(char)); core_key[i] = calloc(key_size, sizeof(char));

31
src/fceu-endian.c
View File

@@ -52,6 +52,37 @@ void FlipByteOrder(uint8_t *src, uint32_t count)
} }
} }
void FlipByteOrderStrided(uint8_t *src, uint32_t count, uint32_t stride)
{
uint32_t off;
if (stride <= 1 || !count)
return;
if (count % stride)
return; /* malformed - bail rather than half-swap */
/* For arrays of multi-byte primitives we byte-swap each element
* independently. The previous code (FlipByteOrder) reversed the
* entire buffer end-to-end, which is correct for a single
* primitive but wrong for an array - it would swap element 0
* with element N-1 and reverse their bytes too, scrambling the
* data. With per-element strides, [a0 a1 b0 b1] becomes
* [a1 a0 b1 b0] (correct), not [b1 b0 a1 a0] (legacy bug). */
for (off = 0; off < count; off += stride)
{
uint8_t *s = src + off;
uint8_t *e = s + stride - 1;
while (s < e)
{
uint8_t tmp = *e;
*e = *s;
*s = tmp;
e--;
s++;
}
}
}
int write32le_mem(uint32_t b, memstream_t *mem) int write32le_mem(uint32_t b, memstream_t *mem)
{ {
uint8_t s[4]; uint8_t s[4];

6
src/fceu-endian.h
View File

@@ -9,6 +9,12 @@ int read32le_mem(uint32_t *Bufo, memstream_t *mem);
void FlipByteOrder(uint8_t *src, uint32_t count); void FlipByteOrder(uint8_t *src, uint32_t count);
/* Byte-swap each `stride`-byte element in `src` in place. Used for
* savestate fields that contain arrays of multi-byte primitives,
* where we want each element swapped independently (not the whole
* buffer reversed end-to-end as FlipByteOrder does). */
void FlipByteOrderStrided(uint8_t *src, uint32_t count, uint32_t stride);
void FCEU_en32lsb(uint8_t *, uint32_t); void FCEU_en32lsb(uint8_t *, uint32_t);
uint32_t FCEU_de32lsb(const uint8_t *); uint32_t FCEU_de32lsb(const uint8_t *);

2
src/fceu.c
View File

@@ -421,7 +421,7 @@ void FCEU_MemoryRand(uint8_t *ptr, uint32_t size)
} }
} }
void hand(X6502 *X, int type, uint32_t A) static void hand(X6502 *X, int type, uint32_t A)
{ {
} }

8
src/fds.c
View File

@@ -110,7 +110,7 @@ uint32_t FDSROM_size(void) {
return (FDSROMSize); return (FDSROMSize);
} }
void FDSGI(int h) { static void FDSGI(int h) {
switch (h) { switch (h) {
case GI_CLOSE: FDSClose(); break; case GI_CLOSE: FDSClose(); break;
case GI_POWER: FDSInit(); break; case GI_POWER: FDSInit(); break;
@@ -749,7 +749,11 @@ int FDSLoad(const char *name, FCEUFILE *fp) {
for (x = 0; x < TotalSides; x++) { for (x = 0; x < TotalSides; x++) {
char temp[5]; char temp[5];
snprintf(temp, sizeof(temp), "DDT%d", x); /* TotalSides is capped to 8 above, so the formatted string is
* at most "DDT8\0" - exactly fits temp[5]. sprintf is portable;
* snprintf isn't on pre-MSVC2015 without linking
* compat_snprintf.c. */
sprintf(temp, "DDT%d", x);
AddExState(diskdata[x], 65500, 0, temp); AddExState(diskdata[x], 65500, 0, temp);
} }

4
src/fds.h
View File

@@ -1,6 +1,8 @@
#ifndef _FCEU_FDS_H #ifndef _FCEU_FDS_H
#define _FCEU_FDS_H #define _FCEU_FDS_H
#include "file.h"
uint8_t *FDSROM_ptr(void); uint8_t *FDSROM_ptr(void);
uint32_t FDSROM_size(void); uint32_t FDSROM_size(void);
@@ -8,4 +10,6 @@ void FCEU_FDSInsert(int oride);
void FCEU_FDSEject(void); void FCEU_FDSEject(void);
void FCEU_FDSSelect(void); void FCEU_FDSSelect(void);
int FDSLoad(const char *name, FCEUFILE *fp);
#endif #endif

5
src/fds_apu.c
View File

@@ -25,6 +25,7 @@
#include "fceu.h" #include "fceu.h"
#include "sound.h" #include "sound.h"
#include "state.h" #include "state.h"
#include "fds_apu.h"
#define FDSClock (1789772.7272727272727272 / 2) #define FDSClock (1789772.7272727272727272 / 2)
@@ -253,7 +254,7 @@ static void HQSync(int32_t ts) {
FBC = ts; FBC = ts;
} }
void FDSSound(int c) { static void FDSSound(int c) {
RenderSound(); RenderSound();
FBC = c; FBC = c;
} }
@@ -282,7 +283,7 @@ void FDSSoundReset(void) {
GameExpSound.RChange = FDS_ESI; GameExpSound.RChange = FDS_ESI;
} }
uint8_t FDSSoundRead(uint32_t A) { static uint8_t FDSSoundRead(uint32_t A) {
if (A >= 0x4040 && A < 0x4080) return FDSWaveRead(A); if (A >= 0x4040 && A < 0x4080) return FDSWaveRead(A);
if (A >= 0x4090 && A < 0x4093) return FDSSRead(A); if (A >= 0x4090 && A < 0x4093) return FDSSRead(A);
return X.DB; return X.DB;

1
src/fds_apu.h
View File

@@ -8,7 +8,6 @@ void FDSSoundStateAdd(void);
/* Used for FDS conversion-based mappers to allow access to FDS APU registers */ /* Used for FDS conversion-based mappers to allow access to FDS APU registers */
void FDSSoundPower(void); void FDSSoundPower(void);
uint8_t FDSSoundRead(uint32_t A); /* $4040-$407F, $4090-$4092 */
void FDSSoundWrite(uint32_t A, uint8_t V); /* $4040-$407F, $4080-$408A */ void FDSSoundWrite(uint32_t A, uint8_t V); /* $4040-$407F, $4080-$408A */
#endif /* FDS_APU_H */ #endif /* FDS_APU_H */

39
src/ines.c
View File

@@ -25,7 +25,6 @@
#include <math.h> #include <math.h>
#include <compat/strl.h> #include <compat/strl.h>
#include "fceu-types.h" #include "fceu-types.h"
#include "x6502.h" #include "x6502.h"
#include "fceu.h" #include "fceu.h"
@@ -397,28 +396,32 @@ static void CheckHInfo(void)
if (tofix) { if (tofix) {
char gigastr[768]; char gigastr[768];
char fragment[256];
size_t pos; size_t pos;
/* Each piece appends to the running buffer rather than (as the /* Each piece appends to the running buffer rather than (as the
* previous code did) clobbering the same suffix from a fixed * previous code did) clobbering the same suffix from a fixed
* offset captured once at the start. snprintf into the tail * offset captured once at the start. We format into a small
* keeps writes bounded; strlcpy at offset replaces strcat. */ * stack buffer with sprintf (the format strings have known
* bounded output), then strlcat into gigastr. This avoids
* relying on snprintf being available, which it isn't on
* pre-MSVC2015 toolchains unless the compat/compat_snprintf
* shim is linked in (and some build configurations -
* STATIC_LINKING=1 in particular - omit it). */
pos = strlcpy(gigastr, " The iNES header contains incorrect information. For now, the information will be corrected in RAM. ", sizeof(gigastr)); pos = strlcpy(gigastr, " The iNES header contains incorrect information. For now, the information will be corrected in RAM. ", sizeof(gigastr));
if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1; if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1;
if (tofix & 1) { if (tofix & 1) {
int n = snprintf(gigastr + pos, sizeof(gigastr) - pos, sprintf(fragment, "Current mapper # is %d. The mapper number should be set to %d. ",
"Current mapper # is %d. The mapper number should be set to %d. ",
current_mapper, iNESCart.mapper); current_mapper, iNESCart.mapper);
if (n > 0) pos += (size_t)n; pos += strlcpy(gigastr + pos, fragment, sizeof(gigastr) - pos);
if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1; if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1;
} }
if (tofix & 2) { if (tofix & 2) {
uint8_t *mstr[3] = { (uint8_t*)"Horizontal", (uint8_t*)"Vertical", (uint8_t*)"Four-screen" }; uint8_t *mstr[3] = { (uint8_t*)"Horizontal", (uint8_t*)"Vertical", (uint8_t*)"Four-screen" };
int n = snprintf(gigastr + pos, sizeof(gigastr) - pos, sprintf(fragment, "Current mirroring is %s. Mirroring should be set to \"%s\". ",
"Current mirroring is %s. Mirroring should be set to \"%s\". ",
mstr[cur_mirr & 3], mstr[iNESCart.mirror & 3]); mstr[cur_mirr & 3], mstr[iNESCart.mirror & 3]);
if (n > 0) pos += (size_t)n; pos += strlcpy(gigastr + pos, fragment, sizeof(gigastr) - pos);
if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1; if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1;
} }
if (tofix & 4) { if (tofix & 4) {
@@ -431,27 +434,25 @@ static void CheckHInfo(void)
} }
if (tofix & 16) { if (tofix & 16) {
uint8_t *rstr[4] = { (uint8_t*)"NTSC", (uint8_t*)"PAL", (uint8_t*)"Multi", (uint8_t*)"Dendy" }; uint8_t *rstr[4] = { (uint8_t*)"NTSC", (uint8_t*)"PAL", (uint8_t*)"Multi", (uint8_t*)"Dendy" };
int n = snprintf(gigastr + pos, sizeof(gigastr) - pos, sprintf(fragment, "This game should run with \"%s\" timings.",
"This game should run with \"%s\" timings.",
rstr[iNESCart.region]); rstr[iNESCart.region]);
if (n > 0) pos += (size_t)n; pos += strlcpy(gigastr + pos, fragment, sizeof(gigastr) - pos);
if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1; if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1;
} }
if (tofix & 32) { if (tofix & 32) {
unsigned PRGRAM = iNESCart.PRGRamSize + iNESCart.PRGRamSaveSize; unsigned PRGRAM = iNESCart.PRGRamSize + iNESCart.PRGRamSaveSize;
unsigned CHRRAM = iNESCart.CHRRamSize + iNESCart.CHRRamSaveSize; unsigned CHRRAM = iNESCart.CHRRamSize + iNESCart.CHRRamSaveSize;
if (PRGRAM || CHRRAM) { if (PRGRAM || CHRRAM) {
int n;
if (iNESCart.PRGRamSaveSize == 0) if (iNESCart.PRGRamSaveSize == 0)
n = snprintf(gigastr + pos, sizeof(gigastr) - pos, "workram: %d KB, ", PRGRAM / 1024); sprintf(fragment, "workram: %d KB, ", PRGRAM / 1024);
else if (iNESCart.PRGRamSize == 0) else if (iNESCart.PRGRamSize == 0)
n = snprintf(gigastr + pos, sizeof(gigastr) - pos, "saveram: %d KB, ", PRGRAM / 1024); sprintf(fragment, "saveram: %d KB, ", PRGRAM / 1024);
else else
n = snprintf(gigastr + pos, sizeof(gigastr) - pos, "workram: %d KB (%dKB battery-backed), ", PRGRAM / 1024, iNESCart.PRGRamSaveSize / 1024); sprintf(fragment, "workram: %d KB (%dKB battery-backed), ", PRGRAM / 1024, iNESCart.PRGRamSaveSize / 1024);
if (n > 0) pos += (size_t)n; pos += strlcpy(gigastr + pos, fragment, sizeof(gigastr) - pos);
if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1; if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1;
n = snprintf(gigastr + pos, sizeof(gigastr) - pos, "chrram: %d KB.", (CHRRAM + iNESCart.CHRRamSaveSize) / 1024); sprintf(fragment, "chrram: %d KB.", (CHRRAM + iNESCart.CHRRamSaveSize) / 1024);
if (n > 0) pos += (size_t)n; pos += strlcpy(gigastr + pos, fragment, sizeof(gigastr) - pos);
if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1; if (pos >= sizeof(gigastr)) pos = sizeof(gigastr) - 1;
} }
} }

4
src/ines.h
View File

@@ -22,6 +22,8 @@
#ifndef _FCEU_INES_H #ifndef _FCEU_INES_H
#define _FCEU_INES_H #define _FCEU_INES_H
#include "file.h"
typedef struct { typedef struct {
char ID[4]; /*NES^Z*/ char ID[4]; /*NES^Z*/
uint8_t ROM_size; uint8_t ROM_size;
@@ -510,4 +512,6 @@ void Mapper617_Init(CartInfo *);
void Mapper618_Init(CartInfo *); void Mapper618_Init(CartInfo *);
void FFE_Init(CartInfo *); void FFE_Init(CartInfo *);
int iNESLoad(const char *name, FCEUFILE *fp);
#endif #endif

3
src/input.c
View File

@@ -130,6 +130,7 @@ void FCEU_DrawInput(uint8_t *buf)
/* This function is a quick hack to get the NSF player to use emulated gamepad /* This function is a quick hack to get the NSF player to use emulated gamepad
input. input.
*/ */
uint8_t FCEU_GetJoyJoy(void); /* used by src/nsf.c */
uint8_t FCEU_GetJoyJoy(void) { uint8_t FCEU_GetJoyJoy(void) {
return(joy[0] | joy[1] | joy[2] | joy[3]); return(joy[0] | joy[1] | joy[2] | joy[3]);
} }
@@ -440,7 +441,7 @@ void FCEU_DoSimpleCommand(int cmd)
} }
} }
void FCEU_QSimpleCommand(int cmd) static void FCEU_QSimpleCommand(int cmd)
{ {
FCEU_DoSimpleCommand(cmd); FCEU_DoSimpleCommand(cmd);
} }

31
src/input.h
View File

@@ -27,4 +27,35 @@ extern void (*InputScanlineHook)(uint8_t *bg, uint8_t *spr, uint32_t linets, int
void FCEU_DoSimpleCommand(int cmd); void FCEU_DoSimpleCommand(int cmd);
/* Input device initialisers. Defined in src/input/*.c, called from
* src/input.c. Centralised here so each .c file can include this
* header and get a matching prototype, satisfying
* -Wmissing-prototypes. */
INPUTC *FCEU_InitZapper(int w);
INPUTC *FCEU_InitMouse(int w);
INPUTC *FCEU_InitPowerpadA(int w);
INPUTC *FCEU_InitPowerpadB(int w);
INPUTC *FCEU_InitArkanoid(int w);
INPUTC *FCEU_InitVirtualBoy(int w);
INPUTC *FCEU_InitLCDCompZapper(int w);
INPUTCFC *FCEU_InitArkanoidFC(void);
INPUTCFC *FCEU_InitSpaceShadow(void);
INPUTCFC *FCEU_InitFKB(void);
INPUTCFC *FCEU_InitSuborKB(void);
INPUTCFC *FCEU_InitPEC586KB(void);
INPUTCFC *FCEU_InitHS(void);
INPUTCFC *FCEU_InitMahjong(void);
INPUTCFC *FCEU_InitFamilyTrainerA(void);
INPUTCFC *FCEU_InitFamilyTrainerB(void);
INPUTCFC *FCEU_InitOekaKids(void);
INPUTCFC *FCEU_InitTopRider(void);
INPUTCFC *FCEU_InitBarcodeWorld(void);
INPUTCFC *FCEU_InitBattleBox(void);
INPUTCFC *FCEU_InitQuizKing(void);
INPUTCFC *FCEU_InitFTrainerA(void);
INPUTCFC *FCEU_InitFTrainerB(void);
void FCEU_ZapperSetTolerance(int x);
#endif #endif

2
src/input/powerpad.c
View File

@@ -44,7 +44,7 @@ static void FP_FASTAPASS(1) StrobePP(int w) {
pprsb[w] = 0; pprsb[w] = 0;
} }
void FP_FASTAPASS(3) UpdatePP(int w, void *data, int arg) { static void FP_FASTAPASS(3) UpdatePP(int w, void *data, int arg) {
static const char shifttableA[12] = { 8, 9, 0, 1, 11, 7, 4, 2, 10, 6, 5, 3 }; static const char shifttableA[12] = { 8, 9, 0, 1, 11, 7, 4, 2, 10, 6, 5, 3 };
static const char shifttableB[12] = { 1, 0, 9, 8, 2, 4, 7, 11, 3, 5, 6, 10 }; static const char shifttableB[12] = { 1, 0, 9, 8, 2, 4, 7, 11, 3, 5, 6, 10 };
int x; int x;

9
src/nsf.c
View File

@@ -24,7 +24,6 @@
#include <math.h> #include <math.h>
#include <compat/strl.h> #include <compat/strl.h>
#include "fceu-types.h" #include "fceu-types.h"
#include "x6502.h" #include "x6502.h"
#include "fceu.h" #include "fceu.h"
@@ -97,7 +96,7 @@ static NSF_HEADER NSFHeader;
void NSFMMC5_Close(void); void NSFMMC5_Close(void);
static uint8_t *ExWRAM = 0; static uint8_t *ExWRAM = 0;
void NSFGI(int h) { static void NSFGI(int h) {
switch (h) { switch (h) {
case GI_CLOSE: case GI_CLOSE:
if (NSFDATA) { if (NSFDATA) {
@@ -484,7 +483,11 @@ void DrawNSF(uint8_t *XBuf) {
DrawTextTrans(XBuf + 42 * 256 + 4 + (((31 - strlen((char*)NSFHeader.Copyright)) << 2)), 256, NSFHeader.Copyright, 6); DrawTextTrans(XBuf + 42 * 256 + 4 + (((31 - strlen((char*)NSFHeader.Copyright)) << 2)), 256, NSFHeader.Copyright, 6);
DrawTextTrans(XBuf + 70 * 256 + 4 + (((31 - (sizeof("Song:") - 1)) << 2)), 256, (uint8_t*)"Song:", 6); DrawTextTrans(XBuf + 70 * 256 + 4 + (((31 - (sizeof("Song:") - 1)) << 2)), 256, (uint8_t*)"Song:", 6);
snprintf(snbuf, sizeof(snbuf), "<%d/%d>", CurrentSong, NSFHeader.TotalSongs); /* CurrentSong / NSFHeader.TotalSongs are uint8_t, so the formatted
* string is at most "<255/255>" (9 chars) which fits trivially in
* snbuf[16]. sprintf is portable; snprintf isn't on pre-MSVC2015
* without linking compat_snprintf.c. */
sprintf(snbuf, "<%d/%d>", CurrentSong, NSFHeader.TotalSongs);
DrawTextTrans(XBuf + 82 * 256 + 4 + (((31 - strlen(snbuf)) << 2)), 256, (uint8_t*)snbuf, 6); DrawTextTrans(XBuf + 82 * 256 + 4 + (((31 - strlen(snbuf)) << 2)), 256, (uint8_t*)snbuf, 6);
{ {

3
src/nsf.h
View File

@@ -21,6 +21,8 @@
#ifndef _FCEU_NSF_H #ifndef _FCEU_NSF_H
#define _FCEU_NSF_H #define _FCEU_NSF_H
#include "file.h"
typedef struct { typedef struct {
char ID[5]; /* NESM^Z */ char ID[5]; /* NESM^Z */
uint8_t Version; uint8_t Version;
@@ -48,5 +50,6 @@ void DrawNSF(uint8_t *XBuf);
void NSFDealloc(void); void NSFDealloc(void);
void NSFDodo(void); void NSFDodo(void);
void DoNSFFrame(void); void DoNSFFrame(void);
int NSFLoad(FCEUFILE *fp);
#endif #endif

4
src/ntsc/nes_ntsc_impl.h
View File

@@ -241,7 +241,7 @@ static void init( init_t* impl, nes_ntsc_setup_t const* setup )
do do
{ {
float const* in = decoder; float const* in = decoder;
int n = 3; int k = 3;
do do
{ {
float i = *in++; float i = *in++;
@@ -249,7 +249,7 @@ static void init( init_t* impl, nes_ntsc_setup_t const* setup )
*out++ = i * c - q * s; *out++ = i * c - q * s;
*out++ = i * s + q * c; *out++ = i * s + q * c;
} }
while ( --n ); while ( --k );
if ( burst_count <= 1 ) if ( burst_count <= 1 )
break; break;
ROTATE_IQ( s, c, 0.866025f, -0.5f ); /* +120 degrees */ ROTATE_IQ( s, c, 0.866025f, -0.5f ); /* +120 degrees */

10
src/palette.c
View File

@@ -93,16 +93,16 @@ static void ApplyDeemphasisComplete(pal *pal512) {
} }
} }
void FCEUI_SetPaletteArray(uint8_t *pal, int nEntries) { void FCEUI_SetPaletteArray(uint8_t *data, int nEntries) {
if (!pal || !nEntries) if (!data || !nEntries)
palette_user_available = false; palette_user_available = false;
else { else {
int x; int x;
palette_user_available = true; palette_user_available = true;
for (x = 0; x < nEntries; x++) { for (x = 0; x < nEntries; x++) {
palette_user[x].r = *((uint8_t*)pal + x + x + x); palette_user[x].r = *((uint8_t*)data + x + x + x);
palette_user[x].g = *((uint8_t*)pal + x + x + x + 1); palette_user[x].g = *((uint8_t*)data + x + x + x + 1);
palette_user[x].b = *((uint8_t*)pal + x + x + x + 2); palette_user[x].b = *((uint8_t*)data + x + x + x + 2);
} }
if (nEntries != 512) { if (nEntries != 512) {
ApplyDeemphasisComplete(palette_user); ApplyDeemphasisComplete(palette_user);

2
src/ppu.c
View File

@@ -134,7 +134,7 @@ uint8_t UPALRAM[0x03];/* for 0x4/0x8/0xC addresses in palette, the ones in
#define MMC5SPRVRAMADR(V) &MMC5SPRVPage[(V) >> 10][(V)] #define MMC5SPRVRAMADR(V) &MMC5SPRVPage[(V) >> 10][(V)]
#define VRAMADR(V) &VPage[(V) >> 10][(V)] #define VRAMADR(V) &VPage[(V) >> 10][(V)]
uint8_t * MMC5BGVRAMADR(uint32_t V) { static uint8_t * MMC5BGVRAMADR(uint32_t V) {
if (!Sprite16) { if (!Sprite16) {
extern uint8_t mmc5ABMode; /* A=0, B=1 */ extern uint8_t mmc5ABMode; /* A=0, B=1 */
if (mmc5ABMode == 0) if (mmc5ABMode == 0)

4
src/sound.c
View File

@@ -505,7 +505,7 @@ void FASTAPASS(1) FCEU_SoundCPUHook(int cycles) {
} }
} }
void RDoPCM(void) { static void RDoPCM(void) {
uint32_t V; uint32_t V;
for (V = ChannelBC[4]; V < SOUNDTS; V++) for (V = ChannelBC[4]; V < SOUNDTS; V++)
@@ -915,7 +915,7 @@ static void RDoNoise(void) {
ChannelBC[3] = SOUNDTS; ChannelBC[3] = SOUNDTS;
} }
DECLFW(Write_IRQFM) { static DECLFW(Write_IRQFM) {
V = (V & 0xC0) >> 6; V = (V & 0xC0) >> 6;
fcnt = 0; fcnt = 0;
if (V & 2) if (V & 2)

2
src/sound.h
View File

@@ -30,7 +30,7 @@ typedef struct {
often) in lq mode than in high-quality mode. Maybe that often) in lq mode than in high-quality mode. Maybe that
should be fixed. :) should be fixed. :)
*/ */
void (*NeoFill)(int32_t *Wave, int Count); void (*NeoFill)(int32_t *WaveBuf, int Count);
void (*HiFill)(void); void (*HiFill)(void);
void (*HiSync)(int32_t ts); void (*HiSync)(int32_t ts);

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