@@ -35,17 +35,18 @@ static SFORMAT StateRegs[] =
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};
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static void Sync(void) {
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int prg = (preg & 7) | ((preg >> 3) & 0x08); // There is a high bit 3 of the PRG register that applies both to PRG and CHR
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int prg = (preg & 7) | ((preg >> 3) & 0x08); /* There is a high bit 3 of the PRG register that applies both to PRG and CHR */
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int chr = (creg & 7) | ((preg >> 3) & 0x08); /* There is a high bit 3 of the PRG register that applies both to PRG and CHR */
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int mask = (creg & 0x10)? 0: (creg & 0x20)? 1: 3; /* There is an CNROM mode that takes either two or four inner CHR banks from a CNROM-like latch register at $8000-$FFFF. */
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if (preg & 8) {
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setprg16(0x8000, prg);
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setprg16(0xc000, prg);
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}
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else
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setprg32(0x8000, prg >> 1);
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int chr = (creg & 7) | ((preg >> 3) & 0x08); // There is a high bit 3 of the PRG register that applies both to PRG and CHR
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int mask = (creg & 0x10)? 0: (creg & 0x20)? 1: 3; // There is an CNROM mode that takes either two or four inner CHR banks from a CNROM-like latch register at $8000-$FFFF.
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setchr8((chr &~mask) | (latch &mask)); // This "inner CHR bank" substitutes the respective bit(s) of the creg register.
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setchr8((chr &~mask) | (latch &mask)); /* This "inner CHR bank" substitutes the respective bit(s) of the creg register. */
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setmirror(((preg >> 4) & 1) ^ 1);
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}
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@@ -53,8 +54,7 @@ static void Sync(void) {
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static DECLFR(BMCWSRead) {
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if ((creg >> 6) & (dipSwitch &3))
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return X.DB;
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else
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return CartBR(A);
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return CartBR(A);
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}
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static DECLFW(BMCWSWrite) {
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@@ -81,10 +81,11 @@ static void MBMCWSPower(void) {
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}
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static void BMCWSReset(void) {
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dipSwitch++; // Soft-resetting cycles through solder pad or DIP switch settings
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if (dipSwitch == 3) dipSwitch = 0; // Only 00b, 01b and 10b settings are valid
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dipSwitch++; /* Soft-resetting cycles through solder pad or DIP switch settings */
|
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if (dipSwitch == 3)
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dipSwitch = 0; /* Only 00b, 01b and 10b settings are valid */
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// Always reset to menu
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/* Always reset to menu */
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preg =0;
|
||||
creg =0;
|
||||
latch =0;
|
||||
|
||||
Reference in New Issue
Block a user