Rewrite mapper 183 to use modular VRC2/4 emulation.

This commit is contained in:
NewRisingSun
2025-04-07 22:39:03 +02:00
committed by LibretroAdmin
parent 553865663d
commit 5d8e14136f
4 changed files with 29 additions and 80 deletions

View File

@@ -1,7 +1,7 @@
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
* Copyright (C) 2005 CaH4e3
* Copyright (C) 2025 NewRisingSun
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,96 +16,40 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* Gimmick Bootleg (VRC4 mapper)
*/
#include "mapinc.h"
#include "vrc2and4.h"
static uint8 prg[4], chr[8], mirr;
static uint8 IRQCount;
static uint8 IRQPre;
static uint8 IRQa;
static uint8 prg;
static uint16 irqCounter;
static SFORMAT StateRegs[] =
{
{ prg, 4, "PRG" },
{ chr, 8, "CHR" },
{ &mirr, 1, "MIRR" },
{ &IRQCount, 1, "IRQC" },
{ &IRQPre, 1, "IRQP" },
{ &IRQa, 1, "IRQA" },
static SFORMAT Mapper183_stateRegs[] ={
{ &prg, 1, "PRG6" },
{ 0 }
};
static void SyncPrg(void) {
setprg8(0x6000, prg[3]);
setprg8(0x8000, prg[0]);
setprg8(0xA000, prg[1]);
setprg8(0xC000, prg[2]);
setprg8(0xE000, ~0);
static void sync () {
setprg8(0x6000, prg);
VRC24_syncPRG(0x01F, 0x000);
VRC24_syncCHR(0x1FF, 0x000);
VRC24_syncMirror();
}
static void SyncMirr(void) {
switch (mirr) {
case 0: setmirror(MI_V); break;
case 1: setmirror(MI_H); break;
case 2: setmirror(MI_0); break;
case 3: setmirror(MI_1); break;
}
DECLFW(Mapper183_writePRG) {
prg =A &0xFF;
VRC24_Sync();
}
static void SyncChr(void) {
int i;
for (i = 0; i < 8; i++)
setchr1(i << 10, chr[i]);
void Mapper183_power(void) {
prg =0;
VRC24_power();
}
static void StateRestore(int version) {
SyncPrg();
SyncChr();
SyncMirr();
}
static DECLFW(M183Write) {
if ((A & 0xF800) == 0x6800) {
prg[3] = A & 0x3F;
SyncPrg();
} else if (((A & 0xF80C) >= 0xB000) && ((A & 0xF80C) <= 0xE00C)) {
int index = (((A >> 11) - 6) | (A >> 3)) & 7;
chr[index] = (chr[index] & (0xF0 >> (A & 4))) | ((V & 0x0F) << (A & 4));
SyncChr();
} else switch (A & 0xF80C) {
case 0x8800: prg[0] = V; SyncPrg(); break;
case 0xA800: prg[1] = V; SyncPrg(); break;
case 0xA000: prg[2] = V; SyncPrg(); break;
case 0x9800: mirr = V & 3; SyncMirr(); break;
case 0xF000: IRQCount = ((IRQCount & 0xF0) | (V & 0xF)); break;
case 0xF004: IRQCount = ((IRQCount & 0x0F) | ((V & 0xF) << 4)); break;
case 0xF008: IRQa = V; if (!V) IRQPre = 0; X6502_IRQEnd(FCEU_IQEXT); break;
case 0xF00C: IRQPre = 16; break;
}
}
static void M183IRQCounter(void) {
if (IRQa) {
IRQCount++;
if ((IRQCount - IRQPre) == 238)
X6502_IRQBegin(FCEU_IQEXT);
}
}
static void M183Power(void) {
IRQPre = IRQCount = IRQa = 0;
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0xFFFF, M183Write);
SyncPrg();
SyncChr();
}
void Mapper183_Init(CartInfo *info) {
info->Power = M183Power;
GameHBIRQHook = M183IRQCounter;
GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
void Mapper183_Init (CartInfo *info) {
VRC24_init(info, sync, 0x04, 0x08, 1, 1, 0);
VRC24_WRAMRead =CartBR;
VRC24_WRAMWrite =Mapper183_writePRG;
AddExState(Mapper183_stateRegs, ~0, 0, 0);
info->Power =Mapper183_power;
}

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@@ -22,6 +22,7 @@
#include "vrc2and4.h"
static void sync () {
VRC24_syncWRAM(0);
VRC24_syncPRG(0x01F, 0x000);
VRC24_syncCHR(0x1FF, 0x000);
VRC24_syncMirror();

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@@ -72,7 +72,6 @@ static SFORMAT VRC4_stateRegs[] ={
};
void VRC24_syncPRG(int AND, int OR) {
setprg8r(0x10, 0x6000, 0);
setprg8(0x8000, VRC24_GetPRGBank(0) &AND | OR);
setprg8(0xA000, VRC24_GetPRGBank(1) &AND | OR);
setprg8(0xC000, VRC24_GetPRGBank(2) &AND | OR);
@@ -90,6 +89,10 @@ void VRC24_syncCHR(int AND, int OR) {
setchr1(0x1C00, VRC24_GetCHRBank(7) &AND | OR);
}
void VRC24_syncWRAM(int OR) {
setprg8r(0x10, 0x6000, OR);
}
int VRC24_getPRGBank(int bank) {
if (~bank &1 && VRC24_misc &2) bank ^=2;
return bank &2? (0xFE | bank &1): VRC24_prg[bank &1];

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@@ -23,6 +23,7 @@ DECLFW((*VRC24_WRAMWrite));
void VRC24_syncPRG (int AND, int OR);
void VRC24_syncCHR (int AND, int OR);
void VRC24_syncWRAM (int OR);
int VRC24_getPRGBank (int bank);
int VRC24_getCHRBank (int bank);
void VRC24_syncMirror ();