Generalized the 93C66 EEPROM emulation to other capacities, and add 16-bit word size support. Update mapper 529 to use 93C56 EEPROM in 16-bit mode.
This commit is contained in:
committed by
LibretroAdmin
parent
6cbb11bdd1
commit
553865663d
@@ -26,7 +26,7 @@
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*/
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*/
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#include "mapinc.h"
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#include "mapinc.h"
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#include "eeprom_93C66.h"
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#include "eeprom_93Cx6.h"
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static uint8 *WRAM;
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static uint8 *WRAM;
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static uint32 WRAMSIZE;
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static uint32 WRAMSIZE;
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@@ -72,12 +72,12 @@ static void sync()
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setmirror(reg[0] &0x10 && ~reg[3] &0x80? MI_H: MI_V);
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setmirror(reg[0] &0x10 && ~reg[3] &0x80? MI_H: MI_V);
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eeprom_93C66_write(reg[2] &0x10, reg[2] &0x04, reg[2] &0x01);
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eeprom_93Cx6_write(reg[2] &0x10, reg[2] &0x04, reg[2] &0x01);
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}
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}
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static DECLFR(readReg)
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static DECLFR(readReg)
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{
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{
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return eeprom_93C66_read()? 0x00: 0x04;
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return eeprom_93Cx6_read()? 0x00: 0x04;
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}
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}
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static DECLFW(writeReg)
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static DECLFW(writeReg)
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@@ -89,7 +89,7 @@ static DECLFW(writeReg)
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static void power(void)
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static void power(void)
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{
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{
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memset(reg, 0, sizeof(reg));
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memset(reg, 0, sizeof(reg));
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eeprom_93C66_init();
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eeprom_93Cx6_init(512, 8);
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sync();
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sync();
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SetReadHandler (0x5400, 0x57FF, readReg);
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SetReadHandler (0x5400, 0x57FF, readReg);
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SetWriteHandler(0x5000, 0x57FF, writeReg);
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SetWriteHandler(0x5000, 0x57FF, writeReg);
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@@ -130,7 +130,7 @@ void Mapper164_Init (CartInfo *info)
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
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FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
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eeprom_93C66_storage = eeprom_data;
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eeprom_93Cx6_storage = eeprom_data;
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info->battery = 1;
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info->battery = 1;
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info->SaveGame[0] = eeprom_data;
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info->SaveGame[0] = eeprom_data;
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info->SaveGameLen[0] = 512;
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info->SaveGameLen[0] = 512;
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@@ -20,6 +20,14 @@
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#include "mapinc.h"
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#include "mapinc.h"
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#include "vrc2and4.h"
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#include "vrc2and4.h"
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#include "eeprom_93Cx6.h"
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static uint8 eeprom_data[256];
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static SFORMAT stateRegs[] ={
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{ eeprom_data, 256, "EEPR" },
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{ 0 }
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};
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static void sync () {
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static void sync () {
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setprg16(0x8000, VRC24_prg[1]);
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setprg16(0x8000, VRC24_prg[1]);
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@@ -29,19 +37,28 @@ static void sync () {
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}
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}
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DECLFR(UNLT230_readEEPROM) {
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DECLFR(UNLT230_readEEPROM) {
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return 0xFF;
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return eeprom_93Cx6_read()? 0x01: 0x00;
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}
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}
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DECLFW(UNLT230_writeEEPROM) {
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DECLFW(UNLT230_writeEEPROM) {
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eeprom_93Cx6_write(A &0x04, A &0x02, A &0x01);
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}
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}
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void UNLT230_power (void) {
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void UNLT230_power (void) {
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VRC24_power();
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VRC24_power();
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eeprom_93Cx6_init(256, 16);
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SetReadHandler(0x5000, 0x5FFF, UNLT230_readEEPROM);
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SetReadHandler(0x5000, 0x5FFF, UNLT230_readEEPROM);
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SetWriteHandler(0xF800, 0xFFFF, UNLT230_writeEEPROM);
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SetWriteHandler(0xF800, 0xFFFF, UNLT230_writeEEPROM);
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}
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}
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void UNLT230_Init (CartInfo *info) {
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void UNLT230_Init (CartInfo *info) {
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VRC24_init(info, sync, 0x04, 0x08, 1, 1, 0);
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VRC24_init(info, sync, 0x04, 0x08, 1, 1, 0);
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info->Power =UNLT230_power;
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if (info->PRGRamSaveSize) {
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info->Power =UNLT230_power;
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AddExState(stateRegs, ~0, 0, 0);
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eeprom_93Cx6_storage = eeprom_data;
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info->battery = 1;
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info->SaveGame[0] = eeprom_data;
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info->SaveGameLen[0] = 256;
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}
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}
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}
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@@ -23,7 +23,7 @@
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/* Yancheng YC-03-09/Waixing FS??? PCB */
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/* Yancheng YC-03-09/Waixing FS??? PCB */
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#include "mapinc.h"
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#include "mapinc.h"
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#include "eeprom_93C66.h"
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#include "eeprom_93Cx6.h"
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static uint8 *WRAM;
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static uint8 *WRAM;
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static uint32 WRAMSIZE;
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static uint32 WRAMSIZE;
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@@ -44,7 +44,7 @@ static void sync()
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setchr8(0);
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setchr8(0);
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if (haveEEPROM)
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if (haveEEPROM)
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eeprom_93C66_write(reg[2] &0x04, reg[2] &0x02, reg[2] &0x01);
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eeprom_93Cx6_write(reg[2] &0x04, reg[2] &0x02, reg[2] &0x01);
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}
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}
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static void hblank(void) {
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static void hblank(void) {
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@@ -60,7 +60,7 @@ static void hblank(void) {
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static DECLFR(readReg)
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static DECLFR(readReg)
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{
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{
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if (haveEEPROM)
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if (haveEEPROM)
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return eeprom_93C66_read()? 0x04: 0x00;
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return eeprom_93Cx6_read()? 0x04: 0x00;
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else
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else
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return reg[2] &0x04;
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return reg[2] &0x04;
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}
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}
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@@ -84,7 +84,7 @@ static void power(void)
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{
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{
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memset(reg, 0, sizeof(reg));
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memset(reg, 0, sizeof(reg));
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if (haveEEPROM)
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if (haveEEPROM)
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eeprom_93C66_init();
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eeprom_93Cx6_init(512, 8);
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sync();
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sync();
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SetReadHandler (0x5000, 0x57FF, readReg);
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SetReadHandler (0x5000, 0x57FF, readReg);
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SetWriteHandler(0x5000, 0x57FF, writeReg);
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SetWriteHandler(0x5000, 0x57FF, writeReg);
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@@ -128,7 +128,7 @@ void Mapper558_Init (CartInfo *info)
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haveEEPROM =!!(info->PRGRamSaveSize &0x200);
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haveEEPROM =!!(info->PRGRamSaveSize &0x200);
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if (haveEEPROM)
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if (haveEEPROM)
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{
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{
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eeprom_93C66_storage = eeprom_data;
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eeprom_93Cx6_storage = eeprom_data;
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info->battery = 1;
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info->battery = 1;
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info->SaveGame[0] = eeprom_data;
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info->SaveGame[0] = eeprom_data;
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info->SaveGameLen[0] = 512;
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info->SaveGameLen[0] = 512;
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@@ -1,140 +0,0 @@
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#include "eeprom_93C66.h"
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uint8* eeprom_93C66_storage;
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uint8 eeprom_93C66_opcode;
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uint8 eeprom_93C66_data;
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uint16 eeprom_93C66_address;
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uint8 eeprom_93C66_state;
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uint8 eeprom_93C66_lastCLK;
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uint8 eeprom_93C66_writeEnabled;
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uint8 eeprom_93C66_output;
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#define OPCODE_MISC 0
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#define OPCODE_WRITE 1
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#define OPCODE_READ 2
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#define OPCODE_ERASE 3
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#define OPCODE_WRITEDISABLE 10
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#define OPCODE_WRITEALL 11
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#define OPCODE_ERASEALL 12
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#define OPCODE_WRITEENABLE 13
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#define STATE_STANDBY 0
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#define STATE_STARTBIT 1
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#define STATE_OPCODE 3
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#define STATE_ADDRESS 12
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#define STATE_DATA 20
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#define STATE_FINISHED 99
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void eeprom_93C66_init ()
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{
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eeprom_93C66_address =0;
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eeprom_93C66_state =STATE_STANDBY;
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eeprom_93C66_lastCLK =0;
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eeprom_93C66_writeEnabled =0;
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}
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uint8 eeprom_93C66_read ()
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{
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return eeprom_93C66_output;
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}
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void eeprom_93C66_write (uint8 CS, uint8 CLK, uint8 DAT)
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{
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if (!CS && eeprom_93C66_state <= STATE_ADDRESS)
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eeprom_93C66_state =STATE_STANDBY;
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else
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if (eeprom_93C66_state ==STATE_STANDBY && CS && CLK)
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{
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eeprom_93C66_state =STATE_STARTBIT;
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eeprom_93C66_opcode =0;
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eeprom_93C66_address =0;
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eeprom_93C66_output =1;
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}
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else
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if (CLK && !eeprom_93C66_lastCLK)
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{
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if (eeprom_93C66_state >=STATE_STARTBIT && eeprom_93C66_state <STATE_OPCODE)
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eeprom_93C66_opcode =(eeprom_93C66_opcode <<1) | (DAT? 1: 0);
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else
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if (eeprom_93C66_state >=STATE_OPCODE && eeprom_93C66_state <STATE_ADDRESS)
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eeprom_93C66_address =(eeprom_93C66_address <<1) | (DAT? 1: 0);
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else
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if (eeprom_93C66_state >=STATE_ADDRESS && eeprom_93C66_state <STATE_DATA)
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{
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if (eeprom_93C66_opcode ==OPCODE_WRITE || eeprom_93C66_opcode ==OPCODE_WRITEALL)
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eeprom_93C66_data =(eeprom_93C66_data <<1) | (DAT? 1: 0);
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else
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if (eeprom_93C66_opcode ==OPCODE_READ)
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{
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eeprom_93C66_output =!!(eeprom_93C66_data &0x80);
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eeprom_93C66_data = eeprom_93C66_data <<1;
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}
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}
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eeprom_93C66_state++;
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if (eeprom_93C66_state ==STATE_ADDRESS) {
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switch (eeprom_93C66_opcode)
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{
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case OPCODE_MISC:
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eeprom_93C66_opcode =(eeprom_93C66_address >>7) + 10;
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switch (eeprom_93C66_opcode)
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{
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case OPCODE_WRITEDISABLE:
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eeprom_93C66_writeEnabled = 0;
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eeprom_93C66_state = STATE_FINISHED;
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break;
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case OPCODE_WRITEENABLE:
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eeprom_93C66_writeEnabled = 1;
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eeprom_93C66_state = STATE_FINISHED;
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break;
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case OPCODE_ERASEALL:
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if (eeprom_93C66_writeEnabled)
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{
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int i;
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for (i =0; i <512; i++)
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eeprom_93C66_storage[i] = 0xFF;
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}
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eeprom_93C66_state = STATE_FINISHED;
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break;
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case OPCODE_WRITEALL:
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eeprom_93C66_address = 0;
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break;
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}
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break;
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case OPCODE_ERASE:
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if (eeprom_93C66_writeEnabled) eeprom_93C66_storage[eeprom_93C66_address] = 0xFF;
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eeprom_93C66_state = STATE_FINISHED;
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break;
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case OPCODE_READ:
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eeprom_93C66_data = eeprom_93C66_storage[eeprom_93C66_address++];
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break;
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}
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}
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else
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if (eeprom_93C66_state ==STATE_DATA)
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{
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if (eeprom_93C66_opcode ==OPCODE_WRITE)
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{
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eeprom_93C66_storage[eeprom_93C66_address++] = eeprom_93C66_data;
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eeprom_93C66_state = STATE_FINISHED;
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}
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else
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if (eeprom_93C66_opcode ==OPCODE_WRITEALL)
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{
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eeprom_93C66_storage[eeprom_93C66_address++] = eeprom_93C66_data;
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eeprom_93C66_state = CS && eeprom_93C66_address <512? STATE_ADDRESS: STATE_FINISHED;
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}
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else
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if (eeprom_93C66_opcode ==OPCODE_READ)
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{
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if (eeprom_93C66_address <512) eeprom_93C66_data = eeprom_93C66_storage[eeprom_93C66_address];
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eeprom_93C66_state = CS && ++eeprom_93C66_address <=512? STATE_ADDRESS: STATE_FINISHED;
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}
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}
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if (eeprom_93C66_state == STATE_FINISHED)
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{
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eeprom_93C66_output = 0;
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eeprom_93C66_state = STATE_STANDBY;
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}
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}
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eeprom_93C66_lastCLK = CLK;
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}
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@@ -1,10 +0,0 @@
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#ifndef _EEPROM_93C66_H
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#define _EEPROM_93C66_H
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#include "mapinc.h"
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extern uint8* eeprom_93C66_storage;
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void eeprom_93C66_init ();
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uint8 eeprom_93C66_read ();
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void eeprom_93C66_write (uint8 CS, uint8 CLK, uint8 DAT);
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#endif
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162
src/boards/eeprom_93Cx6.c
Normal file
162
src/boards/eeprom_93Cx6.c
Normal file
@@ -0,0 +1,162 @@
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#include "eeprom_93Cx6.h"
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uint8* eeprom_93Cx6_storage;
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uint8 eeprom_93Cx6_opcode;
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uint16 eeprom_93Cx6_data;
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uint16 eeprom_93Cx6_address;
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uint8 eeprom_93Cx6_state;
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uint8 eeprom_93Cx6_lastCLK;
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uint8 eeprom_93Cx6_writeEnabled;
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uint8 eeprom_93Cx6_output;
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size_t eeprom_93Cx6_capacity;
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uint8 eeprom_93Cx6_wordSize;
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static uint8 STATE_ADDRESS;
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static uint8 STATE_DATA;
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#define OPCODE_MISC 0
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#define OPCODE_WRITE 1
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#define OPCODE_READ 2
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#define OPCODE_ERASE 3
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#define OPCODE_WRITEDISABLE 10
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#define OPCODE_WRITEALL 11
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#define OPCODE_ERASEALL 12
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#define OPCODE_WRITEENABLE 13
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#define STATE_STANDBY 0
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#define STATE_STARTBIT 1
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#define STATE_OPCODE 3
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#define STATE_ADDRESS8 12
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#define STATE_DATA8 20
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#define STATE_ADDRESS16 11
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#define STATE_DATA16 27
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#define STATE_FINISHED 99
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void eeprom_93Cx6_init (size_t capacity, uint8 wordSize) {
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eeprom_93Cx6_capacity =capacity;
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eeprom_93Cx6_wordSize =wordSize;
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eeprom_93Cx6_address =0;
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eeprom_93Cx6_state =STATE_STANDBY;
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eeprom_93Cx6_lastCLK =0;
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||||||
|
eeprom_93Cx6_writeEnabled =0;
|
||||||
|
STATE_ADDRESS =wordSize ==16? STATE_ADDRESS16: STATE_ADDRESS8;
|
||||||
|
STATE_DATA =wordSize ==16? STATE_DATA16: STATE_DATA8;
|
||||||
|
if (capacity ==128) {
|
||||||
|
STATE_ADDRESS -=2;
|
||||||
|
STATE_DATA -=2;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8 eeprom_93Cx6_read () {
|
||||||
|
return eeprom_93Cx6_output;
|
||||||
|
}
|
||||||
|
|
||||||
|
void eeprom_93Cx6_write (uint8 CS, uint8 CLK, uint8 DAT) {
|
||||||
|
if (!CS && eeprom_93Cx6_state <= STATE_ADDRESS)
|
||||||
|
eeprom_93Cx6_state =STATE_STANDBY;
|
||||||
|
else
|
||||||
|
if (eeprom_93Cx6_state ==STATE_STANDBY && CS && CLK && !eeprom_93Cx6_lastCLK) {
|
||||||
|
if (DAT) eeprom_93Cx6_state =STATE_STARTBIT;
|
||||||
|
eeprom_93Cx6_opcode =0;
|
||||||
|
eeprom_93Cx6_address =0;
|
||||||
|
eeprom_93Cx6_output =1;
|
||||||
|
} else
|
||||||
|
if (CLK && !eeprom_93Cx6_lastCLK && eeprom_93Cx6_state >=STATE_STARTBIT) {
|
||||||
|
if (eeprom_93Cx6_state >=STATE_STARTBIT && eeprom_93Cx6_state <STATE_OPCODE)
|
||||||
|
eeprom_93Cx6_opcode =(eeprom_93Cx6_opcode <<1) | (DAT? 1: 0);
|
||||||
|
else
|
||||||
|
if (eeprom_93Cx6_state >=STATE_OPCODE && eeprom_93Cx6_state <STATE_ADDRESS)
|
||||||
|
eeprom_93Cx6_address =(eeprom_93Cx6_address <<1) | (DAT? 1: 0);
|
||||||
|
else
|
||||||
|
if (eeprom_93Cx6_state >=STATE_ADDRESS && eeprom_93Cx6_state <STATE_DATA) {
|
||||||
|
if (eeprom_93Cx6_opcode ==OPCODE_WRITE || eeprom_93Cx6_opcode ==OPCODE_WRITEALL)
|
||||||
|
eeprom_93Cx6_data =(eeprom_93Cx6_data <<1) | (DAT? 1: 0);
|
||||||
|
else
|
||||||
|
if (eeprom_93Cx6_opcode ==OPCODE_READ) {
|
||||||
|
eeprom_93Cx6_output =eeprom_93Cx6_wordSize ==16? !!(eeprom_93Cx6_data &0x8000): !!(eeprom_93Cx6_data &0x80);
|
||||||
|
eeprom_93Cx6_data = eeprom_93Cx6_data <<1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
eeprom_93Cx6_state++;
|
||||||
|
if (eeprom_93Cx6_state ==STATE_ADDRESS) {
|
||||||
|
switch (eeprom_93Cx6_opcode) {
|
||||||
|
case OPCODE_MISC:
|
||||||
|
eeprom_93Cx6_opcode =(eeprom_93Cx6_address >>(eeprom_93Cx6_wordSize ==16? 6: 7)) + 10;
|
||||||
|
switch (eeprom_93Cx6_opcode) {
|
||||||
|
case OPCODE_WRITEDISABLE:
|
||||||
|
eeprom_93Cx6_writeEnabled = 0;
|
||||||
|
eeprom_93Cx6_state = STATE_FINISHED;
|
||||||
|
break;
|
||||||
|
case OPCODE_WRITEENABLE:
|
||||||
|
eeprom_93Cx6_writeEnabled = 1;
|
||||||
|
eeprom_93Cx6_state = STATE_FINISHED;
|
||||||
|
break;
|
||||||
|
case OPCODE_ERASEALL:
|
||||||
|
if (eeprom_93Cx6_writeEnabled) {
|
||||||
|
int i;
|
||||||
|
for (i =0; i <eeprom_93Cx6_capacity; i++)
|
||||||
|
eeprom_93Cx6_storage[i] = 0xFF;
|
||||||
|
}
|
||||||
|
eeprom_93Cx6_state = STATE_FINISHED;
|
||||||
|
break;
|
||||||
|
case OPCODE_WRITEALL:
|
||||||
|
eeprom_93Cx6_address = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case OPCODE_ERASE:
|
||||||
|
if (eeprom_93Cx6_writeEnabled) {
|
||||||
|
if (eeprom_93Cx6_wordSize ==16) {
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |0] = 0xFF;
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |1] = 0xFF;
|
||||||
|
} else
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address] = 0xFF;
|
||||||
|
}
|
||||||
|
eeprom_93Cx6_state = STATE_FINISHED;
|
||||||
|
break;
|
||||||
|
case OPCODE_READ:
|
||||||
|
if (eeprom_93Cx6_wordSize ==16) {
|
||||||
|
eeprom_93Cx6_data = eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |0] | eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |1] <<8;
|
||||||
|
eeprom_93Cx6_address++;
|
||||||
|
} else
|
||||||
|
eeprom_93Cx6_data = eeprom_93Cx6_storage[eeprom_93Cx6_address++];
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
} else
|
||||||
|
if (eeprom_93Cx6_state ==STATE_DATA) {
|
||||||
|
if (eeprom_93Cx6_opcode ==OPCODE_WRITE) {
|
||||||
|
if (eeprom_93Cx6_wordSize ==16) {
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |0] = eeprom_93Cx6_data &0xFF;
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |1] = eeprom_93Cx6_data >>8;
|
||||||
|
eeprom_93Cx6_address++;
|
||||||
|
} else
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address++] = eeprom_93Cx6_data;
|
||||||
|
eeprom_93Cx6_state = STATE_FINISHED;
|
||||||
|
} else
|
||||||
|
if (eeprom_93Cx6_opcode ==OPCODE_WRITEALL) {
|
||||||
|
if (eeprom_93Cx6_wordSize ==16) {
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |0] = eeprom_93Cx6_data &0xFF;
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |1] = eeprom_93Cx6_data >>8;
|
||||||
|
eeprom_93Cx6_address++;
|
||||||
|
} else
|
||||||
|
eeprom_93Cx6_storage[eeprom_93Cx6_address++] = eeprom_93Cx6_data;
|
||||||
|
eeprom_93Cx6_state = CS && eeprom_93Cx6_address <eeprom_93Cx6_capacity? STATE_ADDRESS: STATE_FINISHED;
|
||||||
|
} else
|
||||||
|
if (eeprom_93Cx6_opcode ==OPCODE_READ) {
|
||||||
|
if (eeprom_93Cx6_address <eeprom_93Cx6_capacity) {
|
||||||
|
if (eeprom_93Cx6_wordSize ==16)
|
||||||
|
eeprom_93Cx6_data = eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |0] | eeprom_93Cx6_storage[eeprom_93Cx6_address <<1 |1] <<8;
|
||||||
|
else
|
||||||
|
eeprom_93Cx6_data = eeprom_93Cx6_storage[eeprom_93Cx6_address];
|
||||||
|
}
|
||||||
|
eeprom_93Cx6_state = CS && ++eeprom_93Cx6_address <=eeprom_93Cx6_capacity? STATE_ADDRESS: STATE_FINISHED;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (eeprom_93Cx6_state == STATE_FINISHED) {
|
||||||
|
eeprom_93Cx6_output = 0;
|
||||||
|
eeprom_93Cx6_state = STATE_STANDBY;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (eeprom_93Cx6_opcode ==OPCODE_READ && eeprom_93Cx6_state ==(STATE_ADDRESS -2)) eeprom_93Cx6_output =0; /* Dummy Zero */
|
||||||
|
eeprom_93Cx6_lastCLK = CLK;
|
||||||
|
}
|
||||||
10
src/boards/eeprom_93Cx6.h
Normal file
10
src/boards/eeprom_93Cx6.h
Normal file
@@ -0,0 +1,10 @@
|
|||||||
|
#ifndef _EEPROM_93CX6_H
|
||||||
|
#define _EEPROM_93CX6_H
|
||||||
|
#include "mapinc.h"
|
||||||
|
|
||||||
|
extern uint8* eeprom_93Cx6_storage;
|
||||||
|
|
||||||
|
void eeprom_93Cx6_init (size_t capacity, uint8 wordSize);
|
||||||
|
uint8 eeprom_93Cx6_read ();
|
||||||
|
void eeprom_93Cx6_write (uint8 CS, uint8 CLK, uint8 DAT);
|
||||||
|
#endif
|
||||||
Reference in New Issue
Block a user