Merge pull request #337 from negativeExponent/updates_and_fixes

Updates and fixes
This commit is contained in:
Twinaphex
2020-03-09 23:07:00 +01:00
committed by GitHub
5 changed files with 177 additions and 142 deletions

View File

@@ -23,131 +23,175 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 M40IRQa;
static uint16 M40IRQCount;
static uint8 mode;
static uint8 mmc3_count, mmc3_latch, mmc3_enabled, mmc3_reload;
static uint8 smb2_reg;
static uint8 smb2j_enabled;
static uint16 smb2j_count;
static void M369PW(uint32 A, uint8 V) {
switch (EXPREGS[0]) {
static uint32 WRAMSIZE;
static uint8 *WRAM;
static SFORMAT StateRegs[] = {
{ &mode, 1, "MODE" },
{ &mmc3_reload, 1, "IRQR" },
{ &mmc3_count, 1, "IRQC" },
{ &mmc3_latch, 1, "IRQL" },
{ &mmc3_enabled, 1, "IRQA" },
{ &smb2_reg, 1, "MBRG" },
{ &smb2j_enabled, 1, "MIRQ" },
{ &smb2j_count, 2 | FCEUSTATE_RLSB, "MIQC" },
{ 0 }
};
static void SyncPRG(uint32 A, uint8 V) {
switch (mode) {
case 0x00:
setprg32(0x8000, 0);
case 0x01: /* NROM */
setprg32(0x8000, mode & 0x01);
break;
case 0x01:
setprg32(0x8000, 1);
break;
case 0x13:
setprg8(0x6000, 0x0E);
case 0x13: /* Mapper 40 */
setprg8r(0, 0x6000, 0x0E);
setprg8(0x8000, 0x0C);
setprg8(0xa000, 0x0D);
setprg8(0xc000, EXPREGS[1] | 0x08);
setprg8(0xc000, smb2_reg | 0x08);
setprg8(0xe000, 0x0F);
break;
case 0x37:
case 0x37: /* MMC3 128 PRG */
setprg8r(0x10, 0x6000, 0);
setprg8(A, (V & 0x0F) | 0x10);
break;
case 0xFF:
case 0xFF: /* MMC3 256 PRG */
setprg8r(0x10, 0x6000, 0);
setprg8(A, (V & 0x1F) | 0x20);
break;
}
}
static void M369CW(uint32 A, uint8 V) {
switch (EXPREGS[0]) {
static void SyncCHR(uint32 A, uint8 V) {
switch (mode) {
case 0x00:
setchr8(0);
case 0x01: /* NROM */
case 0x13: /* Mapper 40 */
setchr8(mode & 0x03);
break;
case 0x01:
setchr8(1);
break;
case 0x13:
setprg8(0xE000, 0xF);
setchr8(3);
break;
case 0x37:
case 0x37: /* MMC3 128 CHR */
setchr1(A, (V & 0x7F) | 0x80);
break;
case 0xFF:
setchr1(A, V | 0x100);
case 0xFF: /* MMC3 256 CHR */
setchr1(A, (V & 0xFF) | 0x100);
break;
}
}
static DECLFW(M369WriteCMD) {
EXPREGS[0] = V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
static DECLFW(M369WriteLo) {
if ((A & 0xC100) == 0x4100) {
mode = V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
}
static DECLFW(M369Write) {
if (EXPREGS[0] == 0x13) {
if (mode == 0x13) {
switch (A & 0xE000) {
case 0x8000:
M40IRQa = 0;
M40IRQCount = 0;
smb2j_enabled = 0;
smb2j_count = 0;
X6502_IRQEnd(FCEU_IQEXT);
break;
case 0xA000:
M40IRQa = 1;
smb2j_enabled = 1;
break;
case 0xE000:
EXPREGS[1] = V & 7;
smb2_reg = V & 7;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
break;
}
} else {
if (A < 0xC000) {
switch (A & 0xE001) {
case 0x8000:
case 0x8001:
case 0xA000:
case 0xA001:
MMC3_CMDWrite(A, V);
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
} else
MMC3_IRQWrite(A, V);
break;
case 0xC000:
mmc3_latch = V;
break;
case 0xC001:
mmc3_reload = 1;
break;
case 0xE000:
X6502_IRQEnd(FCEU_IQEXT);
mmc3_enabled = 0;
break;
case 0xE001:
mmc3_enabled = 1;
break;
}
}
}
static void M369Power(void) {
EXPREGS[0] = 0x00;
EXPREGS[1] = 0x00;
M40IRQa = 0x00;
M40IRQCount = 0x00;
GenMMC3Power();
SetWriteHandler(0x4120, 0x4120, M369WriteCMD);
SetWriteHandler(0x8000, 0xFFFF, M369Write);
static void FP_FASTAPASS(1) SMB2JIRQHook(int a) {
if (mode != 0x13)
return;
if (smb2j_enabled) {
if (smb2j_count < 4096)
smb2j_count += a;
else {
smb2j_enabled = 0;
X6502_IRQBegin(FCEU_IQEXT);
}
}
}
static void MMC3IRQHook(void) {
int32 count = mmc3_count;
if (mode == 0x13)
return;
if (!count || mmc3_reload) {
mmc3_count = mmc3_latch;
mmc3_reload = 0;
} else
mmc3_count--;
if (count && !mmc3_count && mmc3_enabled)
X6502_IRQBegin(FCEU_IQEXT);
}
static void M369Reset(void) {
EXPREGS[0] = 0x00;
EXPREGS[1] = 0x00;
M40IRQa = 0x00;
M40IRQCount = 0x00;
mode = 0;
smb2_reg = 0;
smb2j_enabled = 0;
smb2j_count = 0;
mmc3_count = mmc3_latch = mmc3_enabled = 0;
MMC3RegReset();
}
static void FP_FASTAPASS(1) M40IRQHook(int a) {
if (EXPREGS[0] == 0x13)
{
if (M40IRQa)
{
if (M40IRQCount < 4096)
M40IRQCount += a;
else
{
M40IRQa = 0;
X6502_IRQBegin(FCEU_IQEXT);
}
}
}
static void M369Power(void) {
mode = 0;
smb2_reg = 0;
smb2j_enabled = 0;
smb2j_count = 0;
mmc3_count = mmc3_latch = mmc3_enabled = 0;
GenMMC3Power();
SetWriteHandler(0x4100, 0x4FFF, M369WriteLo);
SetWriteHandler(0x8000, 0xFFFF, M369Write);
}
void Mapper369_Init(CartInfo *info) {
GenMMC3_Init(info, 512, 384, 8, 0);
pwrap = M369PW;
cwrap = M369CW;
MapIRQHook = M40IRQHook;
GenMMC3_Init(info, 512, 384, 8, info->battery);
pwrap = SyncPRG;
cwrap = SyncCHR;
info->Power = M369Power;
info->Reset = M369Reset;
AddExState(EXPREGS, 4, 0, "EXPR");
AddExState(&M40IRQa, 1, 0, "M2a");
AddExState(&M40IRQCount, 2 | FCEUSTATE_RLSB, 0, "M2CN");
MapIRQHook = SMB2JIRQHook;
GameHBIRQHook = MMC3IRQHook;
AddExState(&StateRegs, ~0, 0, 0);
}

View File

@@ -30,7 +30,8 @@ static uint8 WRAM[8192];
static SFORMAT StateRegs[] =
{
{ &preg, 1, "PREG" },
{ &mirr, 1, "MIRR" }
{ &mirr, 1, "MIRR" },
{ 0 }
};
static uint32 GetWRAMAddress(uint32 A) {

View File

@@ -35,19 +35,18 @@ static void Sync(void) {
}
static DECLFW(M79Write) {
if ((A < 0x8000) && ((A ^ 0x4100) == 0)) {
if (A & 0x100) {
preg = (V >> 3) & 1;
creg = V & 7;
Sync();
}
creg = V & 7;
Sync();
}
static void M79Power(void) {
preg = ~0;
preg = 0;
Sync();
SetWriteHandler(0x4100, 0x5FFF, M79Write);
SetWriteHandler(0x8000, 0xFFFF, M79Write);
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x4100, 0x5FFF, M79Write);
}
static void StateRestore(int version) {

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@@ -35,9 +35,6 @@ static uint16 acount = 0;
static uint8 *WRAM = NULL;
static uint32 WRAMSIZE;
static uint8 *_CHRptr = NULL; /* for 400k+128K Contra J */
static uint32 _CHRsize;
static uint8 prgMask = 0x1F;
static SFORMAT StateRegs[] =
@@ -66,13 +63,13 @@ static SFORMAT StateRegs[] =
static void Sync(void) {
if (regcmd & 2) {
setprg8(0xC000, prgreg[0] | big_bank);
setprg8(0x8000, ((prgreg[2]) & prgMask) | big_bank);
setprg8(0x8000, (prgreg[2] & prgMask) | big_bank);
} else {
setprg8(0x8000, prgreg[0] | big_bank);
setprg8(0xC000, ((prgreg[2]) & prgMask) | big_bank);
setprg8(0xC000, (prgreg[2] & prgMask) | big_bank);
}
setprg8(0xA000, prgreg[1] | big_bank);
setprg8(0xE000, ((prgreg[3]) & prgMask) | big_bank);
setprg8(0xE000, (prgreg[3] & prgMask) | big_bank);
if (UNIFchrrama)
setchr8(0);
else {
@@ -101,7 +98,7 @@ static DECLFW(VRC24Write) {
chrhi[i] = (V & 0x10) << 4; /* another one many in one feature from pirate carts */
}
Sync();
} else
} else {
switch (A & 0xF003) {
case 0x8000:
case 0x8001:
@@ -130,11 +127,12 @@ static DECLFW(VRC24Write) {
case 0x9001: if (V != 0xFF) mirr = V; Sync(); break;
case 0x9002:
case 0x9003: regcmd = V; Sync(); break;
case 0xF000: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0xF0; IRQLatch |= V & 0xF; break;
case 0xF000: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0xF0; IRQLatch |= V & 0xF; break;
case 0xF001: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0x0F; IRQLatch |= V << 4; break;
case 0xF002: X6502_IRQEnd(FCEU_IQEXT); acount = 0; IRQCount = IRQLatch; IRQa = V & 2; irqcmd = V & 1; break;
case 0xF003: X6502_IRQEnd(FCEU_IQEXT); IRQa = irqcmd; break;
}
}
}
}
static DECLFW(M21Write) {
@@ -167,14 +165,16 @@ static DECLFW(M23Write) {
static void VRC24PowerCommon(void (*WRITEFUNC)(uint32 A, uint8 V)) {
Sync();
setprg8r(0x10, 0x6000, 0); /* Only two Goemon games are have battery backed RAM, three more shooters
* (Parodius Da!, Gradius 2 and Crisis Force uses 2k or SRAM at 6000-67FF only
*/
SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
if (WRAMSIZE) {
setprg8r(0x10, 0x6000, 0); /* Only two Goemon games are have battery backed RAM, three more shooters
* (Parodius Da!, Gradius 2 and Crisis Force uses 2k or SRAM at 6000-67FF only
*/
SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, WRITEFUNC);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M21Power(void) {
@@ -182,19 +182,13 @@ static void M21Power(void) {
}
static void M22Power(void) {
Sync();
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, M22Write);
VRC24PowerCommon(M22Write);
}
static void M23Power(void) {
big_bank = 0x20;
if((prgreg[2] == 0x30) && (prgreg[3]== 0x31))
{
if ((prgreg[2] == 0x30) && (prgreg[3] == 0x31))
big_bank = 0x00;
}
VRC24PowerCommon(M23Write);
}
@@ -225,54 +219,39 @@ static void StateRestore(int version) {
}
static void VRC24Close(void) {
if (WRAM)
FCEU_gfree(WRAM);
WRAM = NULL;
if (_CHRptr)
FCEU_gfree(_CHRptr);
_CHRptr = NULL;
if (WRAM)
FCEU_gfree(WRAM);
WRAM = NULL;
}
void Mapper22_Init(CartInfo *info) {
isPirate = 0;
is22 = 1;
info->Power = M22Power;
GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
}
void VRC24_Init(CartInfo *info) {
static void VRC24_Init(CartInfo *info, uint32 hasWRAM) {
info->Close = VRC24Close;
MapIRQHook = VRC24IRQHook;
GameStateRestore = StateRestore;
prgMask = 0x1F;
prgreg[2] = ~1;
prgreg[3] = ~0;
if (info->CRC32 == 0xa20ad5d6) /* 400K PRG+ 128K CHR */
{
WRAMSIZE = 0;
/* 400K PRG + 128K CHR Contra rom hacks */
if (info->PRGRomSize == 400 * 1024 && info->CHRRomSize == 128 * 1024) {
prgreg[2] = 0x30;
prgreg[3] = 0x31;
prgMask = 0x3F;
big_bank = 0x00;
_CHRsize = 128 * 1024;
_CHRptr = (uint8*)FCEU_gmalloc(128*1024);
memcpy(&_CHRptr[112 * 1024], CHRptr[0], 16 * 1024);
memcpy(&_CHRptr[0], &PRGptr[0][400 * 1024], 112 * 1024);
SetupCartCHRMapping(0, _CHRptr, _CHRsize, 0);
AddExState(_CHRptr, _CHRsize, 0, "_CHR");
}
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if (hasWRAM) {
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if (info->battery) {
info->SaveGame[0] = WRAM;
info->SaveGameLen[0] = WRAMSIZE;
if (info->battery) {
info->SaveGame[0] = WRAM;
info->SaveGameLen[0] = WRAMSIZE;
}
}
AddExState(&StateRegs, ~0, 0, 0);
@@ -282,28 +261,35 @@ void Mapper21_Init(CartInfo *info) {
isPirate = 0;
is22 = 0;
info->Power = M21Power;
VRC24_Init(info);
VRC24_Init(info, 1);
}
void Mapper22_Init(CartInfo *info) {
isPirate = 0;
is22 = 1;
info->Power = M22Power;
VRC24_Init(info, 0);
}
void Mapper23_Init(CartInfo *info) {
isPirate = 0;
is22 = 0;
info->Power = M23Power;
VRC24_Init(info);
VRC24_Init(info, 1);
}
void Mapper25_Init(CartInfo *info) {
isPirate = 0;
is22 = 0;
info->Power = M25Power;
VRC24_Init(info);
VRC24_Init(info, 1);
}
void UNLT230_Init(CartInfo *info) {
isPirate = 1;
is22 = 0;
info->Power = M23Power;
VRC24_Init(info);
VRC24_Init(info, 1);
}
/* -------------------- UNL-TH2131-1 -------------------- */
@@ -343,7 +329,7 @@ static void TH2131Power(void) {
void UNLTH21311_Init(CartInfo *info) {
info->Power = TH2131Power;
VRC24_Init(info);
VRC24_Init(info, 1);
MapIRQHook = TH2131IRQHook;
}
@@ -366,7 +352,7 @@ static void KS7021APower(void) {
void UNLKS7021A_Init(CartInfo *info) {
info->Power = KS7021APower;
VRC24_Init(info);
VRC24_Init(info, 1);
}
/* -------------------- BTL-900218 -------------------- */
@@ -398,6 +384,6 @@ static void BTL900218Power(void) {
void BTL900218_Init(CartInfo *info) {
info->Power = BTL900218Power;
VRC24_Init(info);
VRC24_Init(info, 1);
MapIRQHook = BTL900218IRQHook;
}

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@@ -376,6 +376,11 @@
{0xa3ac0095, 189, -1}, /* Street Fighter II - The World Warrior (Unl) [a2].nes */
{0xeced5899, 121, -1}, /* Ultimate Mortal Kombat 4 (Unl) [!].nes */
{0x19C1ED51, 150, -1}, /* Poker III (Asia) (Ja) (Unl).nes */
{0x282745C5, 141, -1}, /* Q Boy (Asia) (Ja) (Unl).nes */
{0x4B9ECFB2, 21, -1}, /* Wai Wai World 2 - SOS!! Paseri Jou (Japan) (Virtual Console).nes */
{0x33751782, 4, -1}, /* Zoda's Revenge - StarTropics II (USA, Europe) (Virtual Console).nes */
/* TXC / Sachen / JoyVan */
/* This cart does not work anymore with latest mapper implementation.