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Mapper 432: register 0 write also clears register 1.

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Mapper 45: Only apply outer bank bits that are unaffected by the inner bank.
Mapper 45: Add PRG /CE-based menu selection.
This commit is contained in:
NewRisingSun
2022-03-01 15:54:01 +01:00
parent 98244a1c17
commit 48d548d23b
2 changed files with 25 additions and 18 deletions
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3
src/boards/432.c
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@@ -44,6 +44,7 @@ static DECLFR(M432Read) {
static DECLFW(M432Write) {
EXPREGS[A & 1] = V;
if (~A &1 && ~V &1) EXPREGS[1] =0; /* Writing 0 to register 0 clears register 1 */
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
@@ -51,7 +52,7 @@ static DECLFW(M432Write) {
static void M432Reset(void) {
EXPREGS[0] = 0;
EXPREGS[1] = 0;
EXPREGS[2] = (EXPREGS[2] +1) & 3;
EXPREGS[2]++;
MMC3RegReset();
}

40
src/boards/mmc3.c
View File

@@ -474,27 +474,33 @@ void Mapper44_Init(CartInfo *info) {
/* ---------------------------- Mapper 45 ------------------------------- */
static void M45CW(uint32 A, uint8 V) {
if (!UNIFchrrama) {
uint32 NV = V;
if (EXPREGS[2] & 8)
NV &= (1 << ((EXPREGS[2] & 7) + 1)) - 1;
else
if (EXPREGS[2])
NV &= 0; /* hack ;( don't know exactly how it should be */
NV |= EXPREGS[0] | ((EXPREGS[2] & 0xF0) << 4);
setchr1(A, NV);
} else
/* setchr8(0); */ /* i don't know what cart need this, but a new one need other lol */
if (CHRsize[0] ==8192)
setchr1(A, V);
else {
int chrAND =0xFF >>(~EXPREGS[2] &0xF);
int chrOR =EXPREGS[0] | EXPREGS[2] <<4 &0xF00;
setchr1(A, V &chrAND | chrOR &~chrAND);
}
}
static DECLFR(M45ReadOB) {
return X.DB;
}
static void M45PW(uint32 A, uint8 V) {
uint32 MV = V & ((EXPREGS[3] & 0x3F) ^ 0x3F);
MV |= EXPREGS[1];
if(UNIFchrrama)
MV |= ((EXPREGS[2] & 0x40) << 2);
setprg8(A, MV);
/* FCEU_printf("1:%02x 2:%02x 3:%02x A=%04x V=%03x\n",EXPREGS[1],EXPREGS[2],EXPREGS[3],A,MV); */
int prgAND =~EXPREGS[3] &0x3F;
int prgOR =EXPREGS[1] | EXPREGS[2] <<2 &0x300;
setprg8(A, V &prgAND | prgOR &~prgAND);
/* Some multicarts select between five different menus by connecting one of the higher address lines to PRG /CE.
The menu code selects between menus by checking which of the higher address lines disables PRG-ROM when set. */
if (PRGsize[0] <0x200000 && EXPREGS[5] ==1 && EXPREGS[1] &0x80 ||
PRGsize[0] <0x200000 && EXPREGS[5] ==2 && EXPREGS[2] &0x40 ||
PRGsize[0] <0x100000 && EXPREGS[5] ==3 && EXPREGS[1] &0x40 ||
PRGsize[0] <0x100000 && EXPREGS[5] ==4 && EXPREGS[2] &0x20)
SetReadHandler(0x8000, 0xFFFF, M45ReadOB);
else
SetReadHandler(0x8000, 0xFFFF, CartBR);
}
static DECLFW(M45Write) {