109 lines
3.3 KiB
C
109 lines
3.3 KiB
C
/* FCE Ultra - NES/Famicom Emulator
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* 晶太 YY840708C PCB
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Solely used for the "1995 Soccer 6-in-1 足球小将專輯 (JY-014)" multicart.
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MMC3+PAL16L8 combination, resulting in a bizarre mapper that switches banks in part upon *reads*.
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*/
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#include "mapinc.h"
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#include "mmc3.h"
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#define A15 EXPREGS[0]
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#define A16 EXPREGS[1]
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#define A17A18 EXPREGS[2]
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static void M383PRGWrap (uint32 A, uint8 V)
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{
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switch(A17A18)
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{
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case 0x00:
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/* "Setting 0 provides a round-about means of dividing the first 128 KiB bank into two 32 KiB and one 64 KiB bank." */
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setprg8(A, V &(A16? 0x07: 0x03) | (A16? 0x00: A15) | A16 | A17A18);
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break;
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case 0x30:
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/* "Setting 3 provides 128 KiB MMC3 banking with the CPU A14 line fed to the MMC3 clone reversed.
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This is used for the game Tecmo Cup: Soccer Game (renamed "Tecmo Cup Soccer"),
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originally an MMC1 game with the fixed bank at $8000-$BFFF and the switchable bank at $C000-$FFFF,
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a configuration that could not be reproduced with an MMC3 alone." */
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setprg8(A ^0x4000, V &0x0F | A17A18);
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/* "It is also used for the menu,
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which in part executes from PRG-ROM mapped to the CPU $6000-$7FFF address range on the MMC3 clone's fixed banks alone,
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as no MMC3 PRG bank register is written to before JMPing to this address range." */
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if (A ==0xE000) setprg8(A ^0x8000, V &0x0B | A17A18);
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break;
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default:
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/* "Settings 1 and 2 provide normal 128 KiB MMC3 banking." */
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setprg8(A, V &0x0F | A17A18);
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break;
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}
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}
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static void M383CHRWrap (uint32 A, uint8 V)
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{
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setchr1(A, V &0x7F | A17A18 <<3);
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}
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static DECLFR(M383Read)
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{
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if (A17A18 ==0x00)
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{ /* "PAL PRG A16 is updated with the content of the corresponding MMC3 PRG bank bit by reading from the respective address range,
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which in turn will then be applied across the entire ROM address range." */
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A16 =DRegBuf[0x06 | A >>13 &0x01] &0x08;
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FixMMC3PRG(MMC3_cmd);
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}
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return CartBR(A);
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}
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static DECLFW(M383Write)
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{
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if (A &0x0100)
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{
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A15 =A >>11 &0x04;
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A17A18 =A &0x30;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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}
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if (A &0x4000)
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MMC3_IRQWrite(A, V);
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else
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MMC3_CMDWrite(A, V);
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}
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static void M383Reset (void) {
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EXPREGS[0] = 0;
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EXPREGS[1] = 0;
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EXPREGS[2] = 0;
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MMC3RegReset();
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}
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static void M383Power (void) {
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GenMMC3Power();
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SetReadHandler(0x8000, 0xBFFF, M383Read);
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SetWriteHandler(0x8000, 0xFFFF, M383Write);
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}
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void Mapper383_Init(CartInfo *info) {
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GenMMC3_Init(info, 128, 128, 8, 0);
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pwrap = M383PRGWrap;
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cwrap = M383CHRWrap;
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info->Power = M383Power;
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info->Reset = M383Reset;
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AddExState(EXPREGS, 3, 0, "EXPR");
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}
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