137 lines
4.5 KiB
C
137 lines
4.5 KiB
C
/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2020 NewRisingSun
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Mapper 422: "Normal" version of the mapper. Represents UNIF boards BS-400R and BS-4040R.
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Mapper 126: Power Joy version of the mapper, connecting CHR A18 and A19 in reverse order.
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Mapper 534: Waixing version of the mapper, inverting the reload value of the MMC3 scanline counter.
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*/
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#include "mapinc.h"
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#include "mmc3.h"
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static uint8 reverseCHR_A18_A19;
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static uint8 invertC000;
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static uint8 dipSwitch;
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static void wrapPRG(uint32 A, uint8 V) {
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int prgAND = EXPREGS[0] &0x40? 0x0F: 0x1F; /* 128 KiB or 256 KiB inner PRG bank selection */
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int prgOR =(EXPREGS[0] <<4 &0x70 | EXPREGS[0] <<3 &0x180) &~prgAND; /* outer PRG bank */
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switch(EXPREGS[3] &3) {
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case 0: /* MMC3 PRG mode */
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break;
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case 1:
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case 2: /* NROM-128 mode: MMC3 register 6 applies throughout $8000-$FFFF, MMC3 A13 replaced with CPU A13. */
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V =DRegBuf[6] &~1 | A >>13 &1;
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setprg8(A ^0x4000, V &prgAND | prgOR); /* wrapPRG is only called with A containing the switchable banks, so we need to manually switch the normally fixed banks in this mode as well. */
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break;
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case 3: /* NROM-256 mode: MMC3 register 6 applies throughout $8000-$FFFF, MMC3 A13-14 replaced with CPU A13-14. */
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V =DRegBuf[6] &~3 | A >>13 &3;
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setprg8(A ^0x4000, (V ^2) &prgAND | prgOR); /* wrapPRG is only called with A containing the switchable banks, so we need to manually switch the normally fixed banks in this mode as well. */
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break;
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}
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setprg8(A, V &prgAND | prgOR);
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}
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static void wrapCHR(uint32 A, uint8 V) {
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int chrAND = EXPREGS[0] &0x80? 0x7F: 0xFF; /* 128 KiB or 256 KiB innter CHR bank selection */
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int chrOR; /* outer CHR bank */
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if (reverseCHR_A18_A19) /* Mapper 126 swaps CHR A18 and A19 */
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chrOR =(EXPREGS[0] <<4 &0x080 | EXPREGS[0] <<3 &0x100 | EXPREGS[0] <<5 &0x200) &~chrAND;
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else
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chrOR =EXPREGS[0] <<4 &0x380 &~chrAND;
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if (EXPREGS[3] &0x10) /* CNROM mode: 8 KiB inner CHR bank comes from outer bank register #2 */
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setchr8(EXPREGS[2] &(chrAND >>3) | chrOR >>3);
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else /* MMC3 CHR mode */
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setchr1(A, (V & chrAND) | chrOR);
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}
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static DECLFW(writeWRAM) {
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if (~EXPREGS[3] &0x80) {
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/* Lock bit clear: Update any outer bank register */
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EXPREGS[A &3] =V;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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} else
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if ((A &3) ==2) {
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/* Lock bit set: Only update the bottom one or two bits of the CNROM bank */
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int latchMask =EXPREGS[2] &0x10? 1: 3; /* 16 or 32 KiB inner CHR bank selection */
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EXPREGS[2] &=~latchMask;
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EXPREGS[2] |= V &latchMask;
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FixMMC3CHR(MMC3_cmd);
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}
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CartBW(A, V);
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}
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static DECLFR(readDIP) {
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uint8 result =CartBR(A);
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if (EXPREGS[1] &1) result =result &~3 | dipSwitch &3; /* Replace bottom two bits with solder pad or DIP switch setting if so selected */
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return result;
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}
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static DECLFW(writeIRQ) {
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MMC3_IRQWrite(A, V ^0xFF);
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}
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static void reset(void) {
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dipSwitch++; /* Soft-resetting cycles through solder pad or DIP switch settings */
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EXPREGS[0] = EXPREGS[1] = EXPREGS[2] = EXPREGS[3] = 0;
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MMC3RegReset();
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}
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static void power(void) {
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dipSwitch =0;
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EXPREGS[0] = EXPREGS[1] = EXPREGS[2] = EXPREGS[3] = 0;
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GenMMC3Power();
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SetWriteHandler(0x6000, 0x7FFF, writeWRAM);
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SetReadHandler(0x8000, 0xFFFF, readDIP);
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if (invertC000) SetWriteHandler(0xC000, 0xDFFF, writeIRQ); /* Mapper 534 inverts the MMC3 scanline counter reload value */
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}
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static void init(CartInfo *info) {
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GenMMC3_Init(info, 512, 256, 8, info->battery);
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cwrap = wrapCHR;
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pwrap = wrapPRG;
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info->Power = power;
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info->Reset = reset;
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AddExState(EXPREGS, 4, 0, "EXPR");
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AddExState(&dipSwitch, 1, 0, "DPSW");
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}
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void Mapper126_Init(CartInfo *info) {
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reverseCHR_A18_A19 = 1;
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invertC000 = 0;
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init(info);
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}
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void Mapper422_Init(CartInfo *info) {
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reverseCHR_A18_A19 = 0;
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invertC000 = 0;
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init(info);
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}
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void Mapper534_Init(CartInfo *info) {
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reverseCHR_A18_A19 = 0;
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invertC000 = 1;
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init(info);
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}
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