180 lines
4.6 KiB
C
180 lines
4.6 KiB
C
/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2022
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* NES 2.0 Mapper 272 is used for a bootleg implementation of
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* 悪魔城 Special: ぼくDracula君 (Akumajō Special: Boku Dracula-kun).
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*
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* as implemented from
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* https://forums.nesdev.org/viewtopic.php?f=9&t=15302&start=60#p205862
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*
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*/
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#include "mapinc.h"
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static uint8 prg[2];
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static uint8 chr[8];
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static uint8 mirr;
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static uint8 pal_mirr;
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static uint8 last_pa13;
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static uint8 IRQCount;
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static uint8 IRQa;
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static SFORMAT StateRegs[] =
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{
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{ prg, 2, "PRG" },
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{ chr, 8, "CHR" },
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{ &mirr, 1, "MIRR" },
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{ &last_pa13, 1, "PA13" },
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{ &IRQCount, 1, "CNTR" },
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{ &pal_mirr, 1, "PALM" },
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{ &IRQa, 1, "CCLK" },
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{ 0 }
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};
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/* shifts bit from position `bit` into position `pos` of expression `exp` */
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#define shi(exp, bit, pos) \
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((((exp) & (1 << (bit))) >> (bit)) << (pos))
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static uint32 vrc_addr_mix(uint32 A) {
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/* this game wires A0 to VRC_A0 and A1 to VRC_A1 */
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return (A & 0xf000) | shi(A, 0, 0) | shi(A, 1, 1);
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}
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static void Sync(void) {
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uint8 i;
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setprg8(0x8000, prg[0]);
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setprg8(0xa000, prg[1]);
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setprg16(0xc000, -1);
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for (i = 0; i < 8; ++i)
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setchr1(0x400 * i, chr[i]);
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switch (pal_mirr) {
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case 2: setmirror(MI_0); break;
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case 3: setmirror(MI_1); break;
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default:
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switch (mirr) {
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case 0: setmirror(MI_V); break;
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case 1: setmirror(MI_H); break;
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}
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}
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}
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static DECLFW(M272Write) {
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/* writes to VRC chip */
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switch (vrc_addr_mix(A)) {
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case 0x8000:
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case 0x8001:
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case 0x8002:
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case 0x8003:
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prg[0] = V;
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break;
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case 0x9000:
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case 0x9001:
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case 0x9002:
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case 0x9003:
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mirr = V & 1;
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break;
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case 0xA000:
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case 0xA001:
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case 0xA002:
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case 0xA003:
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prg[1] = V;
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break;
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case 0xb000: chr[0] = (chr[0] & 0xF0) | (V & 0xF); break;
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case 0xb001: chr[0] = (chr[0] & 0xF) | ((V & 0xF) << 4); break;
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case 0xb002: chr[1] = (chr[1] & 0xF0) | (V & 0xF); break;
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case 0xb003: chr[1] = (chr[1] & 0xF) | ((V & 0xF) << 4); break;
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case 0xc000: chr[2] = (chr[2] & 0xF0) | (V & 0xF); break;
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case 0xc001: chr[2] = (chr[2] & 0xF) | ((V & 0xF) << 4); break;
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case 0xc002: chr[3] = (chr[3] & 0xF0) | (V & 0xF); break;
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case 0xc003: chr[3] = (chr[3] & 0xF) | ((V & 0xF) << 4); break;
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case 0xd000: chr[4] = (chr[4] & 0xF0) | (V & 0xF); break;
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case 0xd001: chr[4] = (chr[4] & 0xF) | ((V & 0xF) << 4); break;
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case 0xd002: chr[5] = (chr[5] & 0xF0) | (V & 0xF); break;
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case 0xd003: chr[5] = (chr[5] & 0xF) | ((V & 0xF) << 4); break;
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case 0xe000: chr[6] = (chr[6] & 0xF0) | (V & 0xF); break;
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case 0xe001: chr[6] = (chr[6] & 0xF) | ((V & 0xF) << 4); break;
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case 0xe002: chr[7] = (chr[7] & 0xF0) | (V & 0xF); break;
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case 0xe003: chr[7] = (chr[7] & 0xF) | ((V & 0xF) << 4); break;
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default:
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break;
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}
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/* writes to PAL chip */
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switch (A & 0xC00C) {
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case 0x8004: pal_mirr = V & 3; break;
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case 0x800c: X6502_IRQBegin(FCEU_IQEXT); break;
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case 0xc004: X6502_IRQEnd(FCEU_IQEXT); break;
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case 0xc008: IRQa = 1; break;
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case 0xc00c: IRQa = 0; IRQCount = 0; X6502_IRQEnd(FCEU_IQEXT); break;
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}
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Sync();
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}
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static void M272Power(void) {
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prg[0] = prg[1] = 0;
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chr[0] = chr[1] = chr[2] = chr[3] = 0;
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chr[4] = chr[5] = chr[6] = chr[7] = 0;
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mirr = pal_mirr = 0;
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last_pa13 = 0;
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IRQCount = 0;
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IRQa = 0;
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Sync();
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SetWriteHandler(0x8000, 0xFFFF, M272Write);
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SetReadHandler(0x8000, 0xFFFF, CartBR);
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}
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static void M272Hook(uint32 A) {
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uint8 pa13 = (A >> 13) & 1;
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if ((last_pa13 == 1) && (pa13 == 0)) {
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if (IRQa) {
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IRQCount++;
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if (IRQCount == 84) {
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IRQCount = 0;
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X6502_IRQBegin(FCEU_IQEXT);
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}
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}
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}
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last_pa13 = pa13;
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}
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static void M272Reset(void) {
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prg[0] = prg[1] = 0;
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chr[0] = chr[1] = chr[2] = chr[3] = 0;
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chr[4] = chr[5] = chr[6] = chr[7] = 0;
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mirr = pal_mirr = 0;
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last_pa13 = 0;
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IRQCount = 0;
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IRQa = 0;
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Sync();
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}
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static void StateRestore(int version) {
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Sync();
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}
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void Mapper272_Init(CartInfo *info) {
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info->Power = M272Power;
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info->Reset = M272Reset;
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PPU_hook = M272Hook;
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GameStateRestore = StateRestore;
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AddExState(&StateRegs, ~0, 0, 0);
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}
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