646 lines
16 KiB
C
646 lines
16 KiB
C
/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2002 Xodnizel
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <string.h>
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#include "fceu.h"
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#include "fceu-types.h"
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#include "x6502.h"
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#include "fceu.h"
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#include "sound.h"
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X6502 X;
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#ifdef FCEUDEF_DEBUGGER
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void (*X6502_Run)(int32 cycles);
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#endif
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uint32 timestamp;
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uint32 sound_timestamp;
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void FP_FASTAPASS(1) (*MapIRQHook)(int a);
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#define _PC X.PC
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#define _A X.A
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#define _X X.X
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#define _Y X.Y
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#define _S X.S
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#define _P X.P
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#define _PI X.mooPI
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#define _DB X.DB
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#define _count X.count
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#define _tcount X.tcount
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#define _IRQlow X.IRQlow
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#define _jammed X.jammed
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#define ADDCYC(x) { \
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int __x = x; \
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_tcount += __x; \
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_count -= __x * 48; \
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timestamp += __x; \
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if (!overclocked) sound_timestamp += __x; \
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}
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static INLINE uint8 RdMemNorm(uint32 A) {
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return(_DB = ARead[A](A));
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}
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static INLINE void WrMemNorm(uint32 A, uint8 V) {
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BWrite[A](A, V);
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}
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#ifdef FCEUDEF_DEBUGGER
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X6502 XSave; /* This is getting ugly. */
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static INLINE uint8 RdMemHook(uint32 A) {
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if (X.ReadHook)
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return(_DB = X.ReadHook(&X, A));
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else
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return(_DB = ARead[A](A));
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}
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static INLINE void WrMemHook(uint32 A, uint8 V) {
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if (X.WriteHook)
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X.WriteHook(&X, A, V);
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else
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BWrite[A](A, V);
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}
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#endif
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static INLINE uint8 RdRAMFast(uint32 A) {
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return(_DB = RAM[A]);
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}
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static INLINE void WrRAMFast(uint32 A, uint8 V) {
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RAM[A] = V;
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}
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uint8 FASTAPASS(1) X6502_DMR(uint32 A) {
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ADDCYC(1);
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return(X.DB = ARead[A](A));
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}
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void FASTAPASS(2) X6502_DMW(uint32 A, uint8 V) {
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ADDCYC(1);
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BWrite[A](A, V);
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}
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#define PUSH(V) { \
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uint8 VTMP = V; \
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WrRAM(0x100 + _S, VTMP); \
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_S--; \
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}
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#define POP() RdRAM(0x100 + (++_S))
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static uint8 ZNTable[256];
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/* Some of these operations will only make sense if you know what the flag constants are. */
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#define X_ZN(zort) _P &= ~(Z_FLAG | N_FLAG); _P |= ZNTable[zort]
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#define X_ZNT(zort) _P |= ZNTable[zort]
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#define JR(cond) { \
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if (cond) \
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{ \
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uint32 tmp; \
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int32 disp; \
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disp = (int8)RdMem(_PC); \
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_PC++; \
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ADDCYC(1); \
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tmp = _PC; \
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_PC += disp; \
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if ((tmp ^ _PC) & 0x100) \
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ADDCYC(1); \
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} else _PC++; \
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}
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#define LDA _A = x; X_ZN(_A)
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#define LDX _X = x; X_ZN(_X)
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#define LDY _Y = x; X_ZN(_Y)
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/* All of the freaky arithmetic operations. */
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#define AND _A &= x; X_ZN(_A)
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#define BIT _P &= ~(Z_FLAG | V_FLAG | N_FLAG); _P |= ZNTable[x & _A] & Z_FLAG; _P |= x & (V_FLAG | N_FLAG)
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#define EOR _A ^= x; X_ZN(_A)
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#define ORA _A |= x; X_ZN(_A)
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#define ADC { \
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uint32 l = _A + x + (_P & 1); \
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_P &= ~(Z_FLAG | C_FLAG | N_FLAG | V_FLAG); \
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_P |= ((((_A ^ x) & 0x80) ^ 0x80) & ((_A ^ l) & 0x80)) >> 1; \
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_P |= (l >> 8) & C_FLAG; \
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_A = l; \
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X_ZNT(_A); \
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}
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#define SBC { \
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uint32 l = _A - x - ((_P & 1) ^ 1); \
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_P &= ~(Z_FLAG | C_FLAG | N_FLAG | V_FLAG); \
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_P |= ((_A ^ l) & (_A ^ x) & 0x80) >> 1; \
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_P |= ((l >> 8) & C_FLAG) ^ C_FLAG; \
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_A = l; \
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X_ZNT(_A); \
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}
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#define CMPL(a1, a2) { \
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uint32 t = a1 - a2; \
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X_ZN(t & 0xFF); \
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_P &= ~C_FLAG; \
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_P |= ((t >> 8) & C_FLAG) ^ C_FLAG; \
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}
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/* Special undocumented operation. Very similar to CMP. */
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#define AXS { \
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uint32 t = (_A & _X) - x; \
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X_ZN(t & 0xFF); \
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_P &= ~C_FLAG; \
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_P |= ((t >> 8) & C_FLAG) ^ C_FLAG; \
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_X = t; \
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}
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#define CMP CMPL(_A, x)
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#define CPX CMPL(_X, x)
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#define CPY CMPL(_Y, x)
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/* The following operations modify the byte being worked on. */
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#define DEC x--; X_ZN(x)
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#define INC x++; X_ZN(x)
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#define ASL _P &= ~C_FLAG; _P |= x >> 7; x <<= 1; X_ZN(x)
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#define LSR _P &= ~(C_FLAG | N_FLAG | Z_FLAG); _P |= x & 1; x >>= 1; X_ZNT(x)
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/* For undocumented instructions, maybe for other things later... */
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#define LSRA _P &= ~(C_FLAG | N_FLAG | Z_FLAG); _P |= _A & 1; _A >>= 1; X_ZNT(_A)
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#define ROL { \
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uint8 l = x >> 7; \
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x <<= 1; \
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x |= _P & C_FLAG; \
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_P &= ~(Z_FLAG | N_FLAG | C_FLAG); \
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_P |= l; \
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X_ZNT(x); \
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}
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#define ROR { \
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uint8 l = x & 1; \
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x >>= 1; \
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x |= (_P & C_FLAG) << 7; \
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_P &= ~(Z_FLAG | N_FLAG | C_FLAG); \
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_P |= l; \
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X_ZNT(x); \
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}
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/* Icky icky thing for some undocumented instructions. Can easily be
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* broken if names of local variables are changed.
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*/
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/* Absolute */
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#define GetAB(target) { \
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target = RdMem(_PC); \
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_PC++; \
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target |= RdMem(_PC) << 8; \
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_PC++; \
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}
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/* Absolute Indexed(for reads) */
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#define GetABIRD(target, i) { \
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uint32 tmp; \
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GetAB(tmp); \
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target = tmp; \
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target += i; \
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if ((target ^ tmp) & 0x100) { \
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target &= 0xFFFF; \
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RdMem(target ^ 0x100); \
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ADDCYC(1); \
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} \
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}
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/* Absolute Indexed(for writes and rmws) */
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#define GetABIWR(target, i) { \
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uint32 rt; \
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GetAB(rt); \
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target = rt; \
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target += i; \
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target &= 0xFFFF; \
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RdMem((target & 0x00FF) | (rt & 0xFF00)); \
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}
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/* Zero Page */
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#define GetZP(target) { \
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target = RdMem(_PC); \
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_PC++; \
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}
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/* Zero Page Indexed */
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#define GetZPI(target, i) { \
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target = i + RdMem(_PC); \
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_PC++; \
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}
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/* Indexed Indirect */
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#define GetIX(target) { \
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uint8 tmp; \
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tmp = RdMem(_PC); \
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_PC++; \
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tmp += _X; \
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target = RdRAM(tmp); \
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tmp++; \
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target |= RdRAM(tmp) << 8; \
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}
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/* Indirect Indexed(for reads) */
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#define GetIYRD(target) { \
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uint32 rt; \
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uint8 tmp; \
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tmp = RdMem(_PC); \
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_PC++; \
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rt = RdRAM(tmp); \
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tmp++; \
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rt |= RdRAM(tmp) << 8; \
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target = rt; \
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target += _Y; \
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if ((target ^ rt) & 0x100) { \
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target &= 0xFFFF; \
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RdMem(target ^ 0x100); \
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ADDCYC(1); \
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} \
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}
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/* Indirect Indexed(for writes and rmws) */
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#define GetIYWR(target) { \
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uint32 rt; \
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uint8 tmp; \
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tmp = RdMem(_PC); \
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_PC++; \
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rt = RdRAM(tmp); \
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tmp++; \
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rt |= RdRAM(tmp) << 8; \
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target = rt; \
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target += _Y; \
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target &= 0xFFFF; \
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RdMem((target & 0x00FF) | (rt & 0xFF00)); \
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}
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/* Now come the macros to wrap up all of the above stuff addressing mode functions
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and operation macros. Note that operation macros will always operate(redundant
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redundant) on the variable "x".
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*/
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#define RMW_A(op) { uint8 x = _A; op; _A = x; break; } /* Meh... */
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#define RMW_AB(op) { uint32 A; uint8 x; GetAB(A); x = RdMem(A); WrMem(A, x); op; WrMem(A, x); break; }
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#define RMW_ABI(reg, op) { uint32 A; uint8 x; GetABIWR(A, reg); x = RdMem(A); WrMem(A, x); op; WrMem(A, x); break; }
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#define RMW_ABX(op) RMW_ABI(_X, op)
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#define RMW_ABY(op) RMW_ABI(_Y, op)
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#define RMW_IX(op) { uint32 A; uint8 x; GetIX(A); x = RdMem(A); WrMem(A, x); op; WrMem(A, x); break; }
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#define RMW_IY(op) { uint32 A; uint8 x; GetIYWR(A); x = RdMem(A); WrMem(A, x); op; WrMem(A, x); break; }
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#define RMW_ZP(op) { uint8 A; uint8 x; GetZP(A); x = RdRAM(A); op; WrRAM(A, x); break; }
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#define RMW_ZPX(op) { uint8 A; uint8 x; GetZPI(A, _X); x = RdRAM(A); op; WrRAM(A, x); break; }
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#define LD_IM(op) { uint8 x; x = RdMem(_PC); _PC++; op; break; }
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#define LD_ZP(op) { uint8 A; uint8 x; GetZP(A); x = RdRAM(A); op; break; }
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#define LD_ZPX(op) { uint8 A; uint8 x; GetZPI(A, _X); x = RdRAM(A); op; break; }
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#define LD_ZPY(op) { uint8 A; uint8 x; GetZPI(A, _Y); x = RdRAM(A); op; break; }
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#define LD_AB(op) { uint32 A; uint8 x; GetAB(A); x = RdMem(A); op; break; }
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#define LD_ABI(reg, op) { uint32 A; uint8 x; GetABIRD(A, reg); x = RdMem(A); op; break; }
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#define LD_ABX(op) LD_ABI(_X, op)
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#define LD_ABY(op) LD_ABI(_Y, op)
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#define LD_IX(op) { uint32 A; uint8 x; GetIX(A); x = RdMem(A); op; break; }
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#define LD_IY(op) { uint32 A; uint8 x; GetIYRD(A); x = RdMem(A); op; break; }
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#define ST_ZP(r) { uint8 A; GetZP(A); WrRAM(A, r); break; }
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#define ST_ZPX(r) { uint8 A; GetZPI(A, _X); WrRAM(A, r); break; }
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#define ST_ZPY(r) { uint8 A; GetZPI(A, _Y); WrRAM(A, r); break; }
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#define ST_AB(r) { uint32 A; GetAB(A); WrMem(A, r); break; }
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#define ST_ABI(reg, r) { uint32 A; GetABIWR(A, reg); WrMem(A, r); break; }
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#define ST_ABX(r) ST_ABI(_X, r)
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#define ST_ABY(r) ST_ABI(_Y, r)
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#define ST_IX(r) { uint32 A; GetIX(A); WrMem(A, r); break; }
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#define ST_IY(r) { uint32 A; GetIYWR(A); WrMem(A, r); break; }
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static uint8 CycTable[256] =
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{
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/*0x00*/ 7, 6, 2, 8, 3, 3, 5, 5, 3, 2, 2, 2, 4, 4, 6, 6,
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/*0x10*/ 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7,
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/*0x20*/ 6, 6, 2, 8, 3, 3, 5, 5, 4, 2, 2, 2, 4, 4, 6, 6,
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/*0x30*/ 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7,
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/*0x40*/ 6, 6, 2, 8, 3, 3, 5, 5, 3, 2, 2, 2, 3, 4, 6, 6,
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/*0x50*/ 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7,
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/*0x60*/ 6, 6, 2, 8, 3, 3, 5, 5, 4, 2, 2, 2, 5, 4, 6, 6,
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/*0x70*/ 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7,
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/*0x80*/ 2, 6, 2, 6, 3, 3, 3, 3, 2, 2, 2, 2, 4, 4, 4, 4,
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/*0x90*/ 2, 6, 2, 6, 4, 4, 4, 4, 2, 5, 2, 5, 5, 5, 5, 5,
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/*0xA0*/ 2, 6, 2, 6, 3, 3, 3, 3, 2, 2, 2, 2, 4, 4, 4, 4,
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/*0xB0*/ 2, 5, 2, 5, 4, 4, 4, 4, 2, 4, 2, 4, 4, 4, 4, 4,
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/*0xC0*/ 2, 6, 2, 8, 3, 3, 5, 5, 2, 2, 2, 2, 4, 4, 6, 6,
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/*0xD0*/ 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7,
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/*0xE0*/ 2, 6, 2, 8, 3, 3, 5, 5, 2, 2, 2, 2, 4, 4, 6, 6,
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/*0xF0*/ 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7,
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};
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void FASTAPASS(1) X6502_IRQBegin(int w) {
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_IRQlow |= w;
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}
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void FASTAPASS(1) X6502_IRQEnd(int w) {
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_IRQlow &= ~w;
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}
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void TriggerNMI(void) {
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_IRQlow |= FCEU_IQNMI;
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}
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void TriggerNMI2(void) {
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_IRQlow |= FCEU_IQNMI2;
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}
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#ifdef FCEUDEF_DEBUGGER
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/* Called from debugger. */
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void FCEUI_NMI(void) {
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_IRQlow |= FCEU_IQNMI;
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}
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void FCEUI_IRQ(void) {
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_IRQlow |= FCEU_IQTEMP;
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}
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void FCEUI_GetIVectors(uint16 *reset, uint16 *irq, uint16 *nmi) {
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fceuindbg = 1;
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*reset = RdMemNorm(0xFFFC);
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*reset |= RdMemNorm(0xFFFD) << 8;
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*nmi = RdMemNorm(0xFFFA);
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*nmi |= RdMemNorm(0xFFFB) << 8;
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*irq = RdMemNorm(0xFFFE);
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*irq |= RdMemNorm(0xFFFF) << 8;
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fceuindbg = 0;
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}
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static int debugmode;
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#endif
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void X6502_Reset(void) {
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_IRQlow = FCEU_IQRESET;
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}
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void X6502_Init(void) {
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int x;
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memset((void*)&X, 0, sizeof(X));
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for (x = 0; x < 256; x++)
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if (!x)
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ZNTable[x] = Z_FLAG;
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else if (x & 0x80)
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ZNTable[x] = N_FLAG;
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else
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ZNTable[x] = 0;
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#ifdef FCEUDEF_DEBUGGER
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X6502_Debug(0, 0, 0);
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#endif
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}
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void X6502_Power(void) {
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_count = _tcount = _IRQlow = _PC = _A = _X = _Y = _P = _PI = _DB = _jammed = 0;
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_S = 0xFD;
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timestamp = sound_timestamp = 0;
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X6502_Reset();
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}
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#ifdef FCEUDEF_DEBUGGER
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static void X6502_RunDebug(int32 cycles) {
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#define RdRAM RdMemHook
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#define WrRAM WrMemHook
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#define RdMem RdMemHook
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#define WrMem WrMemHook
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if (PAL)
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cycles *= 15; /* 15*4=60 */
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else
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cycles *= 16; /* 16*4=64 */
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_count += cycles;
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while (_count > 0) {
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int32 temp;
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uint8 b1;
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if (_IRQlow) {
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if (_IRQlow & FCEU_IQRESET) {
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_PC = RdMem(0xFFFC);
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_PC |= RdMem(0xFFFD) << 8;
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_jammed = 0;
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_PI = _P = I_FLAG;
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_IRQlow &= ~FCEU_IQRESET;
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} else if (_IRQlow & FCEU_IQNMI2) {
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_IRQlow &= ~FCEU_IQNMI2;
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_IRQlow |= FCEU_IQNMI;
|
|
} else if (_IRQlow & FCEU_IQNMI) {
|
|
if (!_jammed) {
|
|
ADDCYC(7);
|
|
PUSH(_PC >> 8);
|
|
PUSH(_PC);
|
|
PUSH((_P & ~B_FLAG) | (U_FLAG));
|
|
_P |= I_FLAG;
|
|
_PC = RdMem(0xFFFA);
|
|
_PC |= RdMem(0xFFFB) << 8;
|
|
_IRQlow &= ~FCEU_IQNMI;
|
|
}
|
|
} else {
|
|
if (!(_PI & I_FLAG) && !_jammed) {
|
|
ADDCYC(7);
|
|
PUSH(_PC >> 8);
|
|
PUSH(_PC);
|
|
PUSH((_P & ~B_FLAG) | (U_FLAG));
|
|
_P |= I_FLAG;
|
|
_PC = RdMem(0xFFFE);
|
|
_PC |= RdMem(0xFFFF) << 8;
|
|
}
|
|
}
|
|
_IRQlow &= ~(FCEU_IQTEMP);
|
|
if (_count <= 0) {
|
|
_PI = _P;
|
|
return;
|
|
} /* Should increase accuracy without a
|
|
* major speed hit.
|
|
*/
|
|
}
|
|
|
|
if (X.CPUHook) X.CPUHook(&X);
|
|
/* Ok, now the real fun starts.
|
|
* Do the pre-exec voodoo.
|
|
*/
|
|
if (X.ReadHook || X.WriteHook) {
|
|
uint32 tsave = timestamp;
|
|
XSave = X;
|
|
|
|
fceuindbg = 1;
|
|
X.preexec = 1;
|
|
b1 = RdMem(_PC);
|
|
_PC++;
|
|
switch (b1) {
|
|
#include "ops.h"
|
|
}
|
|
|
|
timestamp = tsave;
|
|
|
|
/* In case an NMI/IRQ/RESET was triggered by the debugger.
|
|
* Should we also copy over the other hook variables?
|
|
*/
|
|
XSave.IRQlow = X.IRQlow;
|
|
XSave.ReadHook = X.ReadHook;
|
|
XSave.WriteHook = X.WriteHook;
|
|
XSave.CPUHook = X.CPUHook;
|
|
X = XSave;
|
|
fceuindbg = 0;
|
|
}
|
|
|
|
_PI = _P;
|
|
b1 = RdMem(_PC);
|
|
ADDCYC(CycTable[b1]);
|
|
|
|
temp = _tcount;
|
|
_tcount = 0;
|
|
if (MapIRQHook) MapIRQHook(temp);
|
|
|
|
if (!overclocked)
|
|
FCEU_SoundCPUHook(temp);
|
|
|
|
_PC++;
|
|
switch (b1) {
|
|
#include "ops.h"
|
|
}
|
|
}
|
|
#undef RdRAM
|
|
#undef WrRAM
|
|
#undef RdMem
|
|
#undef WrMem
|
|
}
|
|
|
|
static void X6502_RunNormal(int32 cycles)
|
|
#else
|
|
void X6502_Run(int32 cycles)
|
|
#endif
|
|
{
|
|
#define RdRAM RdRAMFast
|
|
#define WrRAM WrRAMFast
|
|
#define RdMem RdMemNorm
|
|
#define WrMem WrMemNorm
|
|
|
|
#if (defined(C80x86) && defined(__GNUC__))
|
|
/* Gives a nice little speed boost. */
|
|
register uint16 pbackus asm ("edi");
|
|
#else
|
|
uint16 pbackus;
|
|
#endif
|
|
|
|
pbackus = _PC;
|
|
|
|
#undef _PC
|
|
#define _PC pbackus
|
|
|
|
if (PAL)
|
|
cycles *= 15; /* 15*4=60 */
|
|
else
|
|
cycles *= 16; /* 16*4=64 */
|
|
|
|
_count += cycles;
|
|
|
|
while (_count > 0) {
|
|
int32 temp;
|
|
uint8 b1;
|
|
|
|
if (_IRQlow) {
|
|
if (_IRQlow & FCEU_IQRESET) {
|
|
_PC = RdMem(0xFFFC);
|
|
_PC |= RdMem(0xFFFD) << 8;
|
|
_jammed = 0;
|
|
_PI = _P = I_FLAG;
|
|
_IRQlow &= ~FCEU_IQRESET;
|
|
} else if (_IRQlow & FCEU_IQNMI2) {
|
|
_IRQlow &= ~FCEU_IQNMI2;
|
|
_IRQlow |= FCEU_IQNMI;
|
|
} else if (_IRQlow & FCEU_IQNMI) {
|
|
if (!_jammed) {
|
|
ADDCYC(7);
|
|
PUSH(_PC >> 8);
|
|
PUSH(_PC);
|
|
PUSH((_P & ~B_FLAG) | (U_FLAG));
|
|
_P |= I_FLAG;
|
|
_PC = RdMem(0xFFFA);
|
|
_PC |= RdMem(0xFFFB) << 8;
|
|
_IRQlow &= ~FCEU_IQNMI;
|
|
}
|
|
} else {
|
|
if (!(_PI & I_FLAG) && !_jammed) {
|
|
ADDCYC(7);
|
|
PUSH(_PC >> 8);
|
|
PUSH(_PC);
|
|
PUSH((_P & ~B_FLAG) | (U_FLAG));
|
|
_P |= I_FLAG;
|
|
_PC = RdMem(0xFFFE);
|
|
_PC |= RdMem(0xFFFF) << 8;
|
|
}
|
|
}
|
|
_IRQlow &= ~(FCEU_IQTEMP);
|
|
if (_count <= 0) {
|
|
_PI = _P;
|
|
X.PC = pbackus;
|
|
return;
|
|
} /* Should increase accuracy without a
|
|
* major speed hit.
|
|
*/
|
|
}
|
|
|
|
_PI = _P;
|
|
b1 = RdMem(_PC);
|
|
|
|
ADDCYC(CycTable[b1]);
|
|
|
|
temp = _tcount;
|
|
_tcount = 0;
|
|
if (MapIRQHook) MapIRQHook(temp);
|
|
if (!overclocked)
|
|
FCEU_SoundCPUHook(temp);
|
|
X.PC = pbackus;
|
|
_PC++;
|
|
switch (b1) {
|
|
#include "ops.h"
|
|
}
|
|
}
|
|
|
|
#undef _PC
|
|
#define _PC X.PC
|
|
_PC = pbackus;
|
|
#undef RdRAM
|
|
#undef WrRAM
|
|
}
|
|
|
|
#ifdef FCEUDEF_DEBUGGER
|
|
void X6502_Debug(void (*CPUHook)(X6502 *), uint8 (*ReadHook)(X6502 *, uint32), void (*WriteHook)(X6502 *, uint32, uint8)) {
|
|
debugmode = (ReadHook || WriteHook || CPUHook) ? 1 : 0;
|
|
X.ReadHook = ReadHook;
|
|
X.WriteHook = WriteHook;
|
|
X.CPUHook = CPUHook;
|
|
|
|
if (!debugmode)
|
|
X6502_Run = X6502_RunNormal;
|
|
else
|
|
X6502_Run = X6502_RunDebug;
|
|
}
|
|
|
|
#endif
|