diff --git a/src/boards/268.c b/src/boards/268.c new file mode 100644 index 0000000..b5514f7 --- /dev/null +++ b/src/boards/268.c @@ -0,0 +1,153 @@ +/* FCEUmm - NES/Famicom Emulator + * + * Copyright notice for this file: + * Copyright (C) 2022 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include "mapinc.h" +#include "mmc3.h" + +static uint8 *CHRRAM =NULL; +static uint8 submapper; + +static void Mapper268_PRGWrap(uint32 A, uint8 V) { + int prgMaskMMC3, prgMaskGNROM, prgOffset; + + prgMaskMMC3 =(EXPREGS[3] &0x10? 0x00: 0x0F) /* PRG A13-A16 */ + |(EXPREGS[0] &0x40? 0x00: 0x10) /* PRG A17 */ + |(EXPREGS[1] &0x80? 0x00: 0x20) /* PRG A18 */ + |(EXPREGS[1] &0x40? 0x40: 0x00) /* PRG A19 */ + |(EXPREGS[1] &0x20? 0x80: 0x00) /* PRG A20 */ + ; + switch(submapper &~1) { + default: /* Original implementation */ + prgMaskGNROM =EXPREGS[3] &0x10? (EXPREGS[1] &0x02? 0x03: 0x01): 0x00; + prgOffset =EXPREGS[3] &0x00E + |EXPREGS[0] <<4 &0x070 + |EXPREGS[1] <<3 &0x080 + |EXPREGS[1] <<6 &0x300 + |EXPREGS[0] <<6 &0xC00; + break; + case 2: /* Later revision with different arrangement of register 1 */ + prgMaskGNROM =EXPREGS[3] &0x10? (EXPREGS[1] &0x10? 0x01: 0x03): 0x00; + prgOffset =EXPREGS[3] &0x00E + |EXPREGS[0] <<4 &0x070 + |EXPREGS[1] <<4 &0x080 + |EXPREGS[1] <<7 &0x300 + |EXPREGS[0] <<6 &0xC00; + break; + case 4: /* LD622D: PRG A20-21 moved to register 0 */ + prgMaskGNROM =EXPREGS[3] &0x10? (EXPREGS[1] &0x02? 0x03: 0x01): 0x00; + prgOffset =EXPREGS[3] &0x00E + |EXPREGS[0] <<4 &0x070 + |EXPREGS[0] <<3 &0x180; + break; + case 6: /* J-852C: CHR A17 selects between two PRG chips */ + prgMaskGNROM =EXPREGS[3] &0x10? (EXPREGS[1] &0x02? 0x03: 0x01): 0x00; + prgOffset =EXPREGS[3] &0x00E + |EXPREGS[0] <<4 &0x070 + |EXPREGS[1] <<3 &0x080 + |EXPREGS[1] <<6 &0x300 + |EXPREGS[0] <<6 &0xC00; + prgOffset &=ROM_size -1; + if (EXPREGS[0] &0x80? !!(EXPREGS[0] &0x08): !!(DRegBuf[0] &0x80)) prgOffset |=ROM_size; + break; + } + prgOffset &=~(prgMaskMMC3 | prgMaskGNROM); + setprg8(A, V &prgMaskMMC3 | prgOffset | A >>13 &prgMaskGNROM); +} + +static void Mapper268_CHRWrap(uint32 A, uint8 V) { + int chrMaskMMC3, chrMaskGNROM, chrOffset; + + chrMaskMMC3 =EXPREGS[3] &0x10? 0x00: EXPREGS[0] &0x80? 0x7F: 0xFF; + chrMaskGNROM =EXPREGS[3] &0x10? 0x07: 0x00; + chrOffset =EXPREGS[0] <<4 &0x380 | EXPREGS[2] <<3 &0x078; + chrOffset &=~(chrMaskMMC3 | chrMaskGNROM); + + setchr1r(CHRRAM && EXPREGS[4] &0x01 && (V &0xFE) ==(EXPREGS[4] &0xFE)? 0x10: 0x00, A, V &chrMaskMMC3 | chrOffset | A >>10 &chrMaskGNROM); +} + +static DECLFR(Mapper268_ReadWRAM) { + return A001B &0xA0? CartBR(A): X.DB; +} + +static DECLFW(Mapper268_WriteWRAM) { + if (A001B &0x80 && ~A001B &0x40 || A001B &0x20) CartBW(A, V); +} + +static DECLFW(Mapper268_WriteReg) { + int index =A &7; + if (~EXPREGS[3] &0x80 || index ==2) { + if (index ==2) { + if (EXPREGS[2] &0x80) V =V &0x0F | EXPREGS[2] &~0x0F; + V &=~EXPREGS[2] >>3 &0xE |0xF1; + } + EXPREGS[index] =V; + FixMMC3PRG(MMC3_cmd); + FixMMC3CHR(MMC3_cmd); + } + if (~submapper &1) Mapper268_WriteWRAM(A, V); +} + +static void Mapper268_Reset(void) { + EXPREGS[0] =EXPREGS[1] =EXPREGS[2] =EXPREGS[3] =EXPREGS[4] =EXPREGS[5] =0; + MMC3RegReset(); +} + +static void Mapper268_Power(void) { + EXPREGS[0] =EXPREGS[1] =EXPREGS[2] =EXPREGS[3] =EXPREGS[4] =EXPREGS[5] =0; + GenMMC3Power(); + SetReadHandler(0x6000, 0x7FFF, Mapper268_ReadWRAM); + if (submapper &1) { + SetWriteHandler(0x5000, 0x5FFF, Mapper268_WriteReg); + SetWriteHandler(0x6000, 0x7FFF, Mapper268_WriteWRAM); + } else + SetWriteHandler(0x6000, 0x7FFF, Mapper268_WriteReg); +} + +static void Mapper268_close(void) { + if (CHRRAM) FCEU_gfree(CHRRAM); + CHRRAM =NULL; + GenMMC3Close(); +} + +void Mapper268_Init(CartInfo *info) { + submapper = info->submapper; + GenMMC3_Init(info, 512, 256, (info->PRGRamSize +info->PRGRamSaveSize) >>10, info->battery); + cwrap = Mapper268_CHRWrap; + pwrap = Mapper268_PRGWrap; + info->Power = Mapper268_Power; + info->Reset = Mapper268_Reset; + info->Close = Mapper268_close; + AddExState(EXPREGS, 8, 0, "EXPR"); + + if (info->CHRRomSize && info->CHRRamSize + info->CHRRamSaveSize) { + CHRRAM =(uint8 *)FCEU_gmalloc(info->CHRRamSize + info->CHRRamSaveSize); + SetupCartCHRMapping(0x10, CHRRAM, info->CHRRamSize + info->CHRRamSaveSize, 1); + AddExState(CHRRAM, info->CHRRamSize + info->CHRRamSaveSize, 0, "CRAM"); + } +} + +void COOLBOY_Init(CartInfo *info) { + info->submapper =0; + Mapper268_Init(info); +} + +void MINDKIDS_Init(CartInfo *info) { + info->submapper =1; + Mapper268_Init(info); +} diff --git a/src/boards/351.c b/src/boards/351.c index 6ef4b59..e8db51c 100644 --- a/src/boards/351.c +++ b/src/boards/351.c @@ -68,6 +68,12 @@ static void sync () { int chip =reg[2] &0x01 && CHRRAM? 0x10: 0x00; if (reg[2] &0x10) { /* NROM mode */ + if (reg[2] &0x08) { /* NROM-64 */ + setprg8r(chip, 0x8000, prgOR); + setprg8r(chip, 0xA000, prgOR); + setprg8r(chip, 0xC000, prgOR); + setprg8r(chip, 0xE000, prgOR); + } else if (reg[2] &0x04) { /* NROM-128 */ setprg16r(chip, 0x8000, prgOR >>1); setprg16r(chip, 0xC000, prgOR >>1); diff --git a/src/boards/40.c b/src/boards/40.c index 80d1ad0..e64c16d 100644 --- a/src/boards/40.c +++ b/src/boards/40.c @@ -2,6 +2,7 @@ * * Copyright notice for this file: * Copyright (C) 2012 CaH4e3 + * Copyright (C) 2022 NewRisingSun * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,7 +24,8 @@ #include "mapinc.h" -static uint8 reg; +static uint8 submapper; +static uint8 reg, outer; static uint32 IRQCount, IRQa; static SFORMAT StateRegs[] = @@ -31,34 +33,51 @@ static SFORMAT StateRegs[] = { &IRQCount, 4, "IRQC" }, { &IRQa, 4, "IRQA" }, { ®, 1, "REG" }, + { ®, 1, "OUTE" }, { 0 } }; static void Sync(void) { - setprg8(0x6000, ~1); - setprg8(0x8000, ~3); - setprg8(0xa000, ~2); - setprg8(0xc000, reg); - setprg8(0xe000, ~0); - setchr8(0); + if (outer &0x08) { + if (outer &0x10) + setprg32(0x8000, 2 | outer >>6); + else { + setprg16(0x8000, 4 | outer >>5); + setprg16(0xC000, 4 | outer >>5); + } + } else { + setprg8(0x6000, 6); + setprg8(0x8000, 4); + setprg8(0xa000, 5); + setprg8(0xc000, reg &7); + setprg8(0xe000, 7); + } + setchr8(outer >>1); + setmirror(outer &1? MI_H: MI_V); } static DECLFW(M40Write) { switch (A & 0xe000) { case 0x8000: IRQa = 0; IRQCount = 0; X6502_IRQEnd(FCEU_IQEXT); break; case 0xa000: IRQa = 1; break; + case 0xc000: if (submapper ==1) { outer =A &0xFF; Sync(); } break; case 0xe000: reg = V & 7; Sync(); break; } } static void M40Power(void) { reg = 0; + outer = 0; + IRQa = 0; + X6502_IRQEnd(FCEU_IQEXT); Sync(); SetReadHandler(0x6000, 0xffff, CartBR); SetWriteHandler(0x8000, 0xffff, M40Write); } static void M40Reset(void) { + outer = 0; + Sync(); } static void FP_FASTAPASS(1) M40IRQHook(int a) { @@ -77,6 +96,7 @@ static void StateRestore(int version) { } void Mapper40_Init(CartInfo *info) { + submapper =info->submapper; info->Reset = M40Reset; info->Power = M40Power; MapIRQHook = M40IRQHook; diff --git a/src/boards/432.c b/src/boards/432.c index dbdffa0..eba55d0 100644 --- a/src/boards/432.c +++ b/src/boards/432.c @@ -25,26 +25,26 @@ static void M432CW(uint32 A, uint8 V) { int chrAND = (EXPREGS[1] & 0x04) ? 0x7F : 0xFF; - int chrOR = (EXPREGS[1] << 7) & 0x080 | (EXPREGS[1] << 5) & 0x100; + int chrOR = (EXPREGS[1] << 7) & 0x080 | (EXPREGS[1] << 5) & 0x100 | (EXPREGS[1] << 4) & 0x200; setchr1(A, (V & chrAND) | (chrOR & ~chrAND)); } static void M432PW(uint32 A, uint8 V) { int prgAND = (EXPREGS[1] & 0x02) ? 0x0F : 0x1F; - int prgOR = ((EXPREGS[1] << 4) & 0x10) | (EXPREGS[1] << 1) & 0x20; + int prgOR = ((EXPREGS[1] << 4) & 0x10) | (EXPREGS[1] << 1) & 0x60; if ((A < 0xC000) || (~EXPREGS[1] & 0x40)) setprg8(A, (V & prgAND) | (prgOR & ~prgAND) & (EXPREGS[1] & 0x80?~2:~0)); if ((A < 0xC000) && (EXPREGS[1] & 0x40)) setprg8(A | 0x4000, (V & prgAND) | (prgOR & ~prgAND) | (EXPREGS[1] & 0x80? 2: 0)); } static DECLFR(M432Read) { - if (EXPREGS[0] & 1 || EXPREGS[1] & 0x20) + if (EXPREGS[0] & 1 || EXPREGS[1] & 0x20 && ROM_size <64) return EXPREGS[2]; return CartBR(A); } static DECLFW(M432Write) { EXPREGS[A & 1] = V; - if (~A &1 && ~V &1) EXPREGS[1] &=~0x20; /* Writing 0 to register 0 clears register 1's DIP bit */ + if (~A &1 && ~V &1 && ROM_size <64) EXPREGS[1] &=~0x20; /* Writing 0 to register 0 clears register 1's DIP bit */ FixMMC3PRG(MMC3_cmd); FixMMC3CHR(MMC3_cmd); } diff --git a/src/boards/449.c b/src/boards/449.c index bcb17d9..f07ebb4 100644 --- a/src/boards/449.c +++ b/src/boards/449.c @@ -22,11 +22,13 @@ static uint16 latchAddr; static uint8 latchData; +static uint8 dipswitch; static SFORMAT StateRegs[] = { { &latchAddr, 2, "ADDR" }, { &latchData, 1, "DATA" }, + { &latchData, 1, "DIPS" }, { 0 } }; @@ -54,6 +56,14 @@ static void Mapper449_Sync(void) setmirror(latchAddr &0x002? MI_H: MI_V); } +static DECLFR(Mapper449_Read) +{ + if (latchAddr &0x200) + return CartBR(A | dipswitch); + else + return CartBR(A); +} + static DECLFW(Mapper449_WriteLatch) { latchData =V; @@ -63,16 +73,18 @@ static DECLFW(Mapper449_WriteLatch) static void Mapper449_Reset(void) { + dipswitch =(dipswitch +1) &0xF; latchAddr =latchData =0; Mapper449_Sync(); } static void Mapper449_Power(void) { - latchAddr =latchData =0; + dipswitch =latchAddr =latchData =0; Mapper449_Sync(); SetWriteHandler(0x8000, 0xFFFF, Mapper449_WriteLatch); - SetReadHandler(0x6000, 0xFFFF, CartBR); + SetReadHandler(0x6000, 0x7FFF, CartBR); + SetReadHandler(0x8000, 0xFFFF, Mapper449_Read); } void Mapper449_Init(CartInfo *info) diff --git a/src/boards/452.c b/src/boards/452.c index 5791e68..5b8b3c9 100644 --- a/src/boards/452.c +++ b/src/boards/452.c @@ -25,7 +25,7 @@ static uint8 *WRAM; static uint32 WRAMSIZE; -static uint8 latch[2]; +static uint16 latch[2]; static void Mapper452_Sync(void) { uint8 wramBank = latch[1] >>3 &6 |8; @@ -37,10 +37,10 @@ static void Mapper452_Sync(void) { setprg8r(0x10, (wramBank ^4) <<12, 0); } else if (latch[1] &8) { - setprg8(0x8000, latch[0] >>1 |0); - setprg8(0xA000, latch[0] >>1 |1); - setprg8(0xC000, latch[0] >>1 |2); - setprg8(0xE000, latch[0] >>1 |3 | latch[1] &4); + setprg8(0x8000, latch[0] >>1 &~1 |0); + setprg8(0xA000, latch[0] >>1 &~1 |1); + setprg8(0xC000, latch[0] >>1 &~1 |2); + setprg8(0xE000, latch[0] >>1 &~1 |3 | latch[1] &4 | (latch[1] &0x04 && latch[1] &0x40? 8: 0)); } else { setprg16(0x8000, latch[0] >>2); setprg16(0xC000, 0); @@ -52,7 +52,7 @@ static void Mapper452_Sync(void) { } static DECLFW(Mapper452_WriteLatch) { - latch[0] =A &0xFF; + latch[0] =A &0xFFF; latch[1] =V; Mapper452_Sync(); /* Do not relay to CartBW, as RAM mapped to locations other than $8000-$DFFF are not write-enabled. */ @@ -94,5 +94,5 @@ void Mapper452_Init(CartInfo *info) { SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1); AddExState(WRAM, WRAMSIZE, 0, "WRAM"); - AddExState(&latch, 2, 0, "LATC"); + AddExState(&latch, 4, 0, "LATC"); } diff --git a/src/boards/460.c b/src/boards/460.c index 7cbd782..0422a5c 100644 --- a/src/boards/460.c +++ b/src/boards/460.c @@ -30,7 +30,7 @@ static DECLFR(Mapper460_ReadOB) static void Mapper460_PRGWrap(uint32 A, uint8 V) { int prgAND =0x0F; int prgOR =EXPREGS[0] <<4; - if (EXPREGS[0] &0x20) { + if (EXPREGS[0] &0x20 && (EXPREGS[0] !=0x20 || ~EXPREGS[1] &1)) { /* Menu selection by selectively connecting CPU D7 to reg or not */ if (~A &0x4000) { setprg8(A, (EXPREGS[0] &0x10? ~2: ~0) &V &prgAND | prgOR &~prgAND); setprg8(A |0x4000, (EXPREGS[0] &0x10? 2: 0) |V &prgAND | prgOR &~prgAND); diff --git a/src/boards/coolboy.c b/src/boards/coolboy.c deleted file mode 100644 index 357cd2a..0000000 --- a/src/boards/coolboy.c +++ /dev/null @@ -1,185 +0,0 @@ -/* FCE Ultra - NES/Famicom Emulator - * - * Copyright notice for this file: - * Copyright (C) 2015 CaH4e3, ClusteR - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - * - * CoolBoy 400-in-1 FK23C-mimic mapper 16Mb/32Mb PROM + 128K/256K CHR RAM, optional SRAM, optional NTRAM - * only MMC3 mode - * - * 6000 (xx76x210) | 0xC0 - * 6001 (xxx354x) - * 6002 = 0 - * 6003 = 0 - * - * hardware tested logic, don't try to understand lol - */ - -#include "mapinc.h" -#include "mmc3.h" - -static void COOLBOYCW(uint32 A, uint8 V) { - uint32 mask = 0xFF ^ (EXPREGS[0] & 0x80); - if (EXPREGS[3] & 0x10) { - if (EXPREGS[3] & 0x40) { /* Weird mode */ - int cbase = (MMC3_cmd & 0x80) << 5; - switch (cbase ^ A) { /* Don't even try to understand */ - case 0x0400: - case 0x0C00: V &= 0x7F; break; - } - } - /* Highest bit goes from MMC3 registers when EXPREGS[3]&0x80==0 or from EXPREGS[0]&0x08 otherwise */ - setchr1(A, - (V & 0x80 & mask) | ((((EXPREGS[0] & 0x08) << 4) & ~mask)) /* 7th bit */ - | ((EXPREGS[2] & 0x0F) << 3) /* 6-3 bits */ - | ((A >> 10) & 7) /* 2-0 bits */ - ); - } else { - if (EXPREGS[3] & 0x40) { /* Weird mode, again */ - int cbase = (MMC3_cmd & 0x80) << 5; - switch (cbase ^ A) { /* Don't even try to understand */ - case 0x0000: V = DRegBuf[0]; break; - case 0x0800: V = DRegBuf[1]; break; - case 0x0400: - case 0x0C00: V = 0; break; - } - } - /* Simple MMC3 mode - * Highest bit goes from MMC3 registers when EXPREGS[3]&0x80==0 or from EXPREGS[0]&0x08 otherwise - */ - setchr1(A, (V & mask) | (((EXPREGS[0] & 0x08) << 4) & ~mask)); - } -} - -static void COOLBOYPW(uint32 A, uint8 V) { - uint32 mask = ((0x3F | (EXPREGS[1] & 0x40) | ((EXPREGS[1] & 0x20) << 2)) ^ ((EXPREGS[0] & 0x40) >> 2)) ^ ((EXPREGS[1] & 0x80) >> 2); - uint32 base = ((EXPREGS[0] & 0x07) >> 0) | ((EXPREGS[1] & 0x10) >> 1) | ((EXPREGS[1] & 0x0C) << 2) | ((EXPREGS[0] & 0x30) << 2); - - /* Very weird mode - * Last banks are first in this mode, ignored when MMC3_cmd&0x40 - */ - if ((EXPREGS[3] & 0x40) && (V >= 0xFE) && !((MMC3_cmd & 0x40) != 0)) { - switch (A & 0xE000) { - case 0xA000: - if ((MMC3_cmd & 0x40)) V = 0; - break; - case 0xC000: - if (!(MMC3_cmd & 0x40)) V = 0; - break; - case 0xE000: - V = 0; - break; - } - } - - /* Regular MMC3 mode, internal ROM size can be up to 2048kb! */ - if (!(EXPREGS[3] & 0x10)) - setprg8(A, (((base << 4) & ~mask)) | (V & mask)); - else { /* NROM mode */ - uint8 emask; - mask &= 0xF0; - if ((((EXPREGS[1] & 2) != 0))) /* 32kb mode */ - emask = (EXPREGS[3] & 0x0C) | ((A & 0x4000) >> 13); - else /* 16kb mode */ - emask = EXPREGS[3] & 0x0E; - setprg8(A, ((base << 4) & ~mask) /* 7-4 bits are from base (see below) */ - | (V & mask) /* ... or from MM3 internal regs, depends on mask */ - | emask /* 3-1 (or 3-2 when (EXPREGS[3]&0x0C is set) from EXPREGS[3] */ - | ((A & 0x2000) >> 13)); /* 0th just as is */ - } -} - -static DECLFW(COOLBOYWrite) { - if(A001B & 0x80) - CartBW(A,V); - - /* Deny any further writes when 7th bit is 1 AND 4th is 0 */ - if ((EXPREGS[3] & 0x90) != 0x80) { - EXPREGS[A & 3] = V; - FixMMC3PRG(MMC3_cmd); - FixMMC3CHR(MMC3_cmd); - } -} - -static void COOLBOYReset(void) { - MMC3RegReset(); - EXPREGS[0] = EXPREGS[1] = EXPREGS[2] = EXPREGS[3] = 0; -#if 0 - EXPREGS[0] = 0; - EXPREGS[1] = 0x60; - EXPREGS[2] = 0; - EXPREGS[3] = 0; -#endif - FixMMC3PRG(MMC3_cmd); - FixMMC3CHR(MMC3_cmd); -} - -static void COOLBOYPower(void) { - GenMMC3Power(); - EXPREGS[0] = EXPREGS[1] = EXPREGS[2] = EXPREGS[3] = 0; -#if 0 - EXPREGS[0] = 0; - EXPREGS[1] = 0x60; - EXPREGS[2] = 0; - EXPREGS[3] = 0; -#endif - FixMMC3PRG(MMC3_cmd); - FixMMC3CHR(MMC3_cmd); - SetWriteHandler(0x5000, 0x5fff, CartBW); /* some games access random unmapped areas and crashes because of KT-008 PCB hack in MMC3 source lol */ - SetWriteHandler(0x6000, 0x7fff, COOLBOYWrite); -} - -void COOLBOY_Init(CartInfo *info) { - GenMMC3_Init(info, 512, 256, 8, 0); - pwrap = COOLBOYPW; - cwrap = COOLBOYCW; - info->Power = COOLBOYPower; - info->Reset = COOLBOYReset; - AddExState(EXPREGS, 4, 0, "EXPR"); -} - -/*------------------ MINDKIDS ---------------------------*/ -/* A COOLBOY variant that works identically but puts the outer bank registers - * in the $5xxx range instead of the $6xxx range. - * The UNIF board name is MINDKIDS (submapper 1). - * http://wiki.nesdev.com/w/index.php/NES_2.0_Mapper_268 - */ - -static void MINDKIDSPower(void) { - GenMMC3Power(); - EXPREGS[0] = EXPREGS[1] = EXPREGS[2] = EXPREGS[3] = 0; - FixMMC3PRG(MMC3_cmd); - FixMMC3CHR(MMC3_cmd); - SetWriteHandler(0x5000, 0x5fff, COOLBOYWrite); -} - -void MINDKIDS_Init(CartInfo *info) { - GenMMC3_Init(info, 2048, 256, 8, info->battery); - pwrap = COOLBOYPW; - cwrap = COOLBOYCW; - info->Power = MINDKIDSPower; - info->Reset = COOLBOYReset; - AddExState(EXPREGS, 4, 0, "EXPR"); -} - -void Mapper268_Init(CartInfo *info) { - /* Technically, the distinction between COOLBOY ($6000-$7FFF) and MINDKIDS ($5000-$5FFF) is based on a solder pad setting. */ - /* In NES 2.0, the submapper field is used to distinguish between the two settings. */ - if (info->submapper == 1) - MINDKIDS_Init(info); - else - COOLBOY_Init(info); -} diff --git a/src/boards/mmc3.c b/src/boards/mmc3.c index 633f0b5..b90e7cb 100644 --- a/src/boards/mmc3.c +++ b/src/boards/mmc3.c @@ -659,7 +659,10 @@ static void M52CW(uint32 A, uint8 V) { uint32 mask = 0xFF ^ ((EXPREGS[0] & 0x40) << 1); /* uint32 bank = (((EXPREGS[0]>>3)&4)|((EXPREGS[0]>>1)&2)|((EXPREGS[0]>>6)&(EXPREGS[0]>>4)&1))<<7; */ uint32 bank = (((EXPREGS[0] >> 4) & 2) | (EXPREGS[0] & 4) | ((EXPREGS[0] >> 6) & (EXPREGS[0] >> 4) & 1)) << 7; /* actually 256K CHR banks index bits is inverted! */ - setchr1(A, bank | (V & mask)); + if (CHRRAM && (EXPREGS[0] &3) ==3) + setchr1r(0x10, A, bank | (V & mask)); + else + setchr1(A, bank | (V & mask)); } static DECLFW(M52Write) { @@ -691,6 +694,12 @@ void Mapper52_Init(CartInfo *info) { info->Reset = M52Reset; info->Power = M52Power; AddExState(EXPREGS, 2, 0, "EXPR"); + if (info->iNES2 && info->submapper ==13) { + CHRRAMSIZE = 8192; + CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE); + SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1); + AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR"); + } } /* ---------------------------- Mapper 76 ------------------------------- */