From edea0a889969090f23b05d37923bc3c9fde60d05 Mon Sep 17 00:00:00 2001
From: negativeExponent <negativeExponent@users.noreply.github.com>
Date: Sat, 7 Mar 2020 09:37:58 +0800
Subject: [PATCH] m369: Update and reworked

---
 src/boards/369.c | 186 +++++++++++++++++++++++++++++------------------
 1 file changed, 115 insertions(+), 71 deletions(-)

diff --git a/src/boards/369.c b/src/boards/369.c
index 559f539..5a44da5 100644
--- a/src/boards/369.c
+++ b/src/boards/369.c
@@ -23,131 +23,175 @@
 #include "mapinc.h"
 #include "mmc3.h"
 
-static uint8 M40IRQa;
-static uint16 M40IRQCount;
+static uint8 mode;
+static uint8 mmc3_count, mmc3_latch, mmc3_enabled, mmc3_reload;
+static uint8 smb2_reg;
+static uint8 smb2j_enabled;
+static uint16 smb2j_count;
 
-static void M369PW(uint32 A, uint8 V) {
-	switch (EXPREGS[0]) {
+static uint32 WRAMSIZE;
+static uint8 *WRAM;
+
+static SFORMAT StateRegs[] = {
+	{ &mode, 1, "MODE" },
+	{ &mmc3_reload, 1, "IRQR" },
+	{ &mmc3_count, 1, "IRQC" },
+	{ &mmc3_latch, 1, "IRQL" },
+	{ &mmc3_enabled, 1, "IRQA" },
+	{ &smb2_reg, 1, "MBRG" },
+	{ &smb2j_enabled, 1, "MIRQ" },
+	{ &smb2j_count, 2 | FCEUSTATE_RLSB, "MIQC" },
+	{ 0 }
+};
+
+static void SyncPRG(uint32 A, uint8 V) {
+	switch (mode) {
 	case 0x00:
-		setprg32(0x8000, 0);
+	case 0x01: /* NROM */
+		setprg32(0x8000, mode & 0x01);
 		break;
-	case 0x01:
-		setprg32(0x8000, 1);
-		break;
-	case 0x13:
-		setprg8(0x6000, 0x0E);
+	case 0x13: /* Mapper 40 */
+		setprg8r(0, 0x6000, 0x0E);
 		setprg8(0x8000, 0x0C);
 		setprg8(0xa000, 0x0D);
-		setprg8(0xc000, EXPREGS[1] | 0x08);
+		setprg8(0xc000, smb2_reg | 0x08);
 		setprg8(0xe000, 0x0F);
 		break;
-	case 0x37:
+	case 0x37: /* MMC3 128 PRG */
 		setprg8r(0x10, 0x6000, 0);
 		setprg8(A, (V & 0x0F) | 0x10);
 		break;
-	case 0xFF:
+	case 0xFF: /* MMC3 256 PRG */
 		setprg8r(0x10, 0x6000, 0);
 		setprg8(A, (V & 0x1F) | 0x20);
 		break;
 	}
 }
 
-static void M369CW(uint32 A, uint8 V) {
-	switch (EXPREGS[0]) {
+static void SyncCHR(uint32 A, uint8 V) {
+	switch (mode) {
 	case 0x00:
-		setchr8(0);
+	case 0x01: /* NROM */
+	case 0x13: /* Mapper 40 */
+		setchr8(mode & 0x03);
 		break;
-	case 0x01:
-		setchr8(1);
-		break;
-	case 0x13:
-		setprg8(0xE000, 0xF);
-		setchr8(3);
-		break;
-	case 0x37:
+	case 0x37: /* MMC3 128 CHR */
 		setchr1(A, (V & 0x7F) | 0x80);
 		break;
-	case 0xFF:
-		setchr1(A, V | 0x100);
+	case 0xFF: /* MMC3 256 CHR */
+		setchr1(A, (V & 0xFF) | 0x100);
 		break;
 	}
 }
 
-static DECLFW(M369WriteCMD) {
-	EXPREGS[0] = V;
-	FixMMC3PRG(MMC3_cmd);
-	FixMMC3CHR(MMC3_cmd);
+static DECLFW(M369WriteLo) {
+	if ((A & 0xC100) == 0x4100) {
+		mode = V;
+		FixMMC3PRG(MMC3_cmd);
+		FixMMC3CHR(MMC3_cmd);
+	}
 }
 
 static DECLFW(M369Write) {
-	if (EXPREGS[0] == 0x13) {
+	if (mode == 0x13) {
 		switch (A & 0xE000) {
 		case 0x8000:
-			M40IRQa = 0;
-			M40IRQCount = 0;
+			smb2j_enabled = 0;
+			smb2j_count = 0;
 			X6502_IRQEnd(FCEU_IQEXT);
 			break;
 		case 0xA000:
-			M40IRQa = 1;
+			smb2j_enabled = 1;
 			break;
 		case 0xE000:
-			EXPREGS[1] = V & 7;
+			smb2_reg = V & 7;
 			FixMMC3PRG(MMC3_cmd);
 			FixMMC3CHR(MMC3_cmd);
 			break;
 		}
 	} else {
-		if (A < 0xC000) {
+		switch (A & 0xE001) {
+		case 0x8000:
+		case 0x8001:
+		case 0xA000:
+		case 0xA001:
 			MMC3_CMDWrite(A, V);
 			FixMMC3PRG(MMC3_cmd);
 			FixMMC3CHR(MMC3_cmd);
-		} else
-			MMC3_IRQWrite(A, V);
+			break;
+		case 0xC000:
+			mmc3_latch = V;
+			break;
+		case 0xC001:
+			mmc3_reload = 1;
+			break;
+		case 0xE000:
+			X6502_IRQEnd(FCEU_IQEXT);
+			mmc3_enabled = 0;
+			break;
+		case 0xE001:
+			mmc3_enabled = 1;
+			break;
+		}
 	}
 }
 
-static void M369Power(void) {
-	EXPREGS[0]  = 0x00;
-	EXPREGS[1]  = 0x00;
-	M40IRQa     = 0x00;
-	M40IRQCount = 0x00;
-	GenMMC3Power();
-	SetWriteHandler(0x4120, 0x4120, M369WriteCMD);
-	SetWriteHandler(0x8000, 0xFFFF, M369Write);
+static void FP_FASTAPASS(1) SMB2JIRQHook(int a) {
+	if (mode != 0x13)
+		return;
+
+	if (smb2j_enabled) {
+		if (smb2j_count < 4096)
+			smb2j_count += a;
+		else {
+			smb2j_enabled = 0;
+			X6502_IRQBegin(FCEU_IQEXT);
+		}
+	}
+}
+
+static void MMC3IRQHook(void) {
+	int32 count = mmc3_count;
+
+	if (mode == 0x13)
+		return;
+	
+	if (!count || mmc3_reload) {
+		mmc3_count = mmc3_latch;
+		mmc3_reload = 0;
+	} else
+		mmc3_count--;
+	if (count && !mmc3_count && mmc3_enabled)
+		X6502_IRQBegin(FCEU_IQEXT);
 }
 
 static void M369Reset(void) {
-	EXPREGS[0]  = 0x00;
-	EXPREGS[1]  = 0x00;
-	M40IRQa     = 0x00;
-	M40IRQCount = 0x00;
+	mode = 0;
+	smb2_reg = 0;
+	smb2j_enabled = 0;
+	smb2j_count = 0;
+	mmc3_count = mmc3_latch = mmc3_enabled = 0;
 	MMC3RegReset();
 }
 
-static void FP_FASTAPASS(1) M40IRQHook(int a) {
-   if (EXPREGS[0] == 0x13)
-   {
-	  if (M40IRQa)
-	  {
-		 if (M40IRQCount < 4096)
-			M40IRQCount += a;
-		 else
-		 {
-			M40IRQa = 0;
-			X6502_IRQBegin(FCEU_IQEXT);
-		 }
-	  }
-   }
+static void M369Power(void) {
+	mode = 0;
+	smb2_reg = 0;
+	smb2j_enabled = 0;
+	smb2j_count = 0;
+	mmc3_count = mmc3_latch = mmc3_enabled = 0;
+	GenMMC3Power();
+	SetWriteHandler(0x4100, 0x4FFF, M369WriteLo);
+	SetWriteHandler(0x8000, 0xFFFF, M369Write);
 }
 
 void Mapper369_Init(CartInfo *info) {
-	GenMMC3_Init(info, 512, 384, 8, 0);
-	pwrap = M369PW;
-	cwrap = M369CW;
-	MapIRQHook = M40IRQHook;
+	GenMMC3_Init(info, 512, 384, 8, info->battery);
+	pwrap = SyncPRG;
+	cwrap = SyncCHR;
 	info->Power = M369Power;
 	info->Reset = M369Reset;
-	AddExState(EXPREGS, 4, 0, "EXPR");
-	AddExState(&M40IRQa, 1, 0, "M2a");
-	AddExState(&M40IRQCount, 2 | FCEUSTATE_RLSB, 0, "M2CN");
+	MapIRQHook = SMB2JIRQHook;
+	GameHBIRQHook = MMC3IRQHook;
+	AddExState(&StateRegs, ~0, 0, 0);
 }