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@@ -38,12 +38,12 @@ static int is155, is171;
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static DECLFW(MBWRAM) {
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if (!(DRegs[3] & 0x10) || is155)
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Page[A >> 11][A] = V; // WRAM is enabled.
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Page[A >> 11][A] = V; /* WRAM is enabled. */
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}
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static DECLFR(MAWRAM) {
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if ((DRegs[3] & 0x10) && !is155)
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return X.DB; // WRAM is disabled
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return X.DB; /* WRAM is disabled */
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return(Page[A >> 11][A]);
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}
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@@ -131,7 +131,7 @@ static DECLFW(MMC1_write) {
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*/
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if ((timestampbase + timestamp) < (lreset + 2))
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return;
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// FCEU_printf("Write %04x:%02x\n",A,V);
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/* FCEU_printf("Write %04x:%02x\n",A,V); */
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if (V & 0x80) {
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DRegs[0] |= 0xC;
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BufferShift = Buffer = 0;
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@@ -143,7 +143,7 @@ static DECLFW(MMC1_write) {
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Buffer |= (V & 1) << (BufferShift++);
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if (BufferShift == 5) {
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// FCEU_printf("REG[%d]=%02x\n",n,Buffer);
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/* FCEU_printf("REG[%d]=%02x\n",n,Buffer); */
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DRegs[n] = Buffer;
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BufferShift = Buffer = 0;
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switch (n) {
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@@ -159,7 +159,7 @@ static void MMC1_Restore(int version) {
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MMC1MIRROR();
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MMC1CHR();
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MMC1PRG();
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lreset = 0; // timestamp(base) is not stored in save states.
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lreset = 0; /* timestamp(base) is not stored in save states. */
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}
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static void MMC1CMReset(void) {
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@@ -171,7 +171,7 @@ static void MMC1CMReset(void) {
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DRegs[0] = 0x1F;
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DRegs[1] = 0;
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DRegs[2] = 0; // Should this be something other than 0?
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DRegs[2] = 0; /* Should this be something other than 0? */
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DRegs[3] = 0;
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MMC1MIRROR();
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@@ -214,7 +214,7 @@ static void NWCIRQHook(int a) {
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}
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static void NWCCHRHook(uint32 A, uint8 V) {
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if ((V & 0x10)) { // && !(NWCRec&0x10))
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if ((V & 0x10)) { /* && !(NWCRec&0x10)) */
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NWCIRQCount = 0;
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X6502_IRQEnd(FCEU_IQEXT);
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}
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