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@@ -36,26 +36,27 @@ static SFORMAT StateRegs[] =
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};
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static void Sync(void) {
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setprg4(0x5000, 8 << 1); // Only YS-612 advanced version
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setprg4(0x5000, 8 << 1); /* Only YS-612 advanced version */
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setprg8(0x6000, swap?0:2);
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setprg8(0x8000, 1);
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setprg8(0xa000, 0);
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setprg8(0xc000, reg);
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setprg8(0xe000, swap?8:9); // hard dump for mr.Mary is 128K,
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// bank 9 is the last 2K ok bank 8 repeated 4 times, then till the end of 128K
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// instead used bank A, containing some CHR data, ines rom have unused banks removed,
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// and bank A moved to the bank 9 place for compatibility with other crappy dumps
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setprg8(0xe000, swap?8:9); /* hard dump for mr.Mary is 128K,
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* bank 9 is the last 2K ok bank 8 repeated 4 times, then till the end of 128K
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* instead used bank A, containing some CHR data, ines rom have unused banks removed,
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* and bank A moved to the bank 9 place for compatibility with other crappy dumps
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*/
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setchr8(0);
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}
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static DECLFW(M43Write) {
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// int transo[8]={4,3,4,4,4,7,5,6};
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int transo[8] = { 4, 3, 5, 3, 6, 3, 7, 3 }; // According to hardware tests
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/* int transo[8]={4,3,4,4,4,7,5,6}; */
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int transo[8] = { 4, 3, 5, 3, 6, 3, 7, 3 }; /* According to hardware tests */
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switch (A & 0xf1ff) {
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case 0x4022: reg = transo[V & 7]; Sync(); break;
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case 0x4120: swap = V & 1; Sync(); break;
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case 0x8122: // hacked version
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case 0x4122: IRQa = V & 1; X6502_IRQEnd(FCEU_IQEXT); IRQCount = 0; break; // original version
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case 0x8122: /* hacked version */
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case 0x4122: IRQa = V & 1; X6502_IRQEnd(FCEU_IQEXT); IRQCount = 0; break; /* original version */
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}
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}
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