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Mapper 448: Rewrote to use modular VRC2/4 emulation.

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This commit is contained in:
NewRisingSun
2025-04-10 01:01:58 +02:00
committed by LibretroAdmin
parent f89f4c9b70
commit dd13231a8f
2 changed files with 38 additions and 122 deletions
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2
src/boards/447.c
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@@ -26,7 +26,7 @@ static uint8 dip;
static SFORMAT Mapper447_stateRegs[] ={ static SFORMAT Mapper447_stateRegs[] ={
{ &reg, 1, "EXP0" }, { &reg, 1, "EXP0" },
{ &reg, 1, "DIPS" }, { &dip, 1, "DIPS" },
{ 0 } { 0 }
}; };

158
src/boards/448.c
View File

@@ -1,7 +1,7 @@
/* FCE Ultra - NES/Famicom Emulator /* FCE Ultra - NES/Famicom Emulator
* *
* Copyright notice for this file: * Copyright notice for this file:
* Copyright (C) 2023 * Copyright (C) 2025 NewRisingSun
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -18,144 +18,60 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
/* NES 2.0 Mapper 448
* VRC4-based 830768C multicart circuit board used by a Super 6-in-1 multicart.
*/
#include "mapinc.h" #include "mapinc.h"
#include "latch.h" #include "vrc2and4.h"
static uint8 reg; static uint8 reg;
static uint8 vrc4Prg;
static uint8 vrc4Mirr;
static uint8 vrc4Misc;
static uint8 vrc4IRQLatch;
static uint8 vrc4IRQa;
static uint8 vrc4IRQCount;
static int16 vrc4IRQCycles;
static SFORMAT StateRegs[] = { static SFORMAT Mapper448_stateRegs[] ={
{ &reg, 1, "REGS" }, { &reg, 1, "EXP0" },
{ &vrc4Prg, 1, "PREG" }, { 0 }
{ &vrc4Mirr, 1, "V4MI" },
{ &vrc4Misc, 1, "V4MS" },
{ &vrc4IRQLatch, 1, "VILA" },
{ &vrc4IRQa, 1, "VIMO" },
{ &vrc4IRQCount, 1, "VICO" },
{ &vrc4IRQCycles, 2, "VICY" },
{ 0 },
}; };
static void Sync(void) { static void sync () {
setchr8(0); if (reg &8) { /* AOROM */
if (reg & 0x08) { /* AOROM */ setprg32(0x8000, VRC24_prg[0] &0x07 | reg <<2 &~0x07);
setprg32(0x8000, ((reg << 2) & ~0x07) | (latch.data & 0x07)); setmirror(VRC24_prg[0] &0x10? MI_1: MI_0);
setmirror(MI_0 + ((latch.data >> 4) & 0x01));
} else { } else {
if (reg & 0x04) { /* UOROM */ if (reg &4) { /* UOROM */
setprg16(0x8000, ((reg << 3) & ~0x0F) | (vrc4Prg & 0x0F)); setprg16(0x8000, VRC24_prg[0] &0xF | reg <<3 &~0xF);
setprg16(0xC000, ((reg << 3) & ~0x0F) | 0x0F); setprg16(0xC000, 0xF | reg <<3 &~0xF);
} else { /* UNROM */ } else { /* UNROM */
setprg16(0x8000, (reg << 3) | (vrc4Prg & 0x07)); setprg16(0x8000, VRC24_prg[0] &0x7 | reg <<3 &~0x7);
setprg16(0xC000, (reg << 3) | 0x07); setprg16(0xC000, 0x7 | reg <<3 &~0x7);
}
switch (vrc4Mirr & 0x03) {
case 0: setmirror(MI_V); break;
case 1: setmirror(MI_H); break;
case 2: setmirror(MI_0); break;
case 3: setmirror(MI_1); break;
} }
VRC24_syncMirror();
} }
setchr8(0);
} }
static DECLFW(writeVRC4) { DECLFW(Mapper448_writeReg) {
if (A < 0x9000) { if (VRC24_misc &1) {
vrc4Prg = V; reg =A &0xFF;
Sync(); VRC24_Sync();
} else {
switch (A & 0xF000 | ((A >> 2) & 3)) {
case 0x9000:
vrc4Mirr = V;
Sync();
break;
case 0x9002:
vrc4Misc = V;
break;
case 0xF000:
vrc4IRQLatch = (vrc4IRQLatch & 0xF0) | (V & 0x0F);
break;
case 0xF001:
vrc4IRQLatch = (vrc4IRQLatch & 0x0F) | (V << 4);
break;
case 0xF002:
vrc4IRQa = V;
if (vrc4IRQa & 0x02) {
vrc4IRQCount = vrc4IRQLatch;
vrc4IRQCycles = 341;
}
X6502_IRQEnd(FCEU_IQEXT);
break;
case 0xF003:
vrc4IRQa = (vrc4IRQa & ~0x02) | ((vrc4IRQa << 1) & 0x02);
X6502_IRQEnd(FCEU_IQEXT);
break;
}
} }
CartBW(A, V);
} }
static DECLFW(M448WriteReg) { DECLFW(Mapper448_writePRG) {
if (vrc4Misc & 1) { VRC24_writeReg(reg &8? 0x8000: A, V);
reg = A & 0xFF;
Sync();
}
} }
static DECLFW(M448Write) { void Mapper448_power(void) {
LatchWrite(A, V); reg =0;
writeVRC4(A, V); VRC24_power();
SetWriteHandler(0x8000, 0xFFFF, Mapper448_writePRG);
} }
static void FP_FASTAPASS(1) M448CPUHook(int a) { void Mapper448_reset(void) {
int count = a; reg =0;
while (count--) { VRC24_Sync();
if ((vrc4IRQa & 0x02) && ((vrc4IRQa & 0x04) || ((vrc4IRQCycles -= 3) <= 0))) { }
if (~vrc4IRQa & 0x04) {
vrc4IRQCycles += 341;
}
if (!++vrc4IRQCount) {
vrc4IRQCount = vrc4IRQLatch;
X6502_IRQBegin(FCEU_IQEXT);
}
}
}
}
static void M448Reset(void) { void Mapper448_Init (CartInfo *info) {
reg = 0; VRC24_init(info, sync, 0x04, 0x08, 1, 0, 2);
Sync(); VRC24_WRAMWrite =Mapper448_writeReg;
} info->Power =Mapper448_power;
info->Reset =Mapper448_reset;
static void M448Power(void) { AddExState(Mapper448_stateRegs, ~0, 0, 0);
reg = 0;
vrc4Prg = 0;
vrc4Mirr = vrc4Misc = 0;
vrc4IRQLatch = vrc4IRQa = vrc4IRQCount = vrc4IRQCycles = 0;
LatchPower();
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, M448WriteReg);
SetWriteHandler(0x8000, 0xFFFF, M448Write);
}
static void StateRestore(int version) {
Sync();
}
void Mapper448_Init(CartInfo *info) {
Latch_Init(info, Sync, NULL, 0, 0);
info->Reset = M448Reset;
info->Power = M448Power;
MapIRQHook = M448CPUHook;
GameStateRestore = StateRestore;
AddExState(StateRegs, ~0, 0, 0);
} }