This commit is contained in:
negativeExponent
2020-03-17 10:35:56 +08:00
parent 5dc540dd5c
commit d50f2e26e6

View File

@@ -71,8 +71,6 @@ static SFORMAT StateRegs[] = {
static void cwrap(uint16 A, uint16 V) static void cwrap(uint16 A, uint16 V)
{ {
uint8 bank = 0;
/* some workaround for chr rom / ram access */ /* some workaround for chr rom / ram access */
if (!UNIFchrrama && !CHRRAMSIZE) if (!UNIFchrrama && !CHRRAMSIZE)
fk23_regs[0] &= ~0x20; /* chr rom with no chr ram always write to bank 0 */ fk23_regs[0] &= ~0x20; /* chr rom with no chr ram always write to bank 0 */
@@ -81,16 +79,14 @@ static void cwrap(uint16 A, uint16 V)
if (UNIFchrrama && WRAM_EXTENDED && (mmc3_wram & 0x04)) if (UNIFchrrama && WRAM_EXTENDED && (mmc3_wram & 0x04))
fk23_regs[0] &= ~0x20; fk23_regs[0] &= ~0x20;
bank = (fk23_regs[0] & 0x20) ? 0x10 : 0; setchr1r((fk23_regs[0] & 0x20) >> 1, A, V);
setchr1r(bank, A, V);
} }
static void SyncCHR(void) static void SyncCHR(void)
{ {
if (CHR_CNROM_MODE) if (CHR_CNROM_MODE)
{ {
uint8 cnrom_mode = fk23_regs[3] & 0x46; uint8 mask = (fk23_regs[3] & 0x46) ? (CHR_OUTER_BANK_SIZE ? 0x01 : 0x03) : 0;
uint8 mask = cnrom_mode ? (CHR_OUTER_BANK_SIZE ? 0x01 : 0x03) : 0;
uint16 bank = (fk23_regs[2] | (cnrom_chr & mask)) << 3; uint16 bank = (fk23_regs[2] | (cnrom_chr & mask)) << 3;
cwrap(0x0000, bank); cwrap(0x0000, bank);
@@ -109,11 +105,11 @@ static void SyncCHR(void)
if (MMC3_EXTENDED) if (MMC3_EXTENDED)
{ {
uint16 outer = fk23_regs[2] << 3; uint16 outer = fk23_regs[2] << 3;
cwrap(cbase ^ 0x0000, mmc3_regs[0] | outer); cwrap(cbase ^ 0x0000, mmc3_regs[0] | outer);
cwrap(cbase ^ 0x0400, mmc3_regs[10] | outer); cwrap(cbase ^ 0x0400, mmc3_regs[10] | outer);
cwrap(cbase ^ 0x0800, mmc3_regs[1] | outer); cwrap(cbase ^ 0x0800, mmc3_regs[1] | outer);
cwrap(cbase ^ 0x0c00, mmc3_regs[11] | outer); cwrap(cbase ^ 0x0c00, mmc3_regs[11] | outer);
cwrap(cbase ^ 0x1000, mmc3_regs[2] | outer); cwrap(cbase ^ 0x1000, mmc3_regs[2] | outer);
@@ -142,7 +138,9 @@ static void SyncCHR(void)
static void SyncPRG(void) static void SyncPRG(void)
{ {
uint8 prg_mode = fk23_regs[0] & 7; uint8 prg_mode = fk23_regs[0] & 7;
uint16 prg_base = (fk23_regs[1] & 0x07F) | ((fk23_regs[0] << 4) & 0x080) | ((fk23_regs[0] << 1) & 0x100) | ((fk23_regs[2] << 3) & 0x600) | ((fk23_regs[2] << 6) & 0x800); uint16 prg_base = (fk23_regs[1] & 0x07F) | ((fk23_regs[0] << 4) & 0x080) |
((fk23_regs[0] << 1) & 0x100) | ((fk23_regs[2] << 3) & 0x600) |
((fk23_regs[2] << 6) & 0x800);
switch (prg_mode) switch (prg_mode)
{ {
@@ -158,8 +156,8 @@ static void SyncPRG(void)
case 2: case 2:
if (MMC3_EXTENDED) if (MMC3_EXTENDED)
{ {
uint16 cbase = INVERT_PRG ? 0x4000 : 0; uint16 cbase = INVERT_PRG ? 0x4000 : 0;
uint16 outer = prg_base << 1; uint16 outer = prg_base << 1;
setprg8(0x8000 ^ cbase, mmc3_regs[6] | outer); setprg8(0x8000 ^ cbase, mmc3_regs[6] | outer);
setprg8(0xA000, mmc3_regs[7] | outer); setprg8(0xA000, mmc3_regs[7] | outer);