From be35d352ac2523c38e0f59d00f3af513c97c4b58 Mon Sep 17 00:00:00 2001 From: NewRisingSun <8vytz1+dhp372pv94ebg@sharklasers.com> Date: Tue, 1 Apr 2025 14:45:39 +0200 Subject: [PATCH] Added mapper 487. --- src/boards/487.c | 88 ++++++++++++++++++++++++++++++++++++++++++++++++ src/ines.c | 1 + src/ines.h | 1 + 3 files changed, 90 insertions(+) create mode 100644 src/boards/487.c diff --git a/src/boards/487.c b/src/boards/487.c new file mode 100644 index 0000000..ca056f3 --- /dev/null +++ b/src/boards/487.c @@ -0,0 +1,88 @@ +/* FCE Ultra - NES/Famicom Emulator + * + * Copyright notice for this file: 2025 NewRisingSun + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + * + * + */ + +#include "mapinc.h" + +static uint8 reg[2]; + +static SFORMAT StateRegs[] ={ + { reg, 2, "REGS" }, + { 0 } +}; + +static void Sync(void) { + int prg =(reg[1] &0x40? (reg[0] >>3 &1): (reg[1] &0x01)) | + reg[1] &0x3E; + int chr = reg[0] &0x03 | + (reg[1] &0x40? (reg[0] &0x04): (reg[1] <<2 &4)) | + reg[1] <<2 &0xF8; + if (prg &0x30) prg -=0x10; /* The register layout assumes a 2 MiB address space. The first ROM chip is only 512 KiB though, and the .NES file is not padded or repeated to fill those 2 MiB. */ + if (chr &0xC0) chr -=0x40; /* Therefore, subtract 512 KiB from the PRG and CHR outer bank if anything after the first 512 KiB is selected. */ + setprg32(0x8000, prg); + setchr8(chr); + setmirror(reg[1] &0x80? MI_H: MI_V); +} + +static DECLFW(WriteNINA) { + if (A &0x100) { + if (A &0x080) /* Second register is always writable */ + reg[1] =V; + else + if (~reg[1] &0x20) /* First register is only writable in NINA-03 mode */ + reg[0] =V; + Sync(); + } + Sync(); +} + +static DECLFW(WriteColorDreams) { + if (reg[1] &0x20) { /* Only writable in Color Dreams mode. Translate to NINA-03 register arrangement */ + reg[0] =V <<3 &8 | V >>4 &7; + Sync(); + } +} + +static void Power(void) { + reg[0] = 0; + reg[1] = 0; + Sync(); + SetWriteHandler(0x8000, 0xFFFF, WriteColorDreams); + SetWriteHandler(0x4100, 0x7FFF, WriteNINA); + SetReadHandler(0x8000, 0xFFFF, CartBR); +} + +static void StateRestore(int version) { + Sync(); +} + +static void Reset(void) { + reg[0] = 0; + reg[1] = 0; + Sync(); +} + +void Mapper487_Init(CartInfo *info) { + info->Power = Power; + info->Reset = Reset; + AddExState(&StateRegs, ~0, 0, 0); + GameStateRestore = StateRestore; +} + diff --git a/src/ines.c b/src/ines.c index 4e5b287..54839c8 100644 --- a/src/ines.c +++ b/src/ines.c @@ -847,6 +847,7 @@ INES_BOARD_BEGIN() INES_BOARD( "BlazePro CPLD", 468, Mapper468_Init ) INES_BOARD( "INX_007T_V01", 470, INX_007T_Init ) INES_BOARD( "045N", 481, Mapper481_Init ) + INES_BOARD( "AVE NINA-08", 487, Mapper487_Init ) INES_BOARD( "Yhc-000", 500, Mapper500_Init ) INES_BOARD( "Yhc-001", 501, Mapper501_Init ) INES_BOARD( "Yhc-002", 502, Mapper502_Init ) diff --git a/src/ines.h b/src/ines.h index 6f75f1d..6c4754f 100644 --- a/src/ines.h +++ b/src/ines.h @@ -358,6 +358,7 @@ void Mapper467_Init(CartInfo *); void Mapper468_Init(CartInfo *); void INX_007T_Init(CartInfo* info); /* Mapper 470 */ void Mapper481_Init(CartInfo *); +void Mapper487_Init(CartInfo *); void Mapper500_Init(CartInfo *); void Mapper501_Init(CartInfo *); void Mapper502_Init(CartInfo *);