Add mapper 551
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@@ -19,6 +19,9 @@
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*
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*
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* DSOUNDV1/FL-TR8MA boards (32K WRAM, 8/16M), 178 mapper boards (8K WRAM, 4/8M)
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* DSOUNDV1/FL-TR8MA boards (32K WRAM, 8/16M), 178 mapper boards (8K WRAM, 4/8M)
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* Various Education Cartridges
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* Various Education Cartridges
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*
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* mapper 551
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* Compared to INES Mapper 178, mirroring is hard-wired, and the chipset's internal CHR-RAM is not used in favor of CHR-ROM.
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*
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*
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*/
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*/
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@@ -76,7 +79,7 @@ static uint8 decode(uint8 code) {
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return (acc >> 8) & 0xff;
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return (acc >> 8) & 0xff;
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}
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}
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static void Sync(void) {
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static void M178Sync(void) {
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uint32 sbank = reg[1] & 0x7;
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uint32 sbank = reg[1] & 0x7;
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uint32 bbank = reg[2];
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uint32 bbank = reg[2];
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setchr8(0);
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setchr8(0);
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@@ -95,37 +98,76 @@ static void Sync(void) {
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} else
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} else
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setprg32(0x8000, bank >> 1);
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setprg32(0x8000, bank >> 1);
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}
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}
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setmirror((reg[0] & 1) ^ 1);
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setmirror((reg[0] & 1) ^ 1);
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}
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}
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static void M551Sync(void) {
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uint32 sbank = reg[1] & 0x7;
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uint32 bbank = reg[2];
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if (reg[0] & 2) { /* UNROM mode */
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setprg16(0x8000, (bbank << 3) | sbank);
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if (reg[0] & 4)
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setprg16(0xC000, (bbank << 3) | 6 | (reg[1] & 1));
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else
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setprg16(0xC000, (bbank << 3) | 7);
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} else { /* NROM mode */
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uint32 bank = (bbank << 3) | sbank;
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if (reg[0] & 4) {
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setprg16(0x8000, bank);
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setprg16(0xC000, bank);
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} else
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setprg32(0x8000, bank >> 1);
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}
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setprg8r(0x10, 0x6000, 0);
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setchr8(reg[3]);
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setmirror(head.ROM_type & 1);
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}
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static DECLFW(M551Write) {
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reg[A & 3] = V;
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M551Sync();
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}
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static DECLFW(M178Write) {
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static DECLFW(M178Write) {
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reg[A & 3] = V;
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reg[A & 3] = V;
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/* FCEU_printf("cmd %04x:%02x\n", A, V); */
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M178Sync();
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Sync();
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}
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}
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static DECLFW(M178WriteSnd) {
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static DECLFW(M178WriteSnd) {
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if (A == 0x5800) {
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if (A == 0x5800)
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{
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if (V & 0xF0) {
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if (V & 0xF0) {
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pcm_enable = 1;
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pcm_enable = 1;
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/* pcmwrite(0x4011, (V & 0xF) << 3); */
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pcmwrite(0x4011, decode(V & 0xf));
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pcmwrite(0x4011, decode(V & 0xf));
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} else
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} else
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pcm_enable = 0;
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pcm_enable = 0;
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} else
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}
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FCEU_printf("misc %04x:%02x\n", A, V);
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}
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}
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static DECLFR(M178ReadSnd) {
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static DECLFR(M178ReadSnd) {
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if (A == 0x5800)
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if (A == 0x5800)
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return (X.DB & 0xBF) | ((pcm_enable ^ 1) << 6);
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return (X.DB & 0xBF) | ((pcm_enable ^ 1) << 6);
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else
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return X.DB;
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return X.DB;
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}
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static void M551Power(void) {
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reg[0] = reg[1] = reg[2] = reg[3] = 0;
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M551Sync();
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pcmwrite = GetWriteHandler(0x4011);
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SetWriteHandler(0x4800, 0x4fff, M551Write);
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SetWriteHandler(0x5800, 0x5fff, M178WriteSnd);
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SetReadHandler(0x5800, 0x5fff, M178ReadSnd);
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SetReadHandler(0x6000, 0x7fff, CartBR);
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SetWriteHandler(0x6000, 0x7fff, CartBW);
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SetReadHandler(0x8000, 0xffff, CartBR);
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FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
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}
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}
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static void M178Power(void) {
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static void M178Power(void) {
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reg[0] = reg[1] = reg[2] = reg[3] = 0;
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reg[0] = reg[1] = reg[2] = reg[3] = 0;
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Sync();
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M178Sync();
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pcmwrite = GetWriteHandler(0x4011);
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pcmwrite = GetWriteHandler(0x4011);
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SetWriteHandler(0x4800, 0x4fff, M178Write);
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SetWriteHandler(0x4800, 0x4fff, M178Write);
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SetWriteHandler(0x5800, 0x5fff, M178WriteSnd);
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SetWriteHandler(0x5800, 0x5fff, M178WriteSnd);
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@@ -136,12 +178,21 @@ static void M178Power(void) {
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FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
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FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
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}
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}
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static void M178Reset(void) {
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static void M551Reset(void) {
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/* Always reset to menu */
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/* Always reset to menu */
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reg[0] = reg[1] = reg[2] = reg[3] = 0;
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reg[0] = reg[1] = reg[2] = reg[3] = 0;
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Sync();
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M551Sync();
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}
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}
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static void M178SndClk(int a) {
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static void M178Reset(void)
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{
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/* Always reset to menu */
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reg[0] = reg[1] = reg[2] = reg[3] = 0;
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M178Sync();
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}
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static void M178SndClk(int a)
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{
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if (pcm_enable) {
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if (pcm_enable) {
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pcm_latch -= a;
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pcm_latch -= a;
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if (pcm_latch <= 0) {
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if (pcm_latch <= 0) {
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@@ -157,15 +208,19 @@ static void M178Close(void) {
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WRAM = NULL;
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WRAM = NULL;
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}
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}
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static void StateRestore(int version) {
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static void M551StateRestore(int version) {
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Sync();
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M551Sync();
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}
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static void M178StateRestore(int version) {
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M178Sync();
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}
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}
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void Mapper178_Init(CartInfo *info) {
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void Mapper178_Init(CartInfo *info) {
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info->Power = M178Power;
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info->Power = M178Power;
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info->Reset = M178Reset;
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info->Reset = M178Reset;
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info->Close = M178Close;
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info->Close = M178Close;
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GameStateRestore = StateRestore;
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GameStateRestore = M178StateRestore;
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MapIRQHook = M178SndClk;
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MapIRQHook = M178SndClk;
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jedi_table_init();
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jedi_table_init();
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@@ -180,4 +235,11 @@ void Mapper178_Init(CartInfo *info) {
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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AddExState(&StateRegs, ~0, 0, 0);
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AddExState(&StateRegs, ~0, 0, 0);
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if (info->mapper == 551)
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{
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info->Power = M551Power;
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info->Reset = M551Reset;
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GameStateRestore = M551StateRestore;
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}
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}
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}
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@@ -599,7 +599,7 @@ INES_BOARD_BEGIN()
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INES_BOARD( "", 175, Mapper175_Init )
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INES_BOARD( "", 175, Mapper175_Init )
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INES_BOARD( "BMCFK23C", 176, Mapper176_Init )
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INES_BOARD( "BMCFK23C", 176, Mapper176_Init )
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INES_BOARD( "", 177, Mapper177_Init )
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INES_BOARD( "", 177, Mapper177_Init )
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INES_BOARD( "Waixing FS305", 178, Mapper178_Init )
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INES_BOARD( "FS305/NJ0430", 178, Mapper178_Init )
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/* INES_BOARD( "", 179, Mapper179_Init ) */
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/* INES_BOARD( "", 179, Mapper179_Init ) */
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INES_BOARD( "", 180, Mapper180_Init )
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INES_BOARD( "", 180, Mapper180_Init )
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INES_BOARD( "", 181, Mapper181_Init )
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INES_BOARD( "", 181, Mapper181_Init )
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@@ -867,6 +867,7 @@ INES_BOARD_BEGIN()
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INES_BOARD( "82112C", 540, Mapper540_Init )
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INES_BOARD( "82112C", 540, Mapper540_Init )
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INES_BOARD( "LittleCom 160-in-1", 541, Mapper541_Init )
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INES_BOARD( "LittleCom 160-in-1", 541, Mapper541_Init )
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INES_BOARD( "5-in-1 (CH-501)", 543, Mapper543_Init )
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INES_BOARD( "5-in-1 (CH-501)", 543, Mapper543_Init )
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INES_BOARD( "", 551, Mapper178_Init )
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INES_BOARD( "SACHEN 3013", 553, Mapper553_Init )
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INES_BOARD( "SACHEN 3013", 553, Mapper553_Init )
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INES_BOARD( "KS-7010", 554, Mapper554_Init )
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INES_BOARD( "KS-7010", 554, Mapper554_Init )
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INES_BOARD( "JY-215", 556, Mapper556_Init )
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INES_BOARD( "JY-215", 556, Mapper556_Init )
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