fds_apu: backport MDFN-derived modulator/carrier model (fixes #560)
The previous Xodnizel implementation modeled the FDS modulator unit's output via a bit-serial b8shiftreg88 mechanism but omitted the modulator's sweep-bias accumulator entirely. Real hardware accumulates each modulator output cycle's bias step into a signed 11-bit register; the running total scales the carrier frequency. Without it, music that programs a slowly-developing modulation waveform (e.g. VS. Excitebike's FDS triangle voice) gets a static off-pitch note instead of the intended pitch sweep. Bias-table value fix in2a91d40corrected per-step values used inside the broken model but did not address the structural omission; testing on Vs. Excitebike (Japan) showed essentially zero audible change (race-window RMS vs the MDFN-derived reference moved 8371 -> 8365 on a 50-second capture - within noise). Replace the file wholesale with the MDFN-derived model from libretro/fceumm_next (negativeExponent, itself derived from Mednafen's NES FDS sound), adapted to fceumm's GameExpSound API and existing FDSSoundReset/StateAdd/Power/Write export surface so fds.c does not change. Differences from the _next version: - Uses upstream's openbus (X.DB) for FDS register read top bits instead of the OPENBUS=0x40 constant. - Drops the GetOutput() per-channel volume mixer (no equivalent in upstream). - Keeps FDSSoundReset/FDSSoundStateAdd/FDSSoundPower/FDSSoundWrite signatures unchanged for binary-compat with bootleg/conversion mappers. Validation on Vs. Excitebike (Japan) FDS, side B / ORIGINAL EXCITE, 50-second race-window capture vs the _next reference: - upstream master (2a91d40): RMS=8371 - this patch: RMS=4957 (41% closer) Spectrograms after the patch are visually aligned with the reference; the remaining gap is likely outside the FDS modulator (mixing / NES APU level). Performance: throughput on the same 9000-frame headless capture went 488 fps -> 485 fps (-0.6%, within measurement noise). The new model runs FDSClockUnits per CPU cycle versus the previous file's per-2-CPU clock, but compensates by replacing the master-volume integer divide with a 4-entry LUT and caching the wave sample between index transitions. Savestate compatibility: SFORMAT layout changes (new tags WFRQ/WPOS/ MFRQ/MPOS/SWBS/MCTL etc.; old tags B88/CLOC/B60/B66/B68/B76/SPSG/AMPL are dropped). Pre-existing FDS savestates will lose their audio register snapshot on load and revert to defaults; gameplay state and disk contents are unaffected.
This commit is contained in:
libretroadmin
committed by
U-DESKTOP-SPFP6AQ\twistedtechre
U-DESKTOP-SPFP6AQ\twistedtechre
parent
2a91d40f4d
commit
bc5a7a9fec
553
src/fds_apu.c
553
src/fds_apu.c
@@ -2,6 +2,7 @@
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*
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* Copyright notice for this file:
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* Copyright (C) 2002 Xodnizel
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* Copyright (C) 2023-2026 negativeExponent (MDFN-derived FDS sound)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@@ -18,243 +19,398 @@
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Begin FDS sound */
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/* MDFN-derived modulator/carrier model. Replaces the previous Xodnizel
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* bit-serial b8shiftreg88 implementation; the latter lacked the
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* modulator's sweep-bias accumulator entirely, producing static pitch
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* shifts where games (e.g. VS. Excitebike FDS triangle voice, #560)
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* programmed slowly-developing pitch sweeps. Backported from
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* libretro/fceumm_next/src/mappers/sound/fdssound.c (negativeExponent,
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* itself derived from Mednafen's NES FDS sound). */
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#include <string.h>
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#include "fceu-types.h"
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#include "x6502.h"
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#include "fceu.h"
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#include "sound.h"
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#include "filter.h"
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#include "state.h"
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#include "fds_apu.h"
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#define FDSClock (1789772.7272727272727272 / 2)
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enum { EVOL = 0, EMOD };
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enum {
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ENV_CTRL_INCREASE = 0x40,
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ENV_CTRL_DISABLE = 0x80,
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ENVELOPES_DISABLE = 0x40,
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WAVE_DISABLE = 0x80,
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MOD_WRITE_MODE = 0x80,
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WAVE_WRITE_MODE = 0x80
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};
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enum {
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VOLUME_MIN = 0,
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VOLUME_MAX = 32
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};
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typedef struct {
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int64_t cycles; /* Cycles per PCM sample */
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int64_t count; /* Cycle counter */
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int64_t envcount; /* Envelope cycle counter */
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uint32_t b19shiftreg60;
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uint32_t b24adder66;
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uint32_t b24latch68;
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uint32_t b17latch76;
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int32_t clockcount; /* Counter to divide frequency by 8. */
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uint8_t b8shiftreg88; /* Modulation register. */
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uint8_t amplitude[2]; /* Current amplitudes. */
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uint8_t speedo[2];
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uint8_t mwcount;
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uint8_t mwstart;
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uint8_t mwave[0x20]; /* Modulation waveform */
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uint8_t cwave[0x40]; /* Game-defined waveform(carrier) */
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uint8_t SPSG[0xB];
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uint8_t speed;
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uint8_t volume;
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uint8_t control;
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int32_t counter;
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} FDSENVUNIT;
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typedef struct {
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int64_t cycles;
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int64_t count;
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FDSENVUNIT EnvUnits[2];
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int32_t env_divider;
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uint16_t cwave_freq;
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uint32_t cwave_pos;
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uint8_t cwave_control;
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uint16_t mod_freq;
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uint32_t mod_pos;
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uint8_t mod_disabled;
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uint8_t master_control;
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uint8_t master_env_speed;
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int32_t mwave[0x20];
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uint8_t cwave[0x40];
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uint32_t sweep_bias;
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int32_t mod_output;
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int32_t sample_out_cache;
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uint8_t cwave_pos_shift;
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uint8_t env_count_mul;
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uint8_t mod_pos_shift;
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uint8_t mod_overflow_shift;
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} FDSSOUND;
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static FDSSOUND fdso;
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static const int32_t mod_bias_tab[8] = { 0, 1, 2, 4, 0, -4, -2, -1 };
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#define SPSG fdso.SPSG
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#define b19shiftreg60 fdso.b19shiftreg60
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#define b24adder66 fdso.b24adder66
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#define b24latch68 fdso.b24latch68
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#define b17latch76 fdso.b17latch76
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#define b8shiftreg88 fdso.b8shiftreg88
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#define clockcount fdso.clockcount
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#define amplitude fdso.amplitude
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#define speedo fdso.speedo
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static FDSSOUND fdso;
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static int32_t FBC;
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void FDSSoundStateAdd(void) {
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AddExState(&fdso.sample_out_cache, 4, 1, "FDSO");
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AddExState(&fdso.EnvUnits[EVOL].speed, 1, 0, "SPD0");
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AddExState(&fdso.EnvUnits[EVOL].control, 1, 0, "CTL0");
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AddExState(&fdso.EnvUnits[EVOL].volume, 1, 0, "VOL0");
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AddExState(&fdso.EnvUnits[EVOL].counter, 4, 1, "CNT0");
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AddExState(&fdso.EnvUnits[EMOD].speed, 1, 0, "SPD1");
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AddExState(&fdso.EnvUnits[EMOD].control, 1, 0, "CTL1");
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AddExState(&fdso.EnvUnits[EMOD].volume, 1, 0, "VOL1");
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AddExState(&fdso.EnvUnits[EMOD].counter, 4, 1, "CNT1");
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AddExState(fdso.cwave, 64, 0, "WAVE");
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AddExState(fdso.mwave, 32, 0, "MWAV");
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AddExState(amplitude, 2, 0, "AMPL");
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AddExState(SPSG, 0xB, 0, "SPSG");
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AddExState(fdso.mwave, 32 * 4, 1, "MWAV");
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AddExState(&b8shiftreg88, 1, 0, "B88");
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AddExState(&fdso.cwave_freq, 2, 1, "WFRQ");
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AddExState(&fdso.cwave_pos, 4, 1, "WPOS");
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AddExState(&fdso.cwave_control, 1, 0, "WCTL");
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AddExState(&clockcount, 4, 1, "CLOC");
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AddExState(&b19shiftreg60, 4, 1, "B60");
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AddExState(&b24adder66, 4, 1, "B66");
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AddExState(&b24latch68, 4, 1, "B68");
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AddExState(&b17latch76, 4, 1, "B76");
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}
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AddExState(&fdso.mod_freq, 2, 1, "MFRQ");
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AddExState(&fdso.mod_pos, 4, 1, "MPOS");
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AddExState(&fdso.mod_disabled, 1, 0, "MDIS");
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AddExState(&fdso.mod_output, 4, 1, "MCRM");
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static DECLFR(FDSSRead) {
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switch (A & 0xF) {
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case 0x0: return(amplitude[0] | (X.DB & 0xC0));
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case 0x2: return(amplitude[1] | (X.DB & 0xC0));
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}
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return(X.DB);
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AddExState(&fdso.sweep_bias, 4, 1, "SWBS");
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AddExState(&fdso.master_control, 1, 0, "MCTL");
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AddExState(&fdso.master_env_speed, 1, 0, "MSPD");
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AddExState(&fdso.env_divider, 4, 1, "EDIV");
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AddExState(&fdso.cwave_pos_shift, 1, 0, "CWPS");
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AddExState(&fdso.env_count_mul, 1, 0, "ECNM");
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AddExState(&fdso.mod_pos_shift, 1, 0, "MPSH");
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AddExState(&fdso.mod_overflow_shift, 1, 0, "MOFS");
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}
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static void RenderSound(void);
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static void RenderSoundHQ(void);
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static DECLFW(FDSSWrite) {
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static void FDSSoundUpdate(void) {
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if (FSettings.SndRate) {
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if (FSettings.soundq >= 1)
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RenderSoundHQ();
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else
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RenderSound();
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}
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A -= 0x4080;
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switch (A) {
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case 0x0:
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case 0x4:
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if (V & 0x80)
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amplitude[(A & 0xF) >> 2] = V & 0x3F;
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break;
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case 0x7:
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b17latch76 = 0;
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SPSG[0x5] = 0;
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break;
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case 0x8:
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b17latch76 = 0;
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fdso.mwave[SPSG[0x5] & 0x1F] = V & 0x7;
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SPSG[0x5] = (SPSG[0x5] + 1) & 0x1F;
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break;
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}
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SPSG[A] = V;
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}
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/* $4080 - Fundamental wave amplitude data register 92
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* $4082 - Fundamental wave frequency data register 58
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* $4083 - Same as $4082($4083 is the upper 4 bits).
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*
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* $4084 - Modulation amplitude data register 78
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* $4086 - Modulation frequency data register 72
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* $4087 - Same as $4086($4087 is the upper 4 bits)
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*/
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static void DoEnv() {
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int x;
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for (x = 0; x < 2; x++)
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if (!(SPSG[x << 2] & 0x80) && !(SPSG[0x3] & 0x40)) {
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static int counto[2] = { 0, 0 };
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if (counto[x] <= 0) {
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if (!(SPSG[x << 2] & 0x80)) {
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if (SPSG[x << 2] & 0x40) {
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if (amplitude[x] < 0x3F)
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amplitude[x]++;
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} else {
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if (amplitude[x] > 0)
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amplitude[x]--;
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}
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}
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counto[x] = (SPSG[x << 2] & 0x3F);
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} else
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counto[x]--;
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}
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}
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static DECLFR(FDSWaveRead) {
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return(fdso.cwave[A & 0x3f] | (X.DB & 0xC0));
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if (fdso.master_control & WAVE_WRITE_MODE)
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return (fdso.cwave[A & 0x3F] | (X.DB & 0xC0));
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return (fdso.cwave[(fdso.cwave_pos >> 21) & 0x3F] | (X.DB & 0xC0));
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}
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static DECLFW(FDSWaveWrite) {
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if (SPSG[0x9] & 0x80)
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fdso.cwave[A & 0x3f] = V & 0x3F;
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if (fdso.master_control & WAVE_WRITE_MODE)
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fdso.cwave[A & 0x3F] = V & 0x3F;
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}
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static int ta;
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static INLINE void ClockRise(void) {
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if (!clockcount) {
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ta++;
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static DECLFW(FDSSReg0Write) {
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FDSSoundUpdate();
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b19shiftreg60 = (SPSG[0x2] | ((SPSG[0x3] & 0xF) << 8));
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b17latch76 = (SPSG[0x6] | ((SPSG[0x07] & 0xF) << 8)) + b17latch76;
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fdso.EnvUnits[EVOL].speed = V & 0x3F;
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fdso.EnvUnits[EVOL].control = V & 0xC0;
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fdso.EnvUnits[EVOL].counter = fdso.EnvUnits[EVOL].speed + 1;
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if (!(SPSG[0x7] & 0x80)) {
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int t = fdso.mwave[(b17latch76 >> 13) & 0x1F] & 7;
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int t2 = amplitude[1];
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int adj;
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/* Per-step bias the modulator unit applies for each
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* 3-bit mod table entry. Real hardware uses powers of
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* 2 ({-4,-2,-1,0,+1,+2,+4} + RESET); the conditional
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* form previously here computed { +/- (4 - (t & 3)) }
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* for the negate cases and { +/- (t & 3) } for the
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* positive cases, yielding ±3 instead of ±4 at table
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* positions 3 and 5. Documented at nesdev wiki
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* "FDS audio" / Modulator unit; same table is used in
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* MDFN/NSFPlay and negativeExponent's fceumm_next. */
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static const int8_t mod_bias_tab[8] = {
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0, 1, 2, 4,
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0, -4, -2, -1
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};
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adj = t2 * mod_bias_tab[t];
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adj *= 2;
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if (adj > 0x7F) adj = 0x7F;
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if (adj < -0x80) adj = -0x80;
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b8shiftreg88 = 0x80 + adj;
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} else {
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b8shiftreg88 = 0x80;
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if (fdso.EnvUnits[EVOL].control & ENV_CTRL_DISABLE)
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fdso.EnvUnits[EVOL].volume = fdso.EnvUnits[EVOL].speed;
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}
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static DECLFW(FDSSReg1Write) {
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FDSSoundUpdate();
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fdso.cwave_freq &= 0x0F00;
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fdso.cwave_freq |= V;
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}
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static DECLFW(FDSSReg2Write) {
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FDSSoundUpdate();
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fdso.cwave_freq &= 0x00FF;
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fdso.cwave_freq |= (V & 0x0F) << 8;
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fdso.cwave_control = V & 0xC0;
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if (fdso.cwave_control & WAVE_DISABLE)
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fdso.cwave_pos = 0;
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}
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static DECLFW(FDSSReg3Write) {
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FDSSoundUpdate();
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fdso.EnvUnits[EMOD].speed = V & 0x3F;
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fdso.EnvUnits[EMOD].control = V & 0xC0;
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fdso.EnvUnits[EMOD].counter = fdso.EnvUnits[EMOD].speed + 1;
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if (fdso.EnvUnits[EMOD].control & ENV_CTRL_DISABLE)
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fdso.EnvUnits[EMOD].volume = fdso.EnvUnits[EMOD].speed;
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}
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static DECLFW(FDSSReg4Write) {
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FDSSoundUpdate();
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fdso.sweep_bias = (V & 0x7F) << 4;
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fdso.mod_pos = 0;
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}
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static DECLFW(FDSSReg5Write) {
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FDSSoundUpdate();
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fdso.mod_freq &= 0x0F00;
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fdso.mod_freq |= V;
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}
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static DECLFW(FDSSReg6Write) {
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FDSSoundUpdate();
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fdso.mod_freq &= 0x00FF;
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fdso.mod_freq |= (V & 0x0F) << 8;
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fdso.mod_disabled = (V & MOD_WRITE_MODE) != 0;
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if (fdso.mod_disabled)
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fdso.mod_pos = 0;
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}
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static DECLFW(FDSSReg7Write) {
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FDSSoundUpdate();
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if (fdso.mod_disabled) {
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int i;
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for (i = 0; i < 31; i++)
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fdso.mwave[i] = fdso.mwave[i + 1];
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fdso.mwave[0x1F] = mod_bias_tab[V & 0x07];
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if ((V & 0x07) == 0x04)
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fdso.mwave[0x1F] = 0x10;
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}
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}
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static DECLFW(FDSSReg8Write) {
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FDSSoundUpdate();
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fdso.master_control = V;
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}
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static DECLFW(FDSSReg9Write) {
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FDSSoundUpdate();
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fdso.master_env_speed = V;
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}
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static DECLFR(FDSEnvVolumeRead) {
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FDSSoundUpdate();
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return (fdso.EnvUnits[EVOL].volume | (X.DB & 0xC0));
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}
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static DECLFR(FDSEnvModRead) {
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FDSSoundUpdate();
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return (fdso.EnvUnits[EMOD].volume | (X.DB & 0xC0));
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}
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static INLINE void FDSEnvStep(FDSENVUNIT *e) {
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if (!(e->control & ENV_CTRL_DISABLE)) {
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e->counter--;
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if (e->counter <= 0) {
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e->counter = e->speed + 1;
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if (e->control & ENV_CTRL_INCREASE) {
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if (e->volume < VOLUME_MAX) e->volume++;
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} else {
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b19shiftreg60 <<= 1;
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b8shiftreg88 >>= 1;
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if (e->volume > VOLUME_MIN) e->volume--;
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}
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}
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}
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b24adder66 = (b24latch68 + b19shiftreg60) & 0x1FFFFFF;
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}
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static INLINE void ClockFall(void) {
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if ((b8shiftreg88 & 1))
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b24latch68 = b24adder66;
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clockcount = (clockcount + 1) & 7;
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static void FDSDoEnv(void) {
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FDSEnvStep(&fdso.EnvUnits[EVOL]);
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FDSEnvStep(&fdso.EnvUnits[EMOD]);
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||||
}
|
||||
|
||||
static INLINE int32_t FDSDoSound(void) {
|
||||
static INLINE int32_t sign_x_to_s32(int n, int32_t v) {
|
||||
return ((int32_t)((uint32_t)v << (32 - n)) >> (32 - n));
|
||||
}
|
||||
|
||||
static void FDSModUpdateOutput(void) {
|
||||
int32_t mod_amp = (fdso.EnvUnits[EMOD].volume > 0x20)
|
||||
? 0x20 : fdso.EnvUnits[EMOD].volume;
|
||||
int32_t temp = sign_x_to_s32(11, fdso.sweep_bias) * mod_amp;
|
||||
|
||||
if (temp & 0x0F0) {
|
||||
temp /= 256;
|
||||
if (fdso.sweep_bias & 0x400)
|
||||
temp--;
|
||||
else
|
||||
temp += 2;
|
||||
} else {
|
||||
temp /= 256;
|
||||
}
|
||||
|
||||
if (temp >= 194) temp -= 258;
|
||||
if (temp < -64) temp += 256;
|
||||
|
||||
fdso.mod_output = temp;
|
||||
}
|
||||
|
||||
static int FDSDoModulator(void) {
|
||||
uint32_t prev_mod_pos = fdso.mod_pos;
|
||||
|
||||
if (!fdso.mod_disabled) {
|
||||
uint32_t overflow_mask = 0x3F << fdso.mod_overflow_shift;
|
||||
fdso.mod_pos += fdso.mod_freq;
|
||||
if ((fdso.mod_pos & overflow_mask) != (prev_mod_pos & overflow_mask)) {
|
||||
const int32_t mw = fdso.mwave[(fdso.mod_pos >> fdso.mod_pos_shift) & 0x1F];
|
||||
fdso.sweep_bias = (fdso.sweep_bias + mw) & 0x7FF;
|
||||
if (mw == 0x10)
|
||||
fdso.sweep_bias = 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static INLINE void FDSDoCarrier(void) {
|
||||
int32_t cur_cwave_freq = (int32_t)(fdso.cwave_freq << 6);
|
||||
|
||||
if (!fdso.mod_disabled) {
|
||||
cur_cwave_freq += (int32_t)fdso.cwave_freq * fdso.mod_output;
|
||||
if (cur_cwave_freq < 0)
|
||||
cur_cwave_freq = 0;
|
||||
}
|
||||
fdso.cwave_pos += cur_cwave_freq;
|
||||
}
|
||||
|
||||
static void FDSClockUnits(void) {
|
||||
if (FDSDoModulator())
|
||||
FDSModUpdateOutput();
|
||||
if (!(fdso.master_control & WAVE_WRITE_MODE) &&
|
||||
!(fdso.cwave_control & WAVE_DISABLE))
|
||||
FDSDoCarrier();
|
||||
if (fdso.master_env_speed) {
|
||||
fdso.env_divider--;
|
||||
if (fdso.env_divider <= 0) {
|
||||
fdso.env_divider += fdso.master_env_speed * fdso.env_count_mul;
|
||||
if (!(fdso.cwave_control & ENVELOPES_DISABLE))
|
||||
FDSDoEnv();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void FDSDoSound(void) {
|
||||
uint32_t prev_cwave_pos = fdso.cwave_pos;
|
||||
|
||||
if (FSettings.soundq >= 1) {
|
||||
FDSClockUnits();
|
||||
} else {
|
||||
fdso.count += fdso.cycles;
|
||||
if (fdso.count >= ((int64_t)1 << 40)) {
|
||||
dogk:
|
||||
fdso.count -= (int64_t)1 << 40;
|
||||
ClockRise();
|
||||
ClockFall();
|
||||
fdso.envcount--;
|
||||
if (fdso.envcount <= 0) {
|
||||
fdso.envcount += SPSG[0xA] * 3;
|
||||
DoEnv();
|
||||
FDSClockUnits();
|
||||
}
|
||||
while (fdso.count >= 32768) {
|
||||
fdso.count -= (int64_t)1 << 40;
|
||||
FDSClockUnits();
|
||||
}
|
||||
}
|
||||
if (fdso.count >= 32768) goto dogk;
|
||||
|
||||
/* Might need to emulate applying the amplitude to the waveform a bit better... */
|
||||
{
|
||||
int k = amplitude[0];
|
||||
if ((fdso.cwave_pos ^ prev_cwave_pos) & (1U << fdso.cwave_pos_shift)) {
|
||||
/* Master-volume divisor LUT: replaces an integer divide
|
||||
* with a multiply + shift. Indices match $4089 bits 0-1:
|
||||
* 0 -> div 2, 1 -> div 3, 2 -> div 4, 3 -> div 5. */
|
||||
static const uint32_t fds_div_lut[4] = {
|
||||
(1U << 16) / 2,
|
||||
(1U << 16) / 3,
|
||||
(1U << 16) / 4,
|
||||
(1U << 16) / 5
|
||||
};
|
||||
int32_t k = fdso.EnvUnits[EVOL].volume;
|
||||
int32_t idx = fdso.master_control & 0x03;
|
||||
int32_t sample;
|
||||
|
||||
if (k > 0x20) k = 0x20;
|
||||
return (fdso.cwave[b24latch68 >> 19] * k) * 4 / ((SPSG[0x9] & 0x3) + 2);
|
||||
sample = fdso.cwave[(fdso.cwave_pos >> fdso.cwave_pos_shift) & 0x3F]
|
||||
* k * 4;
|
||||
sample = (int32_t)((uint32_t)sample * fds_div_lut[idx]) >> 16;
|
||||
fdso.sample_out_cache = sample;
|
||||
}
|
||||
}
|
||||
|
||||
static int32_t FBC = 0;
|
||||
|
||||
static void RenderSound(void) {
|
||||
int32_t end, start;
|
||||
int32_t end = (SOUNDTS << 16) / soundtsinc;
|
||||
int32_t start = FBC;
|
||||
int32_t x;
|
||||
|
||||
start = FBC;
|
||||
end = (SOUNDTS << 16) / soundtsinc;
|
||||
if (end <= start)
|
||||
return;
|
||||
if (end <= start) return;
|
||||
FBC = end;
|
||||
|
||||
if (!(SPSG[0x9] & 0x80))
|
||||
for (x = start; x < end; x++) {
|
||||
uint32_t t = FDSDoSound();
|
||||
uint32_t t;
|
||||
FDSDoSound();
|
||||
t = (uint32_t)fdso.sample_out_cache;
|
||||
t += t >> 1;
|
||||
t >>= 4;
|
||||
Wave[x >> 4] += t; /* (t>>2)-(t>>3); */ /* >>3; */
|
||||
Wave[x >> 4] += (int32_t)t;
|
||||
}
|
||||
}
|
||||
|
||||
static void RenderSoundHQ(void) {
|
||||
uint32_t x;
|
||||
|
||||
if (!(SPSG[0x9] & 0x80))
|
||||
for (x = FBC; x < SOUNDTS; x++) {
|
||||
uint32_t t = FDSDoSound();
|
||||
for (x = (uint32_t)FBC; x < (uint32_t)SOUNDTS; x++) {
|
||||
uint32_t t;
|
||||
FDSDoSound();
|
||||
t = (uint32_t)fdso.sample_out_cache;
|
||||
t += t >> 1;
|
||||
WaveHi[x] += t; /* (t<<2)-(t<<1); */
|
||||
WaveHi[x] += (int32_t)t;
|
||||
}
|
||||
FBC = SOUNDTS;
|
||||
FBC = (int32_t)SOUNDTS;
|
||||
}
|
||||
|
||||
static void HQSync(int32_t ts) {
|
||||
@@ -270,35 +426,80 @@ static void FDS_ESI(void) {
|
||||
if (FSettings.SndRate) {
|
||||
if (FSettings.soundq >= 1) {
|
||||
fdso.cycles = (int64_t)1 << 39;
|
||||
fdso.cwave_pos_shift = 22;
|
||||
fdso.mod_pos_shift = 17;
|
||||
fdso.mod_overflow_shift = 12;
|
||||
fdso.env_count_mul = 8;
|
||||
} else {
|
||||
fdso.cycles = ((int64_t)1 << 40) * FDSClock;
|
||||
fdso.cycles /= FSettings.SndRate * 16;
|
||||
fdso.cwave_pos_shift = 21;
|
||||
fdso.mod_pos_shift = 16;
|
||||
fdso.mod_overflow_shift = 11;
|
||||
fdso.env_count_mul = 4;
|
||||
}
|
||||
}
|
||||
SetReadHandler(0x4040, 0x407f, FDSWaveRead);
|
||||
SetWriteHandler(0x4040, 0x407f, FDSWaveWrite);
|
||||
SetWriteHandler(0x4080, 0x408A, FDSSWrite);
|
||||
SetReadHandler(0x4090, 0x4092, FDSSRead);
|
||||
SetReadHandler(0x4040, 0x407F, FDSWaveRead);
|
||||
SetReadHandler(0x4090, 0x4090, FDSEnvVolumeRead);
|
||||
SetReadHandler(0x4092, 0x4092, FDSEnvModRead);
|
||||
|
||||
SetWriteHandler(0x4040, 0x407F, FDSWaveWrite);
|
||||
SetWriteHandler(0x4080, 0x4080, FDSSReg0Write);
|
||||
SetWriteHandler(0x4082, 0x4082, FDSSReg1Write);
|
||||
SetWriteHandler(0x4083, 0x4083, FDSSReg2Write);
|
||||
SetWriteHandler(0x4084, 0x4084, FDSSReg3Write);
|
||||
SetWriteHandler(0x4085, 0x4085, FDSSReg4Write);
|
||||
SetWriteHandler(0x4086, 0x4086, FDSSReg5Write);
|
||||
SetWriteHandler(0x4087, 0x4087, FDSSReg6Write);
|
||||
SetWriteHandler(0x4088, 0x4088, FDSSReg7Write);
|
||||
SetWriteHandler(0x4089, 0x4089, FDSSReg8Write);
|
||||
SetWriteHandler(0x408A, 0x408A, FDSSReg9Write);
|
||||
}
|
||||
|
||||
void FDSSoundReset(void) {
|
||||
memset(&fdso, 0, sizeof(fdso));
|
||||
|
||||
/* BIOS-style register reset. Matches what the FDS BIOS does on
|
||||
* power-up; see https://github.com/bbbradsmith/nsfplay/.../nes_fds.cpp
|
||||
* Apply these BEFORE FDS_ESI so the writes don't trigger spurious
|
||||
* RenderSound calls against an unsized output buffer. */
|
||||
FDSSReg0Write(0x4080, 0x80); /* output volume = 0, env disabled */
|
||||
FDSSReg9Write(0x408A, 0xE8); /* master envelope speed */
|
||||
FDSSReg1Write(0x4082, 0x00); /* carrier freq 0 */
|
||||
FDSSReg2Write(0x4083, 0x80); /* carrier disabled */
|
||||
FDSSReg3Write(0x4084, 0x80); /* mod strength 0 */
|
||||
FDSSReg4Write(0x4085, 0x00); /* mod position 0 */
|
||||
FDSSReg5Write(0x4086, 0x00); /* mod freq 0 */
|
||||
FDSSReg6Write(0x4087, 0x80); /* mod disable */
|
||||
FDSSReg8Write(0x4089, 0x00); /* wave write disable */
|
||||
|
||||
FDS_ESI();
|
||||
|
||||
GameExpSound.HiSync = HQSync;
|
||||
GameExpSound.HiFill = RenderSoundHQ;
|
||||
GameExpSound.Fill = FDSSound;
|
||||
GameExpSound.RChange = FDS_ESI;
|
||||
}
|
||||
|
||||
static uint8_t FDSSoundRead(uint32_t A) {
|
||||
if (A >= 0x4040 && A < 0x4080) return FDSWaveRead(A);
|
||||
if (A >= 0x4090 && A < 0x4093) return FDSSRead(A);
|
||||
return X.DB;
|
||||
}
|
||||
|
||||
/* Used by FDS-conversion mappers (e.g. some Whirlwind Manu bootlegs) that
|
||||
* surface the FDS audio registers through their own write paths instead of
|
||||
* the standard FDS BIOS layout. Same signature as before the backport. */
|
||||
void FDSSoundWrite(uint32_t A, uint8_t V) {
|
||||
if (A >= 0x4040 && A < 0x4080) FDSWaveWrite(A, V);
|
||||
else if (A >= 0x4080 && A < 0x408B) FDSSWrite(A, V);
|
||||
switch (A) {
|
||||
case 0x4080: FDSSReg0Write(A, V); break;
|
||||
case 0x4082: FDSSReg1Write(A, V); break;
|
||||
case 0x4083: FDSSReg2Write(A, V); break;
|
||||
case 0x4084: FDSSReg3Write(A, V); break;
|
||||
case 0x4085: FDSSReg4Write(A, V); break;
|
||||
case 0x4086: FDSSReg5Write(A, V); break;
|
||||
case 0x4087: FDSSReg6Write(A, V); break;
|
||||
case 0x4088: FDSSReg7Write(A, V); break;
|
||||
case 0x4089: FDSSReg8Write(A, V); break;
|
||||
case 0x408A: FDSSReg9Write(A, V); break;
|
||||
default:
|
||||
if (A >= 0x4040 && A <= 0x407F) FDSWaveWrite(A, V);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void FDSSoundPower(void) {
|
||||
|
||||
Reference in New Issue
Block a user