Rewrite mappers 162,163,164; add mapper 558. Add EEPROM support to 164.
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106
src/boards/163.c
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106
src/boards/163.c
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/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2002 Xodnizel
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* Copyright (C) 2005 CaH4e3
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* Copyright (C) 2019 Libretro Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Nanjing FC-001 PCB */
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#include "mapinc.h"
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#include "../ines.h"
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static uint8 reg[4];
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static SFORMAT StateRegs[] =
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{
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{ reg, 4, "REGS" },
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{ 0 }
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};
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static void sync()
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{
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setprg32(0x8000, reg[2] <<4 | reg[0] &0xF | (reg[3] &0x04? 0x00: 0x03));
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setprg8r(0x10, 0x6000, 0);
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if (~reg[0] &0x80)
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setchr8(0);
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}
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static void hblank(void) {
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if (reg[0] &0x80 && scanline <239)
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{ /* Actual hardware cannot look at the current scanline number, but instead latches PA09 on PA13 rises. This does not seem possible with the current PPU emulation however. */
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setchr4(0x0000, scanline>=127? 1: 0);
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setchr4(0x1000, scanline>=127? 1: 0);
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}
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else
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setchr8(0);
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}
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static DECLFR(readReg)
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{
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return ~reg[1] &0x04;
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}
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static DECLFW(writeReg)
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{
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uint8 index = A >>8 &3;
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/* Swap bits of registers 0-2 again if the "swap bits" bit is set. Exclude register 2 on when PRG-ROM is 1 MiB. */
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if (reg[3] &0x01 && index <= (ROM_size == 64? 1: 2))
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V = V &~3 | V >>1 &1 | V <<1 &2;
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if (A &1)
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{
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if (reg[1] &0x01 && ~V &0x01) reg[1] ^=0x04; // If A0=1, flip feedback bit on falling edges of D0
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} // If A0=0, write to register
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else
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reg[index] = V;
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sync();
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}
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static void power(void)
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{
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memset(reg, 0, sizeof(reg));
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sync();
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SetReadHandler (0x5000, 0x57FF, readReg);
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SetWriteHandler(0x5000, 0x57FF, writeReg);
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SetReadHandler (0x6000, 0xFFFF, CartBR);
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SetWriteHandler(0x6000, 0x7FFF, CartBW);
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}
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static void reset()
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{
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memset(reg, 0, sizeof(reg));
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sync();
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}
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void Mapper163_Init (CartInfo *info)
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{
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uint32 WRAMSIZE = info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize): 8192;
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info->Power = power;
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info->Reset = reset;
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GameHBIRQHook = hblank;
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AddExState(StateRegs, ~0, 0, 0);
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uint8* WRAM = (uint8*) FCEU_gmalloc(WRAMSIZE);
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SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
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FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
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if (info->battery) {
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info->SaveGame[0] = WRAM;
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info->SaveGameLen[0] = WRAMSIZE;
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}
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}
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