BMC-K-3088: Fix outer bank size
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@@ -35,31 +35,18 @@ static uint8 reset_flag = 0;
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static uint8 chip, isK3088;
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static uint8 chip, isK3088;
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static void BMC411120CCW(uint32 A, uint8 V) {
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static void BMC411120CCW(uint32 A, uint8 V) {
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if (CHRptr[1]) {
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uint32 mask = isK3088 ? 0x07 : 0x03;
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chip = EXPREGS[0] & 7;
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setchr1(A, V | ((EXPREGS[0] & mask) << 7));
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if (chip > CHRchip_max) chip &= CHRchip_max;
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setchr1r(chip, A, V);
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} else
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setchr1(A, V | ((EXPREGS[0] & 3) << 7));
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}
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}
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static void BMC411120CPW(uint32 A, uint8 V) {
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static void BMC411120CPW(uint32 A, uint8 V) {
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if (PRGptr[1]) {
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uint32 mask = isK3088 ? 0x07 : 0x03;
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chip = EXPREGS[0] & 7;
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if (EXPREGS[0] & (isK3088 ? 8 : (8 | reset_flag))) { /* 32K Mode */
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if (chip > PRGchip_max) chip &= PRGchip_max;
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if (A == 0x8000)
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if (EXPREGS[0] & (isK3088 ? 8 : (8 | reset_flag))) { /* 32K Mode */
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/* bit 0-1 of register should be used as outer bank regardless of banking modes */
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if (A == 0x8000)
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setprg32(A, ((EXPREGS[0] >> 4) & 3) | ((EXPREGS[0] & mask) << 2));
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setprg32r(chip, A, ((EXPREGS[0] >> 4) & 3));
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} else /* MMC3 Mode */
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} else /* MMC3 Mode */
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setprg8(A, (V & 0x0F) | ((EXPREGS[0] & mask) << 4));
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setprg8r(chip, A, (V & 0x0F));
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} else {
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if (EXPREGS[0] & (isK3088 ? 8 : (8 | reset_flag))) { /* 32K Mode */
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if (A == 0x8000)
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/* bit 0-1 of register should be used as outer bank regardless of banking modes */
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setprg32(A, ((EXPREGS[0] >> 4) & 3) | ((EXPREGS[0] & 3) << 2));
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} else /* MMC3 Mode */
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setprg8(A, (V & 0x0F) | ((EXPREGS[0] & 3) << 4));
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}
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}
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}
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static DECLFW(BMC411120CLoWrite) {
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static DECLFW(BMC411120CLoWrite) {
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