From 50b90240808f731de8881a7cee6bfea01a61a9bc Mon Sep 17 00:00:00 2001
From: negativeExponent <54053706+negativeExponent@users.noreply.github.com>
Date: Sat, 10 Apr 2021 02:21:29 +0800
Subject: [PATCH] more C89 fixes

---
 src/boards/126-422-534.c | 36 ++++++++++++++++++------------------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/src/boards/126-422-534.c b/src/boards/126-422-534.c
index e8d6610..1b81963 100644
--- a/src/boards/126-422-534.c
+++ b/src/boards/126-422-534.c
@@ -31,48 +31,48 @@ static uint8 invertC000;
 static uint8 dipSwitch;
 
 static void wrapPRG(uint32 A, uint8 V) {
-	int prgAND = EXPREGS[0] &0x40? 0x0F: 0x1F; // 128 KiB or 256 KiB inner PRG bank selection
-	int prgOR  =(EXPREGS[0] <<4 &0x70 | EXPREGS[0] <<3 &0x180) &~prgAND; // outer PRG bank
+	int prgAND = EXPREGS[0] &0x40? 0x0F: 0x1F; /* 128 KiB or 256 KiB inner PRG bank selection */
+	int prgOR  =(EXPREGS[0] <<4 &0x70 | EXPREGS[0] <<3 &0x180) &~prgAND; /* outer PRG bank */
 	switch(EXPREGS[3] &3) {
-		case 0: // MMC3 PRG mode
+		case 0: /* MMC3 PRG mode */
 			break;
 		case 1:
-		case 2: // NROM-128 mode: MMC3 register 6 applies throughout $8000-$FFFF, MMC3 A13 replaced with CPU A13.
+		case 2: /* NROM-128 mode: MMC3 register 6 applies throughout $8000-$FFFF, MMC3 A13 replaced with CPU A13. */
 			V =DRegBuf[6] &~1 | A >>13 &1;
-			setprg8(A ^0x4000,  V     &prgAND | prgOR); // wrapPRG is only called with A containing the switchable banks, so we need to manually switch the normally fixed banks in this mode as well.
+			setprg8(A ^0x4000,  V     &prgAND | prgOR); /* wrapPRG is only called with A containing the switchable banks, so we need to manually switch the normally fixed banks in this mode as well. */
 			break;
-		case 3:	// NROM-256 mode: MMC3 register 6 applies throughout $8000-$FFFF, MMC3 A13-14 replaced with CPU A13-14.
+		case 3:	/* NROM-256 mode: MMC3 register 6 applies throughout $8000-$FFFF, MMC3 A13-14 replaced with CPU A13-14. */
 			V =DRegBuf[6] &~3 | A >>13 &3;
-			setprg8(A ^0x4000, (V ^2) &prgAND | prgOR); // wrapPRG is only called with A containing the switchable banks, so we need to manually switch the normally fixed banks in this mode as well.
+			setprg8(A ^0x4000, (V ^2) &prgAND | prgOR); /* wrapPRG is only called with A containing the switchable banks, so we need to manually switch the normally fixed banks in this mode as well. */
 			break;
 	}
 	setprg8(A, V &prgAND | prgOR);	
 }
 
 static void wrapCHR(uint32 A, uint8 V) {
-	int chrAND = EXPREGS[0] &0x80? 0x7F: 0xFF; // 128 KiB or 256 KiB innter CHR bank selection
-	int chrOR; // outer CHR bank
-	if (reverseCHR_A18_A19) // Mapper 126 swaps CHR A18 and A19
+	int chrAND = EXPREGS[0] &0x80? 0x7F: 0xFF; /* 128 KiB or 256 KiB innter CHR bank selection */
+	int chrOR; /* outer CHR bank */
+	if (reverseCHR_A18_A19) /* Mapper 126 swaps CHR A18 and A19 */
 		chrOR =(EXPREGS[0] <<4 &0x080 | EXPREGS[0] <<3 &0x100 | EXPREGS[0] <<5 &0x200) &~chrAND;
 	else
 		chrOR =EXPREGS[0] <<4 &0x380 &~chrAND;
 	
-	if (EXPREGS[3] &0x10) // CNROM mode: 8 KiB inner CHR bank comes from outer bank register #2
+	if (EXPREGS[3] &0x10) /* CNROM mode: 8 KiB inner CHR bank comes from outer bank register #2 */
 		setchr8(EXPREGS[2] &(chrAND >>3) | chrOR >>3);
-	else // MMC3 CHR mode
+	else /* MMC3 CHR mode */
 		setchr1(A, (V & chrAND) | chrOR);
 }
 
 static DECLFW(writeWRAM) {
 	if (~EXPREGS[3] &0x80) {
-		// Lock bit clear: Update any outer bank register
+		/* Lock bit clear: Update any outer bank register */
 		EXPREGS[A &3] =V;
 		FixMMC3PRG(MMC3_cmd);
 		FixMMC3CHR(MMC3_cmd);
 	} else
 	if ((A &3) ==2) {
-		// Lock bit set: Only update the bottom one or two bits of the CNROM bank
-		int latchMask =EXPREGS[2] &0x10? 1: 3; // 16 or 32 KiB inner CHR bank selection
+		/* Lock bit set: Only update the bottom one or two bits of the CNROM bank */
+		int latchMask =EXPREGS[2] &0x10? 1: 3; /* 16 or 32 KiB inner CHR bank selection */
 		EXPREGS[2] &=~latchMask;
 		EXPREGS[2] |= V &latchMask;
 		FixMMC3CHR(MMC3_cmd);
@@ -82,7 +82,7 @@ static DECLFW(writeWRAM) {
 
 static DECLFR(readDIP) {
 	uint8 result =CartBR(A);
-	if (EXPREGS[1] &1) result =result &~3 | dipSwitch &3; // Replace bottom two bits with solder pad or DIP switch setting if so selected
+	if (EXPREGS[1] &1) result =result &~3 | dipSwitch &3; /* Replace bottom two bits with solder pad or DIP switch setting if so selected */
 	return result;
 }
 
@@ -91,7 +91,7 @@ static DECLFW(writeIRQ) {
 }
 
 static void reset(void) {
-	dipSwitch++; // Soft-resetting cycles through solder pad or DIP switch settings
+	dipSwitch++; /* Soft-resetting cycles through solder pad or DIP switch settings */
 	EXPREGS[0] = EXPREGS[1] = EXPREGS[2] = EXPREGS[3] = 0;
 	MMC3RegReset();
 }
@@ -102,7 +102,7 @@ static void power(void) {
 	GenMMC3Power();
 	SetWriteHandler(0x6000, 0x7FFF, writeWRAM);
 	SetReadHandler(0x8000, 0xFFFF, readDIP);
-	if (invertC000) SetWriteHandler(0xC000, 0xDFFF, writeIRQ); // Mapper 534 inverts the MMC3 scanline counter reload value
+	if (invertC000) SetWriteHandler(0xC000, 0xDFFF, writeIRQ); /* Mapper 534 inverts the MMC3 scanline counter reload value */
 }
 
 static void init(CartInfo *info) {