diff --git a/src/boards/126-422-534.c b/src/boards/126-422-534.c
index af5e1e1..18f5836 100644
--- a/src/boards/126-422-534.c
+++ b/src/boards/126-422-534.c
@@ -49,8 +49,8 @@ static uint8 getMMC3Bank(int bank) {
 static void wrapPRG(uint32 A, uint8 V) {
 	int prgAND = EXPREGS[0] &0x40? 0x0F: 0x1F; /* 128 KiB or 256 KiB inner PRG bank selection */
 	int prgOR  =(EXPREGS[0] <<4 &0x70 | (EXPREGS[0] ^0x20) <<3 &0x180) &~prgAND; /* Outer PRG bank */
-	if (submapper ==1) prgOR |=prgOR >>1 &0x80;
-	if (submapper ==2) prgOR |=EXPREGS[1] <<5 &0x80;
+	if (submapper ==1) prgOR =prgOR &0x7F | prgOR >>1 &0x80;    /* Submapper 1 uses PRG A21 as a chip select between two 1 MiB chips */
+	if (submapper ==2) prgOR =prgOR &0x7F | EXPREGS[1] <<5 &0x80;   /* Submapper 2 uses 6001.2 (not documented in datasheet) as a chip select between two 1 MiB chips */
 	for (A =0; A <4; A++) {
 		/* In UNROM-like mode (CT3=1, CT2=1, CT0=1), MMC3 sees A13=0 and A14=CPU A14 during reads, making register 6 apply from $8000-$BFFF, and the fixed bank from $C000-$FFFF.
 		   In NROM-128, NROM-256, ANROM and UNROM modes (CT0=1), MMC3 sees A13=0 and A14=0, making register 6 apply from $8000-$FFFF. */
@@ -78,7 +78,7 @@ static void wrapCHR(uint32 A, uint8 V) {
 	if (reverseCHR_A18_A19) /* Mapper 126 swaps CHR A18 and A19 */
 		chrOR =(EXPREGS[0] <<4 &0x080 | (EXPREGS[0] ^0x20) <<3 &0x100 | EXPREGS[0] <<5 &0x200) &~chrAND;
 	else
-		chrOR =(EXPREGS[0] ^0x20) <<4 &0x380 &~chrAND;
+		chrOR =((EXPREGS[0] ^0x20) <<4 &0x380 | EXPREGS[0] <<8 &0x400) &~chrAND;
 	
 	if (EXPREGS[3] &0x10) /* CNROM mode: 8 KiB inner CHR bank comes from outer bank register #2 */
 		setchr8(EXPREGS[2] &(chrAND >>3) | (chrOR &~chrAND) >>3);