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Add mapper 447 submapper 1.

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This commit is contained in:
NewRisingSun
2025-10-03 12:54:14 +02:00
parent dfdbd64526
commit 430b59cd92
2 changed files with 15 additions and 20 deletions
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33
src/boards/447.c
View File

@@ -22,14 +22,9 @@
#include "asic_vrc2and4.h" #include "asic_vrc2and4.h"
#include "cartram.h" #include "cartram.h"
static uint8 submapper;
static uint8 reg; static uint8 reg;
static uint8 dip; static uint8 pad;
static SFORMAT stateRegs[] = {
{ &reg, 1, "EXP0" },
{ &dip, 1, "DIPS" },
{ 0 }
};
static void sync () { static void sync () {
VRC24_syncPRG(0x0F, reg <<4); VRC24_syncPRG(0x0F, reg <<4);
@@ -39,21 +34,19 @@ static void sync () {
} }
static int getPRGBank (uint8 bank) { static int getPRGBank (uint8 bank) {
if (reg &4) { if (reg &0x04) {
if (~reg &2) int mask = reg &(submapper == 0? 0x02: 0x08) ? 1: 3;
return VRC24_getPRGBank(bank &1) &~2 | bank &2; return VRC24_getPRGBank(bank &1) &~mask | bank &mask;
else
return VRC24_getPRGBank(bank &1);
} else } else
return VRC24_getPRGBank(bank); return VRC24_getPRGBank(bank);
} }
static DECLFR (readPRG) { static DECLFR (readPRG) {
return CartBR(reg &8? (A &~3 | dip &3): A); return CartBR(reg &0x08? (A &~0x03 | pad &0x03): A);
} }
static DECLFW (writeReg) { static DECLFW (writeReg) {
if (~reg &1) { if (~reg &0x01) {
reg = A &0xFF; reg = A &0xFF;
sync(); sync();
} }
@@ -62,21 +55,23 @@ static DECLFW (writeReg) {
static void power (void) { static void power (void) {
reg = 0; reg = 0;
dip = 0; pad = 0;
VRC24_power(); VRC24_power();
SetReadHandler(0x8000, 0xFFFF, readPRG); if (submapper == 0) SetReadHandler(0x8000, 0xFFFF, readPRG);
} }
static void reset (void) { static void reset (void) {
reg = 0; reg = 0;
dip++; pad++;
sync(); VRC24_clear();
} }
void Mapper447_Init (CartInfo *info) { void Mapper447_Init (CartInfo *info) {
submapper = info->submapper;
VRC4_init(info, sync, 0x04, 0x08, 0, getPRGBank, NULL, NULL, writeReg, NULL ); VRC4_init(info, sync, 0x04, 0x08, 0, getPRGBank, NULL, NULL, writeReg, NULL );
WRAM_init(info, 2); WRAM_init(info, 2);
info->Power = power; info->Power = power;
info->Reset = reset; info->Reset = reset;
AddExState(stateRegs, ~0, 0, 0); AddExState(&reg, 1, 0, "EXPR");
if (submapper == 0) AddExState(&pad, 1, 0, "DIPS");
} }

2
src/ines.c
View File

@@ -878,7 +878,7 @@ INES_BOARD_BEGIN()
INES_BOARD( "NC-7000M/NC-8000M", 444, Mapper444_Init ) INES_BOARD( "NC-7000M/NC-8000M", 444, Mapper444_Init )
INES_BOARD( "DG574B", 445, Mapper445_Init ) INES_BOARD( "DG574B", 445, Mapper445_Init )
INES_BOARD( "SMD172B_FPGA", 446, Mapper446_Init ) INES_BOARD( "SMD172B_FPGA", 446, Mapper446_Init )
INES_BOARD( "KL-06", 447, Mapper447_Init ) INES_BOARD( "KL-06/GC007", 447, Mapper447_Init )
INES_BOARD( "830768C", 448, Mapper448_Init ) INES_BOARD( "830768C", 448, Mapper448_Init )
INES_BOARD( "22-in-1 King Series", 449, Mapper449_Init ) INES_BOARD( "22-in-1 King Series", 449, Mapper449_Init )
INES_BOARD( "晶太 YY841157C", 450, Mapper450_Init ) INES_BOARD( "晶太 YY841157C", 450, Mapper450_Init )