UNL-KS7017: Smoother state loading...

- Smoother states loading  by using the the register value used during call to Sync() instead of the last value written since write and sync are called at different times.
- (reg value written @ $4A000, sync happens $5100)
This commit is contained in:
retro-wertz
2019-06-25 18:23:23 +08:00
parent 0cb1c866a1
commit 3666962090

View File

@@ -23,7 +23,7 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg, mirr; static uint8 latche, reg, mirr;
static int32 IRQa, IRQCount, IRQLatch; static int32 IRQa, IRQCount, IRQLatch;
static uint8 *WRAM = NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
@@ -35,6 +35,7 @@ static SFORMAT StateRegs[] =
{ &IRQa, 4, "IRQA" }, { &IRQa, 4, "IRQA" },
{ &IRQCount, 4, "IRQC" }, { &IRQCount, 4, "IRQC" },
{ &IRQLatch, 4, "IRQL" }, { &IRQLatch, 4, "IRQL" },
{ &latche, 1, "LATC" },
{ 0 } { 0 }
}; };
@@ -47,8 +48,9 @@ static void Sync(void) {
static DECLFW(UNLKS7017Write) { static DECLFW(UNLKS7017Write) {
/* FCEU_printf("bs %04x %02x\n",A,V); */ /* FCEU_printf("bs %04x %02x\n",A,V); */
if ((A & 0xFF00) == 0x4A00) { if ((A & 0xFF00) == 0x4A00) {
reg = ((A >> 2) & 3) | ((A >> 4) & 4); latche = ((A >> 2) & 3) | ((A >> 4) & 4);
} else if ((A & 0xFF00) == 0x5100) { } else if ((A & 0xFF00) == 0x5100) {
reg = latche;
Sync(); Sync();
} else if (A == 0x4020) { } else if (A == 0x4020) {
X6502_IRQEnd(FCEU_IQEXT); X6502_IRQEnd(FCEU_IQEXT);