Add new mappers
Added iNES 1.0/2.0 mappers 134 - replaced Mapper134_init with Bs5652_Init 391 - NC7000M 402 - 831019C J-2282 Added UNIF boards: AB-G1L BS-110 WELL-NO-DG450 KG256
This commit is contained in:
negativeExponent
156
src/boards/AbG1l.c
Normal file
156
src/boards/AbG1l.c
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@@ -0,0 +1,156 @@
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/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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*
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* Copyright (C) 2008 -2020 dragon2snow,loong2snow from www.nesbbs.com
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*
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* This program is free software; you can redistribute it and/or modify
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||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
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* (at your option) any later version.
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||||
*
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||||
* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*
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*/
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#include "mapinc.h"
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static uint8 regs[4];
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static uint8 hrd_flag;
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static void(*Sync)(void);
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static SFORMAT StateRegs[] =
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{
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{ &hrd_flag, 1, "FLAG" },
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{ regs, 4, "REGS" },
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{ 0 }
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};
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static void SyncAbG1l(void) {
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if (regs[1] & 0x10)
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setprg32(0x8000,(regs[1] & 0xC0) >> 6);
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else
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{
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setprg16(0x8000, (regs[1] & 0xE0) >> 5);
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setprg16(0xC000, (regs[1] & 0xE0) >> 5);
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}
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setchr8(regs[1]);
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setmirror((regs[1] & 0x8) ? 0 : 1);
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}
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static DECLFW(AbG1lWriteHi) {
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regs[0] = V;
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setchr8(((regs[2] & 0xC0) >> 7) << 2 | (regs[0] & 0x03));
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Sync();
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}
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static DECLFW(AbG1lWriteLo) {
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regs[A & 0x03] = V;
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Sync();
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}
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static DECLFR(AbG1lReadLo) {
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return hrd_flag;
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}
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static void AbG1lPower(void) {
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hrd_flag = 0;
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regs[0] = 0;
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regs[1] = 0;
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regs[2] = 0;
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Sync();
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SetWriteHandler(0x8000, 0xFFFF, AbG1lWriteHi);
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SetWriteHandler(0x6001, 0x6002, AbG1lWriteLo);
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SetReadHandler(0x6000, 0x7FFF, AbG1lReadLo);
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SetReadHandler(0x8000, 0xFFFF, CartBR);
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}
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static void StateRestore(int version) {
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Sync();
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}
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static void AbG1lReset(void) {
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hrd_flag++;
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hrd_flag &= 3;
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regs[0] = 0;
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regs[1] = 0;
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regs[2] = 0;
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Sync();
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}
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void AbG1l_Init(CartInfo *info) {
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Sync = SyncAbG1l;
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hrd_flag = 0;
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Sync();
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info->Power = AbG1lPower;
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info->Reset = AbG1lReset;
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AddExState(&StateRegs, ~0, 0, 0);
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GameStateRestore = StateRestore;
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}
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static void SyncWellNoDG450(void) {
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if (regs[1] & 0x10)
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setprg32(0x8000, (regs[1]) >> 6);
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else
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{
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setprg16(0x8000, (regs[1]) >> 5);
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setprg16(0xC000, (regs[1]) >> 5);
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}
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setchr8(regs[1] & 0x0F);
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setmirror((regs[1] & 0x8) ? 0 : 1);
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}
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static void WellNoDG450Power(void) {
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hrd_flag = 0;
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regs[0] = 0;
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regs[1] = 0;
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regs[2] = 0;
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Sync();
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SetWriteHandler(0x6001, 0x6002, AbG1lWriteLo);
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SetReadHandler(0x6000, 0x7FFF, AbG1lReadLo);
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SetReadHandler(0x8000, 0xFFFF, CartBR);
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}
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static void WellNoDG450Reset(void) {
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hrd_flag++;
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hrd_flag &= 3;
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regs[0] = 0;
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regs[1] = 0;
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regs[2] = 0;
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Sync();
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}
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void WellNoDG450_Init(CartInfo *info) {
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Sync = SyncWellNoDG450;
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info->Power = WellNoDG450Power;
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info->Reset = WellNoDG450Reset;
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AddExState(&StateRegs, ~0, 0, 0);
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GameStateRestore = StateRestore;
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}
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210
src/boards/BS110.c
Normal file
210
src/boards/BS110.c
Normal file
@@ -0,0 +1,210 @@
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/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2008 -2020 dragon2snow,loong2snow from www.nesbbs.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
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||||
*
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#include "mapinc.h"
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#include "mmc3.h"
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extern uint8 *WRAM;
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extern uint32 WRAMSIZE;
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//extern uint8 *CHRRAM;
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//extern uint32 CHRRAMSIZE;
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uint8 mmc3_reg[8];
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uint8 exRegs[8];
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uint8 pointer;
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uint8 locked;
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uint8 readDIP;
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uint16 prgAND;
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uint16 chrAND;
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uint16 prgOR;
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uint16 chrOR;
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uint8 nrom;
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uint8 nrom128;
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uint8 dipswitch;
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static SFORMAT BS110_StateRegs[] =
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{
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{ exRegs, 8, "REGS" },
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{ mmc3_reg, 8, "MMC3R" },
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{ &pointer, 1, "POINT" },
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{ &readDIP, 1, "RDIP" },
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{ &prgAND, 1, "PRGAND" },
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{ &chrAND, 1, "CHRAND" },
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{ &prgOR, 1, "PRGOR" },
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{ &chrOR, 1, "CHROR" },
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{ &nrom, 1, "NROM" },
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{ &nrom128, 1, "N128" },
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{ &dipswitch, 1, "DIP" },
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{ 0 }
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};
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int BS110GetPRGBank(int bank)
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{
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if (~bank & 1 && (pointer & 0x40)) bank ^= 2;
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return bank & 2 ? 0xFE | bank & 1 : mmc3_reg[6 | bank & 1];
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}
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void BS110SyncPRG_GNROM(int A14, int AND, int OR) {
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setprg8(0x8000, (BS110GetPRGBank(0) &~A14) &AND | OR);
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setprg8(0xA000, (BS110GetPRGBank(1) &~A14) &AND | OR);
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setprg8(0xC000, (BS110GetPRGBank(0) | A14) &AND | OR);
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setprg8(0xE000, (BS110GetPRGBank(1) | A14) &AND | OR);
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}
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static void BS110CW(uint32 A, uint8 V) {
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uint8 block = ((exRegs[1]) & 0x03);
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uint8 mask = 0x7F;
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setchr1(A, (block << 7) | (V & mask));
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}
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static void BS110PW(uint32 A, uint8 V) {
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if ((exRegs[1] >> 2) & 0x01)
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{
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uint8 mask = 0x0F;
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uint8 block = (exRegs[1] & 3) << 4;
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if ((exRegs[1] >> 3) & 0x01)
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{
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setprg8(0x8000, (BS110GetPRGBank(0)) & mask | block);
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setprg8(0xA000, (BS110GetPRGBank(1)) & mask | block);
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setprg8(0xC000, (BS110GetPRGBank(0)) & mask | block);
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setprg8(0xE000, (BS110GetPRGBank(1)) & mask | block);
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}
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else
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{
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setprg8(0x8000, (BS110GetPRGBank(0)) & mask | block);
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setprg8(0xA000, (BS110GetPRGBank(1)) & mask | block);
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setprg8(0xC000, (BS110GetPRGBank(0) | 2) & mask | block);
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setprg8(0xE000, (BS110GetPRGBank(1) | 2) & mask | block);
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}
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}
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else
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{
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uint8 mask = 0x0F;
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uint8 block = (exRegs[1] & 3) << 4;
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setprg8(A, block | (V & mask));
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}
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}
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static DECLFW(BS110WriteHi) {
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A = A & 0xE001;
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if (A < 0xC000)
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{
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if (A == 0x8000)
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pointer = MMC3_cmd ^ V;
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if (A == 0x8001)
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mmc3_reg[MMC3_cmd & 0x07] = V;
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MMC3_CMDWrite(A, V);
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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}
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else
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{
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MMC3_IRQWrite(A, V);
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}
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}
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static DECLFW(BS110WriteLo) {
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exRegs[1] = A;
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exRegs[0] = V;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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}
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static DECLFR(BS110ReadHi)
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{
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if ((A == 0xCB00) && ((exRegs[1] & 0x0F) == 0x08))
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return dipswitch;
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else
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return CartBR(A);
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}
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static void BS110Power(void) {
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dipswitch = 0;
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mmc3_reg[0] = 0x00; mmc3_reg[1] = 0x02;
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mmc3_reg[2] = 0x04; mmc3_reg[3] = 0x05; mmc3_reg[4] = 0x06; mmc3_reg[5] = 0x07;
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mmc3_reg[6] = 0x00; mmc3_reg[7] = 0x01;
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int i = 0;
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for (i = 0;i<4;i++)
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{
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exRegs[i] = 0;
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}
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GenMMC3Power();
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SetWriteHandler(0x6000, 0x7FFF, BS110WriteLo);
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SetWriteHandler(0x8000, 0xFFFF, BS110WriteHi);
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SetReadHandler(0x8000, 0xFFFF, BS110ReadHi);
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}
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static void BS110Reset(void) {
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dipswitch++;
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mmc3_reg[0] = 0x00; mmc3_reg[1] = 0x02;
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mmc3_reg[2] = 0x04; mmc3_reg[3] = 0x05; mmc3_reg[4] = 0x06; mmc3_reg[5] = 0x07;
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mmc3_reg[6] = 0x00; mmc3_reg[7] = 0x01;
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int i = 0;
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for (i = 0;i<4;i++)
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{
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exRegs[i] = 0;
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}
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MMC3RegReset();
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}
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static void BS110Close(void) {
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if (WRAM)
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FCEU_gfree(WRAM);
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WRAM = NULL;
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}
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void BS110_Init(CartInfo *info) {
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GenMMC3_Init(info, 512, 512, 0, 0);
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pwrap = BS110PW;
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cwrap = BS110CW;
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info->Power = BS110Power;
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info->Reset = BS110Reset;
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info->Close = BS110Close;
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WRAMSIZE = 8192;
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WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
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SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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//CHRRAMSIZE = 8192;
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//CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
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//SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
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//AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR");
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AddExState(EXPREGS, 3, 0, "EXPR");
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AddExState(BS110_StateRegs, ~0, 0, 0);
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}
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260
src/boards/Bs5652.c
Normal file
260
src/boards/Bs5652.c
Normal file
@@ -0,0 +1,260 @@
|
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/* FCE Ultra - NES/Famicom Emulator
|
||||
*
|
||||
* Copyright notice for this file:
|
||||
* Copyright (C) 2008 -2020 dragon2snow,loong2snow from www.nesbbs.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
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#include "mapinc.h"
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#include "mmc3.h"
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#include "crc32.h"
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extern uint8 *WRAM;
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extern uint32 WRAMSIZE;
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//extern uint8 *CHRRAM;
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//extern uint32 CHRRAMSIZE;
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uint8 mmc3_reg[8];
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uint8 exRegs[8];
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uint8 pointer;
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uint8 locked;
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uint8 readDIP;
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uint16 prgAND;
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uint16 chrAND;
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uint16 prgOR;
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uint16 chrOR;
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uint8 nrom;
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uint8 nrom128;
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uint8 dipswitch;
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static SFORMAT BS5652_StateRegs[] =
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{
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{ exRegs, 8, "REGS" },
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{ mmc3_reg, 8, "MMC3R" },
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{ &pointer, 1, "POINT" },
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{ &readDIP, 1, "RDIP" },
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{ &prgAND, 1, "PRGAND" },
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{ &chrAND, 1, "CHRAND" },
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{ &prgOR, 1, "PRGOR" },
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{ &chrOR, 1, "CHROR" },
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{ &nrom, 1, "NROM" },
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{ &nrom128, 1, "N128" },
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{ &dipswitch, 1, "DIP" },
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{ 0 }
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};
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void Bs5652AnalyzeReg()
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{
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locked = exRegs[0] & 0x80;
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readDIP = exRegs[0] & 0x40;
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prgAND = exRegs[1] & 0x04 ? 0x0F : 0x1F;
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chrAND = exRegs[1] & 0x40 ? 0x7F : 0xFF;
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prgOR = (exRegs[1] & 0x03) << 4;
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chrOR = (exRegs[1] & 0x30) << 3 ;
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nrom = exRegs[0] & 0x08;
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nrom128 = exRegs[1] & 0x08;
|
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}
|
||||
|
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int Bs5652GetPRGBank(int bank)
|
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{
|
||||
if (~bank & 1 && (pointer & 0x40)) bank ^= 2;
|
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return bank & 2 ? 0xFE | bank & 1 : mmc3_reg[6 | bank & 1];
|
||||
}
|
||||
|
||||
void Bs5652SyncPRG_GNROM(int A14, int AND, int OR) {
|
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setprg8(0x8000, (Bs5652GetPRGBank(0) &~A14) &AND | OR);
|
||||
setprg8(0xA000, (Bs5652GetPRGBank(1) &~A14) &AND | OR);
|
||||
setprg8(0xC000, (Bs5652GetPRGBank(0) | A14) &AND | OR);
|
||||
setprg8(0xE000, (Bs5652GetPRGBank(1) | A14) &AND | OR);
|
||||
}
|
||||
|
||||
static void Bs5652CW(uint32 A, uint8 V) {
|
||||
|
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if (exRegs[0] & 0x08)
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setchr8((exRegs[2] & 0x0F) | (exRegs[4] & 0x03) | (((exRegs[1] >> 4) & 7) << 4));
|
||||
else
|
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setchr1(A, (V & chrAND) | chrOR );
|
||||
}
|
||||
|
||||
static void Bs5652PW(uint32 A, uint8 V) {
|
||||
if (nrom)
|
||||
{
|
||||
if (exRegs[3] & 0x8)// 20190504 up2
|
||||
{
|
||||
if ((exRegs[1] >> 3) & 0x01)
|
||||
{
|
||||
uint8 _bank = ((exRegs[2] >> 1) & 0x07) | ((exRegs[1] & 3) << 3);
|
||||
setprg16(0x8000, _bank);
|
||||
setprg16(0xC000, _bank);
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
setprg32(0x8000,((exRegs[2] >> 2) & 0x03) | ((exRegs[1] & 3) << 2));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Bs5652SyncPRG_GNROM(nrom128 ? 0 : 2, prgAND, prgOR);
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
if (((exRegs[1] >> 7) & 0x01))
|
||||
{
|
||||
setprg32(0x8000,((Bs5652GetPRGBank(0) >> 2) & 0x03) | ((exRegs[1] & 3) << 2));
|
||||
}
|
||||
else
|
||||
setprg8(A, prgOR | (V & prgAND));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static DECLFW(Bs5652WriteHi) {
|
||||
|
||||
A = A & 0xE001;
|
||||
|
||||
if (A < 0xC000)
|
||||
{
|
||||
if(A==0x8000)
|
||||
pointer = MMC3_cmd ^ V;
|
||||
if(A==0x8001)
|
||||
mmc3_reg[MMC3_cmd & 0x07] = V;
|
||||
|
||||
MMC3_CMDWrite(A, V);
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
else
|
||||
{
|
||||
MMC3_IRQWrite(A, V);
|
||||
}
|
||||
}
|
||||
|
||||
static DECLFW(Bs5652WriteLo) {
|
||||
|
||||
if (!locked) {
|
||||
exRegs[A & 3] = V;
|
||||
Bs5652AnalyzeReg();
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((exRegs[0] & 0x08))
|
||||
{
|
||||
exRegs[4] = V;
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
else
|
||||
{
|
||||
WRAM[A - 0x6000] = V;
|
||||
}
|
||||
}
|
||||
}
|
||||
static DECLFR(Bs5652ReadHi)
|
||||
{
|
||||
if (readDIP)
|
||||
{
|
||||
return dipswitch;
|
||||
}
|
||||
else
|
||||
return CartBR(A);
|
||||
}
|
||||
|
||||
static void Bs5652Power(void) {
|
||||
dipswitch = 0;
|
||||
mmc3_reg[0] = 0x00; mmc3_reg[1] = 0x02;
|
||||
mmc3_reg[2] = 0x04; mmc3_reg[3] = 0x05; mmc3_reg[4] = 0x06; mmc3_reg[5] = 0x07;
|
||||
mmc3_reg[6] = 0x00; mmc3_reg[7] = 0x01;
|
||||
int i=0;
|
||||
|
||||
for(i=0;i<4;i++)
|
||||
{
|
||||
exRegs[i]=0;
|
||||
}
|
||||
|
||||
Bs5652AnalyzeReg();
|
||||
|
||||
GenMMC3Power();
|
||||
SetWriteHandler(0x6000, 0x7FFF, Bs5652WriteLo);
|
||||
SetWriteHandler(0x8000, 0xFFFF, Bs5652WriteHi);
|
||||
SetReadHandler(0x8000, 0xFFFF, Bs5652ReadHi);
|
||||
}
|
||||
|
||||
static void Bs5652Reset(void) {
|
||||
|
||||
dipswitch++;
|
||||
mmc3_reg[0] = 0x00; mmc3_reg[1] = 0x02;
|
||||
mmc3_reg[2] = 0x04; mmc3_reg[3] = 0x05; mmc3_reg[4] = 0x06; mmc3_reg[5] = 0x07;
|
||||
mmc3_reg[6] = 0x00; mmc3_reg[7] = 0x01;
|
||||
int i=0;
|
||||
|
||||
for(i=0;i<4;i++)
|
||||
{
|
||||
exRegs[i]=0;
|
||||
}
|
||||
|
||||
Bs5652AnalyzeReg();
|
||||
|
||||
MMC3RegReset();
|
||||
}
|
||||
static void Bs5652Close(void) {
|
||||
if (WRAM)
|
||||
FCEU_gfree(WRAM);
|
||||
WRAM = NULL;
|
||||
}
|
||||
|
||||
void Bs5652_Init(CartInfo *info) {
|
||||
GenMMC3_Init(info, 512, 512, 0, 0);
|
||||
pwrap = Bs5652PW;
|
||||
cwrap = Bs5652CW;
|
||||
info->Power = Bs5652Power;
|
||||
info->Reset = Bs5652Reset;
|
||||
info->Close = Bs5652Close;
|
||||
|
||||
WRAMSIZE = 8192;
|
||||
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
|
||||
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
|
||||
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
|
||||
|
||||
//CHRRAMSIZE = 8192;
|
||||
//CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
|
||||
//SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
|
||||
//AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR");
|
||||
|
||||
uint32 unif_crc = CalcCRC32(0, PRGptr[0], PRGsize[0]);
|
||||
|
||||
if (unif_crc == 0xb97641b5) //Fix my own error, unif CHR 0 error
|
||||
{
|
||||
if ((CHRsize[0] == 0x2000) && (CHRsize[1] > 0x2000))
|
||||
{
|
||||
CHRsize[0] = CHRsize[1];
|
||||
CHRptr[0] = (uint8*)FCEU_gmalloc(CHRsize[1]);
|
||||
memcpy(CHRptr[0], CHRptr[1], CHRsize[1]);
|
||||
SetupCartCHRMapping(0, CHRptr[0], CHRsize[0], 0);
|
||||
}
|
||||
}
|
||||
|
||||
AddExState(EXPREGS, 3, 0, "EXPR");
|
||||
AddExState(BS5652_StateRegs, ~0, 0, 0);
|
||||
}
|
||||
111
src/boards/KG256.c
Normal file
111
src/boards/KG256.c
Normal file
@@ -0,0 +1,111 @@
|
||||
/* FCE Ultra - NES/Famicom Emulator
|
||||
*
|
||||
* Copyright notice for this file:
|
||||
*
|
||||
* Copyright (C) 2008 -2020 dragon2snow,loong2snow from www.nesbbs.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "mapinc.h"
|
||||
|
||||
static uint8 regs[4];
|
||||
|
||||
static SFORMAT StateRegs[] =
|
||||
{
|
||||
{ regs, 4, "REGS" },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
static void Sync(void) {
|
||||
|
||||
int r = 0;
|
||||
if ((regs[1]) & 0x20)
|
||||
{
|
||||
r = 1;
|
||||
}
|
||||
if ((regs[1] >> 4) & 0x01)
|
||||
{
|
||||
setprg16(0x8000, regs[1] & 0x07 | (r) << 3);
|
||||
setprg16(0xC000, regs[1] & 0x07 | (r) << 3);
|
||||
setchr8(regs[0] & 0x07 | (r) << 3);
|
||||
}
|
||||
else
|
||||
{
|
||||
setprg32(0x8000, (regs[1] >> 1) & 0x03 | (r) << 2);
|
||||
setchr8(regs[2] & 0x01 | (r) << 3);
|
||||
}
|
||||
|
||||
uint8 mirr = (((regs[0] >> 4 & 0x1)));
|
||||
|
||||
if (mirr)
|
||||
setmirror(0);
|
||||
else
|
||||
setmirror(1);
|
||||
|
||||
}
|
||||
|
||||
static DECLFW(KG256WriteHi) {
|
||||
regs[2] = V;
|
||||
Sync();
|
||||
}
|
||||
|
||||
static DECLFW(KG256WriteLo) {
|
||||
regs[A & 0x03] = V;
|
||||
Sync();
|
||||
}
|
||||
|
||||
static void KG256Power(void) {
|
||||
|
||||
regs[0] = 0;
|
||||
regs[1] = 0;
|
||||
regs[2] = 0;
|
||||
regs[3] = 0;
|
||||
|
||||
SetWriteHandler(0x8000, 0xFFFF, KG256WriteHi);
|
||||
SetWriteHandler(0x6000, 0x7FFF, KG256WriteLo);
|
||||
SetReadHandler(0x8000, 0xFFFF, CartBR);
|
||||
|
||||
Sync();
|
||||
|
||||
}
|
||||
|
||||
static void StateRestore(int version) {
|
||||
Sync();
|
||||
}
|
||||
|
||||
static void KG256Reset(void) {
|
||||
|
||||
regs[0] = 0;
|
||||
regs[1] = 0;
|
||||
regs[2] = 0;
|
||||
|
||||
Sync();
|
||||
}
|
||||
|
||||
void KG256_Init(CartInfo *info) {
|
||||
|
||||
Sync();
|
||||
|
||||
info->Power = KG256Power;
|
||||
info->Reset = KG256Reset;
|
||||
AddExState(&StateRegs, ~0, 0, 0);
|
||||
GameStateRestore = StateRestore;
|
||||
}
|
||||
|
||||
|
||||
|
||||
198
src/boards/NC7000M.c
Normal file
198
src/boards/NC7000M.c
Normal file
@@ -0,0 +1,198 @@
|
||||
/* FCE Ultra - NES/Famicom Emulator
|
||||
*
|
||||
* Copyright notice for this file:
|
||||
* Copyright (C) 2008 -2020 dragon2snow,loong2snow from www.nesbbs.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "mapinc.h"
|
||||
#include "mmc3.h"
|
||||
|
||||
|
||||
extern uint8 *WRAM;
|
||||
extern uint32 WRAMSIZE;
|
||||
|
||||
//extern uint8 *CHRRAM;
|
||||
//extern uint32 CHRRAMSIZE;
|
||||
|
||||
|
||||
uint8 mmc3_reg[8];
|
||||
uint8 exRegs[8];
|
||||
uint8 pointer;
|
||||
uint8 locked;
|
||||
uint8 readDIP;
|
||||
uint16 prgAND;
|
||||
uint16 chrAND;
|
||||
uint16 prgOR;
|
||||
uint16 chrOR;
|
||||
uint8 nrom;
|
||||
uint8 nrom256;
|
||||
uint16 reg;
|
||||
|
||||
|
||||
static SFORMAT NC7000M_StateRegs[] =
|
||||
{
|
||||
{ exRegs, 8, "REGS" },
|
||||
{ mmc3_reg, 8, "MMC3R" },
|
||||
{ &pointer, 1, "POINT" },
|
||||
{ &readDIP, 1, "RDIP" },
|
||||
{ &prgAND, 1, "PRGAND" },
|
||||
{ &chrAND, 1, "CHRAND" },
|
||||
{ &prgOR, 1, "PRGOR" },
|
||||
{ &chrOR, 1, "CHROR" },
|
||||
{ &nrom, 1, "NROM" },
|
||||
{ &nrom256, 1, "N256" },
|
||||
{ ®, 1, "REG" },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
void NC7000MAnalyzeReg()
|
||||
{
|
||||
locked = (reg & 0x80);
|
||||
prgAND = (reg & 0x08 ? 0x0F : 0x1F);
|
||||
chrAND = (reg & 0x40 ? 0x7F : 0xFF);
|
||||
prgOR = (reg << 4 & 0x30);
|
||||
chrOR = (reg << 3 & 0x080 | reg & 0x100);
|
||||
nrom = (reg & 0x20);
|
||||
nrom256 = (reg & 0x04);
|
||||
}
|
||||
|
||||
int NC7000MGetPRGBank(int bank)
|
||||
{
|
||||
if (~bank & 1 && (pointer & 0x40)) bank ^= 2;
|
||||
return bank & 2 ? 0xFE | bank & 1 : mmc3_reg[6 | bank & 1];
|
||||
}
|
||||
|
||||
void NC7000MSyncPRG_GNROM(int A14, int AND, int OR) {
|
||||
setprg8(0x8000, (NC7000MGetPRGBank(0) &~A14) &AND | OR);
|
||||
setprg8(0xA000, (NC7000MGetPRGBank(1) &~A14) &AND | OR);
|
||||
setprg8(0xC000, (NC7000MGetPRGBank(0) | A14) &AND | OR);
|
||||
setprg8(0xE000, (NC7000MGetPRGBank(1) | A14) &AND | OR);
|
||||
}
|
||||
|
||||
static void NC7000MCW(uint32 A, uint8 V) {
|
||||
|
||||
setchr1(A, (V & chrAND) | (chrOR &~chrAND));
|
||||
}
|
||||
|
||||
static void NC7000MPW(uint32 A, uint8 V) {
|
||||
|
||||
if (nrom)
|
||||
{
|
||||
NC7000MSyncPRG_GNROM(nrom256 ? 2 : 0, prgAND, prgOR &~prgAND);
|
||||
}
|
||||
else
|
||||
{
|
||||
setprg8(A, (prgOR &~prgAND) | (V & prgAND));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static DECLFW(NC7000MWriteHi) {
|
||||
|
||||
A = A & 0xE001;
|
||||
|
||||
if (A < 0xC000)
|
||||
{
|
||||
if(A==0x8000)
|
||||
pointer = MMC3_cmd ^ V;
|
||||
if(A==0x8001)
|
||||
mmc3_reg[MMC3_cmd & 0x07] = V;
|
||||
|
||||
MMC3_CMDWrite(A, V);
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
else
|
||||
{
|
||||
MMC3_IRQWrite(A, V);
|
||||
}
|
||||
}
|
||||
|
||||
static DECLFW(NC7000MWriteLo) {
|
||||
|
||||
if (!(reg & 0x80)) {
|
||||
reg = V | A & 0x100;
|
||||
NC7000MAnalyzeReg();
|
||||
FixMMC3PRG(MMC3_cmd);
|
||||
FixMMC3CHR(MMC3_cmd);
|
||||
}
|
||||
else
|
||||
{
|
||||
WRAM[A - 0x6000] = V;
|
||||
}
|
||||
}
|
||||
static DECLFR(NC7000MReadHi)
|
||||
{
|
||||
return CartBR(A);
|
||||
}
|
||||
|
||||
static void NC7000MPower(void) {
|
||||
mmc3_reg[0] = 0x00; mmc3_reg[1] = 0x02;
|
||||
mmc3_reg[2] = 0x04; mmc3_reg[3] = 0x05; mmc3_reg[4] = 0x06; mmc3_reg[5] = 0x07;
|
||||
mmc3_reg[6] = 0x00; mmc3_reg[7] = 0x01;
|
||||
|
||||
reg = 0x0000;
|
||||
|
||||
NC7000MAnalyzeReg();
|
||||
|
||||
GenMMC3Power();
|
||||
SetWriteHandler(0x6000, 0x7FFF, NC7000MWriteLo);
|
||||
SetWriteHandler(0x8000, 0xFFFF, NC7000MWriteHi);
|
||||
}
|
||||
|
||||
static void NC7000MReset(void) {
|
||||
|
||||
mmc3_reg[0] = 0x00; mmc3_reg[1] = 0x02;
|
||||
mmc3_reg[2] = 0x04; mmc3_reg[3] = 0x05; mmc3_reg[4] = 0x06; mmc3_reg[5] = 0x07;
|
||||
mmc3_reg[6] = 0x00; mmc3_reg[7] = 0x01;
|
||||
|
||||
reg = 0x0000;
|
||||
|
||||
NC7000MAnalyzeReg();
|
||||
|
||||
MMC3RegReset();
|
||||
}
|
||||
static void NC7000MClose(void) {
|
||||
if (WRAM)
|
||||
FCEU_gfree(WRAM);
|
||||
WRAM = NULL;
|
||||
}
|
||||
|
||||
void NC7000M_Init(CartInfo *info) {
|
||||
GenMMC3_Init(info, 512, 512, 0, 0);
|
||||
pwrap = NC7000MPW;
|
||||
cwrap = NC7000MCW;
|
||||
info->Power = NC7000MPower;
|
||||
info->Reset = NC7000MReset;
|
||||
info->Close = NC7000MClose;
|
||||
|
||||
WRAMSIZE = 8192;
|
||||
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
|
||||
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
|
||||
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
|
||||
|
||||
//CHRRAMSIZE = 8192;
|
||||
//CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
|
||||
//SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
|
||||
//AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR");
|
||||
|
||||
AddExState(EXPREGS, 3, 0, "EXPR");
|
||||
AddExState(NC7000M_StateRegs, ~0, 0, 0);
|
||||
}
|
||||
@@ -580,3 +580,35 @@ static void BMCSA005ASync(void) {
|
||||
void BMCSA005A_Init(CartInfo *info) {
|
||||
Latch_Init(info, BMCSA005ASync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
|
||||
//-------------- 831019C J-2282 ------------------------
|
||||
|
||||
static void J2282Sync(void) {
|
||||
setchr8(0);
|
||||
|
||||
if ((latche & 0x40))
|
||||
{
|
||||
uint8 bank = (latche >> 0) & 0x1F;
|
||||
setprg16(0x8000, bank);
|
||||
setprg16(0xC000, bank);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (latche & 0x800)
|
||||
{
|
||||
setprg8(0x6000, ((latche << 1) & 0x3F) | 3);
|
||||
}
|
||||
uint8 bank = (latche >> 1) & 0x1F;
|
||||
setprg32(0x8000, bank);
|
||||
}
|
||||
|
||||
if (latche & 0x80)
|
||||
setmirror(0);
|
||||
else
|
||||
setmirror(1);
|
||||
}
|
||||
|
||||
void J2282_Init(CartInfo *info) {
|
||||
Latch_Init(info, J2282Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user