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Backport r172 - cheat ram fix sync with FCEUX

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This commit is contained in:
Oggom
2015-06-28 03:38:55 +02:00
parent f4ce9b6d7a
commit 254ebe5436
47 changed files with 266 additions and 178 deletions
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1
src/boards/112.c
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@@ -72,6 +72,7 @@ static void M112Power(void) {
SetWriteHandler(0x4020, 0x5FFF, M112Write);
SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(8, 0x6000, WRAM);
}
static void StateRestore(int version) {

2
src/boards/15.c
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@@ -76,6 +76,7 @@ static void M15Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x8000, 0xFFFF, M15Write);
SetReadHandler(0x8000, 0xFFFF, CartBR);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
Sync();
}
@@ -99,7 +100,6 @@ void Mapper15_Init(CartInfo *info) {
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
if (info->battery) {
info->SaveGame[0] = WRAM;
info->SaveGameLen[0] = WRAMSIZE;

1
src/boards/156.c
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@@ -92,6 +92,7 @@ static void M156Power(void) {
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0xC000, 0xCFFF, M156Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M156Close(void) {

9
src/boards/164.c
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@@ -351,7 +351,7 @@ static DECLFR(ReadLow) {
case 0x5100: return reg[2] | reg[0] | reg[1] | reg[3] ^ 0xff; break;
case 0x5500:
if (trigger)
return reg[2] | reg[1]; // Lei Dian Huang Bi Ka Qiu Chuan Shuo (NJ046) may broke other games
return reg[2] | reg[1]; // Lei Dian Huang Bi Ka Qiu Chuan Shuo (NJ046) may broke other games
else
return 0;
}
@@ -368,7 +368,7 @@ static void M163HB(void) {
setchr4(0x1000, 1);
}
/*
if(scanline>=127) // Hu Lu Jin Gang (NJ039) (Ch) [!] don't like it
if(scanline>=127) // Hu Lu Jin Gang (NJ039) (Ch) [!] don't like it
{
setchr4(0x0000,1);
setchr4(0x1000,1);
@@ -397,6 +397,7 @@ static void Power(void) {
SetWriteHandler(0x5000, 0x5FFF, Write);
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
WSync();
}
@@ -431,7 +432,7 @@ static DECLFW(Write2) {
trigger ^= 1;
}
laststrobe = V;
} else if (A == 0x5100 && V == 6) //damn thoose protected games
} else if (A == 0x5100 && V == 6) //damn thoose protected games
setprg32(0x8000, 3);
else
switch (A & 0x7300) {
@@ -450,6 +451,7 @@ static void Power2(void) {
SetWriteHandler(0x5000, 0x5FFF, Write2);
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
WSync();
}
@@ -503,6 +505,7 @@ static void Power3(void) {
SetWriteHandler(0x5000, 0x5FFF, Write3);
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
WSync();
}

1
src/boards/177.c
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@@ -50,6 +50,7 @@ static void M177Power(void) {
SetWriteHandler(0x6000, 0x7fff, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, M177Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M177Close(void) {

1
src/boards/178.c
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@@ -133,6 +133,7 @@ static void M178Power(void) {
SetReadHandler(0x6000, 0x7fff, CartBR);
SetWriteHandler(0x6000, 0x7fff, CartBW);
SetReadHandler(0x8000, 0xffff, CartBR);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M178SndClk(int a) {

1
src/boards/18.c
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@@ -89,6 +89,7 @@ static void M18Power(void) {
SetWriteHandler(0x8000, 0x9FFF, M18WritePrg);
SetWriteHandler(0xA000, 0xDFFF, M18WriteChr);
SetWriteHandler(0xE000, 0xFFFF, M18WriteIRQ);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void FP_FASTAPASS(1) M18IRQHook(int a) {

1
src/boards/186.c
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@@ -69,6 +69,7 @@ static void M186Power(void) {
SetWriteHandler(0x4200, 0x43FF, M186Write);
SetReadHandler(0x4400, 0x4FFF, ASWRAM);
SetWriteHandler(0x4400, 0x4FFF, BSWRAM);
FCEU_CheatAddRAM(32, 0x6000, WRAM);
regs[0] = regs[1] = regs[2] = regs[3];
Sync();
}

1
src/boards/228.c
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@@ -61,6 +61,7 @@ static DECLFW(M228Write) {
static void M228Reset(void) {
areg = 0x8000;
vreg = 0;
memset(mram, 0, sizeof(mram));
Sync();
}

1
src/boards/246.c
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@@ -54,6 +54,7 @@ static void M246Power(void) {
SetReadHandler(0x6800, 0x6FFF, CartBR);
SetWriteHandler(0x6800, 0x6FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M246Close(void) {

1
src/boards/252.c
View File

@@ -80,6 +80,7 @@ static void M252Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, M252Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M252IRQ(int a) {

1
src/boards/253.c
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@@ -96,6 +96,7 @@ static void M253Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, M253Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M253Close(void) {

1
src/boards/32.c
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@@ -75,6 +75,7 @@ static void M32Power(void) {
SetWriteHandler(0x9000, 0x9FFF, M32Write1);
SetWriteHandler(0xA000, 0xAFFF, M32Write2);
SetWriteHandler(0xB000, 0xBFFF, M32Write3);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M32Close(void) {

1
src/boards/34.c
View File

@@ -66,6 +66,7 @@ static void M34Power(void) {
SetWriteHandler(0x6000, 0x7ffc, CartBW);
SetReadHandler(0x8000, 0xffff, CartBR);
SetWriteHandler(0x7ffd, 0xffff, M34Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M34Close(void) {

1
src/boards/68.c
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@@ -134,6 +134,7 @@ static void M68Power(void) {
SetWriteHandler(0xF000, 0xFFFF, M68WriteROM);
SetWriteHandler(0x6000, 0x6000, M68WriteLo);
SetWriteHandler(0x6001, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M68Close(void) {

4
src/boards/69.c
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@@ -2,6 +2,7 @@
*
* Copyright notice for this file:
* Copyright (C) 2012 CaH4e3
* Copyright (C) 2002 Xodnizel
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -166,7 +167,7 @@ static void DoAYSQ(int x) {
}
static void DoAYSQHQ(int x) {
int32 V;
uint32 V;
int32 freq = ((sreg[x << 1] | ((sreg[(x << 1) + 1] & 15) << 8)) + 1) << 4;
int32 amp = (sreg[0x8 + x] & 15) << 6;
@@ -231,6 +232,7 @@ static void M69Power(void) {
SetWriteHandler(0xA000, 0xBFFF, M69Write1);
SetWriteHandler(0xC000, 0xDFFF, M69SWrite0);
SetWriteHandler(0xE000, 0xFFFF, M69SWrite1);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M69Close(void) {

1
src/boards/79.c
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@@ -2,6 +2,7 @@
*
* Copyright notice for this file:
* Copyright (C) 2012 CaH4e3
* Copyright (C) 2002 Xodnizel
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

1
src/boards/80.c
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@@ -2,6 +2,7 @@
*
* Copyright notice for this file:
* Copyright (C) 2012 CaH4e3
* Copyright (C) 2002 Xodnizel
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

1
src/boards/82.c
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@@ -68,6 +68,7 @@ static void M82Power(void) {
SetReadHandler(0x6000, 0xffff, CartBR);
SetWriteHandler(0x6000, 0x7fff, CartBW);
SetWriteHandler(0x7ef0, 0x7efc, M82Write); // external WRAM might end at $73FF
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M82Close(void) {

1
src/boards/99.c
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@@ -51,6 +51,7 @@ static void M99Power(void) {
SetWriteHandler(0x4016, 0x4016, M99Write);
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M99Close(void) {

1
src/boards/KS7012.c
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@@ -54,6 +54,7 @@ static void UNLKS7012Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, UNLKS7012Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void UNLKS7012Reset(void) {

1
src/boards/KS7017.c
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@@ -87,6 +87,7 @@ static void UNLKS7017Power(void) {
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x4030, 0x4030, FDSRead4030);
SetWriteHandler(0x4020, 0x5FFF, UNLKS7017Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void UNLKS7017Close(void) {

1
src/boards/KS7037.c
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@@ -82,6 +82,7 @@ static void LH10Power(void) {
SetWriteHandler(0x8000, 0xBFFF, UNLKS7037Write);
SetWriteHandler(0xC000, 0xDFFF, CartBW);
SetWriteHandler(0xE000, 0xFFFF, UNLKS7037Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void Close(void) {

1
src/boards/addrlatch.c
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@@ -44,6 +44,7 @@ static void LatchPower(void) {
if (WRAM) {
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
} else
SetReadHandler(0x6000, 0xFFFF, defread);
SetWriteHandler(addrreg0, addrreg1, LatchWrite);

2
src/boards/bandai.c
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@@ -2,6 +2,7 @@
*
* Copyright notice for this file:
* Copyright (C) 2007 CaH4e3
* Copyright (C) 2011 FCEUX team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -269,6 +270,7 @@ static void M153Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, BandaiWrite);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}

7
src/boards/coolboy.c
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@@ -1,4 +1,4 @@
/* FCE Ultra - NES/Famicom Emulator
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
* Copyright (C) 2015 CaH4e3
@@ -45,12 +45,9 @@ static void COOLBOYCW(uint32 A, uint8 V) {
}
static void COOLBOYPW(uint32 A, uint8 V) {
uint32 mask, shift;
uint32 mask = 0x3F;
uint32 base = ((EXPREGS[0] & 0x07) >> 0) | ((EXPREGS[1] & 0x10) >> 1) | ((EXPREGS[1] & 0x0C) << 2) | ((EXPREGS[0] & 0x30) << 2);
switch(EXPREGS[0] & 0xC0) {
case 0x00:
mask = 0x3F;
break;
case 0x80:
mask = 0x1F;
break;

1
src/boards/dance2000.c
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@@ -70,6 +70,7 @@ static void UNLD2000Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, UNLD2000Read);
SetWriteHandler(0x5000, 0x5FFF, UNLD2000Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void FP_FASTAPASS(1) UNL2000Hook(uint32 A) {

4
src/boards/datalatch.c
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@@ -19,6 +19,7 @@
*/
#include "mapinc.h"
#include "../ines.h"
static uint8 latche, latcheinit, bus_conflict;
static uint16 addrreg0, addrreg1;
@@ -41,6 +42,7 @@ static void LatchPower(void) {
if (WRAM) {
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
} else {
SetReadHandler(0x8000, 0xFFFF, CartBR);
}
@@ -99,6 +101,8 @@ static void NROMPower(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
#ifdef DEBUG_MAPPER
SetWriteHandler(0x4020, 0xFFFF, NROMWrite);
#endif

1
src/boards/edu2000.c
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@@ -48,6 +48,7 @@ static void UNLEDU2000Power(void) {
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0xFFFF, CartBW);
SetWriteHandler(0x8000, 0xFFFF, UNLEDU2000HiWrite);
FCEU_CheatAddRAM(32, 0x6000, WRAM);
reg = 0;
Sync();
}

14
src/boards/famicombox.c
View File

@@ -53,14 +53,14 @@ static DECLFW(SSSNROMWrite) {
static DECLFR(SSSNROMRead) {
// FCEU_printf("read %04x\n",A);
switch (A & 7) {
case 0: return regs[0] = 0xff; // clear all exceptions
case 0: return regs[0] = 0xff; // clear all exceptions
case 2: return 0xc0; // DIP selftest + freeplay
case 3: return 0x00; // 0, 1 - attract
// 2
// 4 - menu
// 8 - self check and game casette check
// 10 - lock?
// 20 - game title & count display
// 2
// 4 - menu
// 8 - self check and game casette check
// 10 - lock?
// 20 - game title & count display
case 7: return 0x22; // TV type, key not turned, relay B
default: return 0;
}
@@ -79,6 +79,7 @@ static void SSSNROMPower(void) {
SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void SSSNROMReset(void) {
@@ -109,7 +110,6 @@ void SSSNROM_Init(CartInfo *info) {
WRAMSIZE = 16384;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0);
}

1
src/boards/ffe.c
View File

@@ -102,6 +102,7 @@ static void FFEPower(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, FFEWriteLatch);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void FP_FASTAPASS(1) FFEIRQHook(int a) {

1
src/boards/lh32.c
View File

@@ -52,6 +52,7 @@ static void LH32Power(void) {
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0xC000, 0xDFFF, CartBW);
SetWriteHandler(0x6000, 0x6000, LH32Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void LH32Close(void) {

1
src/boards/lh53.c
View File

@@ -80,6 +80,7 @@ static void LH53Power(void) {
SetWriteHandler(0xB800, 0xD7FF, LH53RamWrite);
SetWriteHandler(0xE000, 0xEFFF, LH53IRQaWrite);
SetWriteHandler(0xF000, 0xFFFF, LH53Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void LH53Close(void) {

2
src/boards/mmc2and4.c
View File

@@ -2,6 +2,7 @@
*
* Copyright notice for this file:
* Copyright (C) 2012 CaH4e3
* Copyright (C) 2002 Xodnizel
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -94,6 +95,7 @@ static void MMC2and4Power(void) {
if (is10) {
SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0xA000, 0xFFFF, MMC2and4Write);

325
src/boards/mmc5.c
View File

@@ -78,7 +78,7 @@ static uint8 PRGBanks[4];
static uint8 WRAMPage;
static uint16 CHRBanksA[8], CHRBanksB[4];
static uint8 WRAMMaskEnable[2];
uint8 mmc5ABMode; /* A=0, B=1 */
uint8 mmc5ABMode; /* A=0, B=1 */
static uint8 IRQScanline, IRQEnable;
static uint8 CHRMode, NTAMirroring, NTFill, ATFill;
@@ -88,12 +88,13 @@ static uint8 MMC5LineCounter;
static uint8 mmc5psize, mmc5vsize;
static uint8 mul[2];
static uint32 WRAMSIZE = 0;
static uint8 *WRAM = NULL;
static uint8 *MMC5fill = NULL;
static uint8 *ExRAM = NULL;
static uint8 MMC5WRAMsize;
static uint8 MMC5WRAMIndex[8];
static uint8 MMC5WRAMsize; //configuration, not state
static uint8 MMC5WRAMIndex[8]; //configuration, not state
static uint8 MMC5ROMWrProtect[4];
static uint8 MMC5MemIn[5];
@@ -108,32 +109,32 @@ typedef struct __cartdata {
cartdata MMC5CartList[] =
{
{ 0x6f4e4312, 4 }, /* Aoki Ookami to Shiroki Mejika - Genchou Hishi */
{ 0x15fe6d0f, 2 }, /* Bandit Kings of Ancient China */
{ 0x671f23a8, 0 }, /* Castlevania III - Dracula's Curse (E) */
{ 0xcd4e7430, 0 }, /* Castlevania III - Dracula's Curse (KC) */
{ 0xed2465be, 0 }, /* Castlevania III - Dracula's Curse (U) */
{ 0xfe3488d1, 2 }, /* Daikoukai Jidai */
{ 0x0ec6c023, 1 }, /* Gemfire */
{ 0x0afb395e, 0 }, /* Gun Sight */
{ 0x1ced086f, 2 }, /* Ishin no Arashi */
{ 0x9cbadc25, 1 }, /* Just Breed */
{ 0x6396b988, 2 }, /* L'Empereur (J) */
{ 0x9c18762b, 2 }, /* L'Empereur (U) */
{ 0xb0480ae9, 0 }, /* Laser Invasion */
{ 0xb4735fac, 0 }, /* Metal Slader Glory */
{ 0xf540677b, 4 }, /* Nobunaga no Yabou - Bushou Fuuun Roku */
{ 0xeee9a682, 2 }, /* Nobunaga no Yabou - Sengoku Gunyuu Den (J) (PRG0) */
{ 0xf9b4240f, 2 }, /* Nobunaga no Yabou - Sengoku Gunyuu Den (J) (PRG1) */
{ 0x8ce478db, 2 }, /* Nobunaga's Ambition 2 */
{ 0xf011e490, 4 }, /* Romance of The Three Kingdoms II */
{ 0xbc80fb52, 1 }, /* Royal Blood */
{ 0x184c2124, 4 }, /* Sangokushi II (J) (PRG0) */
{ 0xee8e6553, 4 }, /* Sangokushi II (J) (PRG1) */
{ 0xd532e98f, 1 }, /* Shin 4 Nin Uchi Mahjong - Yakuman Tengoku */
{ 0x39f2ce4b, 2 }, /* Suikoden - Tenmei no Chikai */
{ 0xbb7f829a, 0 }, /* Uchuu Keibitai SDF */
{ 0xaca15643, 2 }, /* Uncharted Waters */
{ 0x6f4e4312, 4 }, /* Aoki Ookami to Shiroki Mejika - Genchou Hishi */
{ 0x15fe6d0f, 2 }, /* Bandit Kings of Ancient China */
{ 0x671f23a8, 0 }, /* Castlevania III - Dracula's Curse (E) */
{ 0xcd4e7430, 0 }, /* Castlevania III - Dracula's Curse (KC) */
{ 0xed2465be, 0 }, /* Castlevania III - Dracula's Curse (U) */
{ 0xfe3488d1, 2 }, /* Daikoukai Jidai */
{ 0x0ec6c023, 1 }, /* Gemfire */
{ 0x0afb395e, 0 }, /* Gun Sight */
{ 0x1ced086f, 2 }, /* Ishin no Arashi */
{ 0x9cbadc25, 1 }, /* Just Breed */
{ 0x6396b988, 2 }, /* L'Empereur (J) */
{ 0x9c18762b, 2 }, /* L'Empereur (U) */
{ 0xb0480ae9, 0 }, /* Laser Invasion */
{ 0xb4735fac, 0 }, /* Metal Slader Glory */
{ 0xf540677b, 4 }, /* Nobunaga no Yabou - Bushou Fuuun Roku */
{ 0xeee9a682, 2 }, /* Nobunaga no Yabou - Sengoku Gunyuu Den (J) (PRG0) */
{ 0xf9b4240f, 2 }, /* Nobunaga no Yabou - Sengoku Gunyuu Den (J) (PRG1) */
{ 0x8ce478db, 2 }, /* Nobunaga's Ambition 2 */
{ 0xf011e490, 4 }, /* Romance of The Three Kingdoms II */
{ 0xbc80fb52, 1 }, /* Royal Blood */
{ 0x184c2124, 4 }, /* Sangokushi II (J) (PRG0) */
{ 0xee8e6553, 4 }, /* Sangokushi II (J) (PRG1) */
{ 0xd532e98f, 1 }, /* Shin 4 Nin Uchi Mahjong - Yakuman Tengoku */
{ 0x39f2ce4b, 2 }, /* Suikoden - Tenmei no Chikai */
{ 0xbb7f829a, 0 }, /* Uchuu Keibitai SDF */
{ 0xaca15643, 2 }, /* Uncharted Waters */
};
#define MMC5_NOCARTS (sizeof(MMC5CartList) / sizeof(MMC5CartList[0]))
@@ -141,7 +142,7 @@ int DetectMMC5WRAMSize(uint32 crc32) {
int x;
for (x = 0; x < MMC5_NOCARTS; x++) {
if (crc32 == MMC5CartList[x].crc32) {
if (MMC5CartList[x].size > 1)
if(MMC5CartList[x].size > 1)
FCEU_printf(" >8KB external WRAM present. Use UNIF if you hack the ROM image.\n");
return(MMC5CartList[x].size * 8);
}
@@ -153,11 +154,11 @@ static void BuildWRAMSizeTable(void) {
int x;
for (x = 0; x < 8; x++) {
switch (MMC5WRAMsize) {
case 0: MMC5WRAMIndex[x] = 255; break; //X,X,X,X,X,X,X,X
case 1: MMC5WRAMIndex[x] = (x > 3) ? 255 : 0; break; //0,0,0,0,X,X,X,X
case 2: MMC5WRAMIndex[x] = (x & 4) >> 2; break; //0,0,0,0,1,1,1,1
case 4: MMC5WRAMIndex[x] = (x > 3) ? 255 : (x & 3); break; //0,1,2,3,X,X,X,X
case 8: MMC5WRAMIndex[x] = x; break; //0,1,2,3,4,5,6,7
case 0: MMC5WRAMIndex[x] = 255; break; //X,X,X,X,X,X,X,X
case 1: MMC5WRAMIndex[x] = (x > 3) ? 255 : 0; break; //0,0,0,0,X,X,X,X
case 2: MMC5WRAMIndex[x] = (x & 4) >> 2; break; //0,0,0,0,1,1,1,1
case 4: MMC5WRAMIndex[x] = (x > 3) ? 255 : (x & 3); break; //0,1,2,3,X,X,X,X
case 8: MMC5WRAMIndex[x] = x; break; //0,1,2,3,4,5,6,7
}
}
}
@@ -189,7 +190,7 @@ static void MMC5CHRA(void) {
for (x = 0; x < 8; x++) {
setchr1(x << 10, CHRBanksA[x]);
MMC5SPRVROM_BANK1(x << 10, CHRBanksA[x]);
}
}
break;
}
}
@@ -221,7 +222,7 @@ static void MMC5CHRB(void) {
for (x = 0; x < 8; x++) {
setchr1(x << 10, CHRBanksB[x & 3]);
MMC5BGVROM_BANK1(x << 10, CHRBanksB[x & 3]);
}
}
break;
}
}
@@ -230,6 +231,7 @@ static void FASTAPASS(2) MMC5WRAM(uint32 A, uint32 V) {
V = MMC5WRAMIndex[V & 7];
if (V != 255) {
setprg8r(0x10, A, V);
FCEU_CheatAddRAM(8, 0x6000, (WRAM + ((V * 8192) & (WRAMSIZE - 1))));
MMC5MemIn[(A - 0x6000) >> 13] = 1;
} else
MMC5MemIn[(A - 0x6000) >> 13] = 0;
@@ -299,96 +301,96 @@ static void MMC5PRG(void) {
static DECLFW(Mapper5_write) {
switch (A) {
case 0x5100:
mmc5psize = V;
MMC5PRG();
break;
case 0x5101:
mmc5vsize = V;
if (!mmc5ABMode) {
MMC5CHRB();
MMC5CHRA();
} else {
MMC5CHRA();
MMC5CHRB();
}
break;
case 0x5102:
WRAMMaskEnable[0] = V;
break;
case 0x5103:
WRAMMaskEnable[1] = V;
break;
case 0x5104:
CHRMode = V;
MMC5HackCHRMode = V & 3;
break;
case 0x5105:
{
int x;
for (x = 0; x < 4; x++) {
switch ((V >> (x << 1)) & 3) {
case 0: PPUNTARAM |= 1 << x; vnapage[x] = NTARAM; break;
case 1: PPUNTARAM |= 1 << x; vnapage[x] = NTARAM + 0x400; break;
case 2: PPUNTARAM |= 1 << x; vnapage[x] = ExRAM; break;
case 3: PPUNTARAM &= ~(1 << x); vnapage[x] = MMC5fill; break;
case 0x5100:
mmc5psize = V;
MMC5PRG();
break;
case 0x5101:
mmc5vsize = V;
if (!mmc5ABMode) {
MMC5CHRB();
MMC5CHRA();
} else {
MMC5CHRA();
MMC5CHRB();
}
break;
case 0x5102:
WRAMMaskEnable[0] = V;
break;
case 0x5103:
WRAMMaskEnable[1] = V;
break;
case 0x5104:
CHRMode = V;
MMC5HackCHRMode = V & 3;
break;
case 0x5105:
{
int x;
for (x = 0; x < 4; x++) {
switch ((V >> (x << 1)) & 3) {
case 0: PPUNTARAM |= 1 << x; vnapage[x] = NTARAM; break;
case 1: PPUNTARAM |= 1 << x; vnapage[x] = NTARAM + 0x400; break;
case 2: PPUNTARAM |= 1 << x; vnapage[x] = ExRAM; break;
case 3: PPUNTARAM &= ~(1 << x); vnapage[x] = MMC5fill; break;
}
}
NTAMirroring = V;
break;
}
NTAMirroring = V;
break;
}
case 0x5106:
if (V != NTFill)
FCEU_dwmemset(MMC5fill, (V | (V << 8) | (V << 16) | (V << 24)), 0x3c0);
NTFill = V;
break;
case 0x5107:
if (V != ATFill) {
unsigned char moop = V | (V << 2) | (V << 4) | (V << 6);
FCEU_dwmemset(MMC5fill + 0x3c0, moop | (moop << 8) | (moop << 16) | (moop << 24), 0x40);
case 0x5106:
if (V != NTFill)
FCEU_dwmemset(MMC5fill, (V | (V << 8) | (V << 16) | (V << 24)), 0x3c0);
NTFill = V;
break;
case 0x5107:
if (V != ATFill) {
unsigned char moop = V | (V << 2) | (V << 4) | (V << 6);
FCEU_dwmemset(MMC5fill + 0x3c0, moop | (moop << 8) | (moop << 16) | (moop << 24), 0x40);
}
ATFill = V;
break;
case 0x5113:
WRAMPage = V;
MMC5WRAM(0x6000, V & 7);
break;
case 0x5114:
case 0x5115:
case 0x5116:
case 0x5117:
PRGBanks[A & 3] = V;
MMC5PRG();
break;
case 0x5120:
case 0x5121:
case 0x5122:
case 0x5123:
case 0x5124:
case 0x5125:
case 0x5126:
case 0x5127:
mmc5ABMode = 0;
CHRBanksA[A & 7] = V | ((MMC50x5130 & 0x3) << 8);
MMC5CHRA();
break;
case 0x5128:
case 0x5129:
case 0x512a:
case 0x512b:
mmc5ABMode = 1;
CHRBanksB[A & 3] = V | ((MMC50x5130 & 0x3) << 8);
MMC5CHRB();
break;
case 0x5130: MMC50x5130 = V; break;
case 0x5200: MMC5HackSPMode = V; break;
case 0x5201: MMC5HackSPScroll = (V >> 3) & 0x1F; break;
case 0x5202: MMC5HackSPPage = V & 0x3F; break;
case 0x5203: X6502_IRQEnd(FCEU_IQEXT); IRQScanline = V; break;
case 0x5204: X6502_IRQEnd(FCEU_IQEXT); IRQEnable = V & 0x80; break;
case 0x5205: mul[0] = V; break;
case 0x5206: mul[1] = V; break;
}
ATFill = V;
break;
case 0x5113:
WRAMPage = V;
MMC5WRAM(0x6000, V & 7);
break;
case 0x5114:
case 0x5115:
case 0x5116:
case 0x5117:
PRGBanks[A & 3] = V;
MMC5PRG();
break;
case 0x5120:
case 0x5121:
case 0x5122:
case 0x5123:
case 0x5124:
case 0x5125:
case 0x5126:
case 0x5127:
mmc5ABMode = 0;
CHRBanksA[A & 7] = V | ((MMC50x5130 & 0x3) << 8);
MMC5CHRA();
break;
case 0x5128:
case 0x5129:
case 0x512a:
case 0x512b:
mmc5ABMode = 1;
CHRBanksB[A & 3] = V | ((MMC50x5130 & 0x3) << 8);
MMC5CHRB();
break;
case 0x5130: MMC50x5130 = V; break;
case 0x5200: MMC5HackSPMode = V; break;
case 0x5201: MMC5HackSPScroll = (V >> 3) & 0x1F; break;
case 0x5202: MMC5HackSPPage = V & 0x3F; break;
case 0x5203: X6502_IRQEnd(FCEU_IQEXT); IRQScanline = V; break;
case 0x5204: X6502_IRQEnd(FCEU_IQEXT); IRQEnable = V & 0x80; break;
case 0x5205: mul[0] = V; break;
case 0x5206: mul[1] = V; break;
}
}
static DECLFR(MMC5_ReadROMRAM) {
@@ -400,7 +402,7 @@ static DECLFR(MMC5_ReadROMRAM) {
static DECLFW(MMC5_WriteROMRAM) {
if ((A >= 0x8000) && (MMC5ROMWrProtect[(A - 0x8000) >> 13]))
return;
return;
if (MMC5MemIn[(A - 0x6000) >> 13])
if (((WRAMMaskEnable[0] & 3) | ((WRAMMaskEnable[1] & 3) << 2)) == 6)
Page[A >> 11][A] = V;
@@ -426,7 +428,7 @@ static DECLFR(MMC5_read) {
#endif
MMC5IRQR &= 0x40;
return x;
}
}
case 0x5205:
return(mul[0] * mul[1]);
case 0x5206:
@@ -455,31 +457,56 @@ void MMC5Synco(void) {
MMC5CHRA();
MMC5CHRB();
}
//in case the fill register changed, we need to overwrite the fill buffer
FCEU_dwmemset(MMC5fill, NTFill | (NTFill << 8) | (NTFill << 16) | (NTFill << 24), 0x3c0);
{
unsigned char moop = ATFill | (ATFill << 2) | (ATFill << 4) | (ATFill << 6);
FCEU_dwmemset(MMC5fill + 0x3c0, moop | (moop << 8) | (moop << 16) | (moop << 24), 0x40);
}
X6502_IRQEnd(FCEU_IQEXT);
MMC5HackCHRMode = CHRMode & 3;
//zero 17-apr-2013 - why the heck should this happen here? anything in a `synco` should be depending on the state.
//im going to leave it commented out to see what happens
//X6502_IRQEnd(FCEU_IQEXT);
}
void MMC5_hb(int scanline) {
if (scanline == 240) {
//zero 24-jul-2014 - revised for newer understanding, to fix metal slader glory credits. see r7371 in bizhawk
int sl = scanline + 1;
int ppuon = (PPU[1] & 0x18);
if (!ppuon || sl >= 241)
{
// whenever rendering is off for any reason (vblank or forced disable
// the irq counter resets, as well as the inframe flag (easily verifiable from software)
MMC5IRQR &= ~0x40;
MMC5IRQR &= ~0x80;
MMC5LineCounter = 0;
MMC5IRQR = 0x40;
X6502_IRQEnd(FCEU_IQEXT);
return;
}
if (MMC5LineCounter < 240) {
if (MMC5LineCounter == IRQScanline) {
if (!(MMC5IRQR&0x40))
{
MMC5IRQR |= 0x40;
MMC5IRQR &= ~0x80;
MMC5LineCounter = 0;
X6502_IRQEnd(FCEU_IQEXT);
}
else
{
MMC5LineCounter++;
if (MMC5LineCounter == IRQScanline)
{
MMC5IRQR |= 0x80;
if (IRQEnable & 0x80)
X6502_IRQBegin(FCEU_IQEXT);
}
MMC5LineCounter++;
}
if (MMC5LineCounter == 240)
MMC5IRQR = 0;
}
void MMC5_StateRestore(int version) {
@@ -617,7 +644,7 @@ static void Do5SQHQ(int P) {
if (dc < rthresh)
WaveHi[V] += amp;
vc--;
if (vc <= 0) { /* Less than zero when first started. */
if (vc <= 0) { /* Less than zero when first started. */
vc = wl;
dc = (dc + 1) & 7;
}
@@ -682,8 +709,11 @@ void NSFMMC5_Init(void) {
}
void NSFMMC5_Close(void) {
if (WRAM)
FCEU_gfree(WRAM);
WRAM = NULL;
FCEU_gfree(ExRAM);
ExRAM = 0;
ExRAM = NULL;
}
static void GenMMC5Reset(void) {
@@ -715,7 +745,7 @@ static void GenMMC5Reset(void) {
SetReadHandler(0x5205, 0x5206, MMC5_read);
// GameHBIRQHook=MMC5_hb;
FCEU_CheatAddRAM(8, 0x6000, WRAM);
// FCEU_CheatAddRAM(8, 0x6000, WRAM);
FCEU_CheatAddRAM(1, 0x5c00, ExRAM);
}
@@ -733,6 +763,15 @@ static SFORMAT MMC5_StateRegs[] = {
{ &NTFill, 1, "NTFL" },
{ &ATFill, 1, "ATFL" },
//zero 17-apr-2013 - added
{ &MMC5IRQR, 1, "IRQR" },
{ &MMC5LineCounter, 1, "LCTR" },
{ &mmc5psize, 1, "PSIZ" },
{ &mmc5vsize, 1, "VSIZ" },
{ mul, 2, "MUL2" },
{ MMC5ROMWrProtect, 4, "WRPR" },
{ MMC5MemIn, 5, "MEMI" },
{ &MMC5Sound.wl[0], 2 | FCEUSTATE_RLSB, "SDW0" },
{ &MMC5Sound.wl[1], 2 | FCEUSTATE_RLSB, "SDW1" },
{ MMC5Sound.env, 2, "SDEV" },
@@ -740,6 +779,15 @@ static SFORMAT MMC5_StateRegs[] = {
{ &MMC5Sound.running, 1, "SDRU" },
{ &MMC5Sound.raw, 1, "SDRW" },
{ &MMC5Sound.rawcontrol, 1, "SDRC" },
//zero 17-apr-2013 - added
{ &MMC5Sound.dcount[0], 4 | FCEUSTATE_RLSB, "DCT0" },
{ &MMC5Sound.dcount[1], 4 | FCEUSTATE_RLSB, "DCT1" },
{ &MMC5Sound.BC[0], 4 | FCEUSTATE_RLSB, "BC00" },
{ &MMC5Sound.BC[1], 4 | FCEUSTATE_RLSB, "BC01" },
{ &MMC5Sound.BC[2], 4 | FCEUSTATE_RLSB, "BC02" },
{ &MMC5Sound.vcount[0], 4 | FCEUSTATE_RLSB, "VCT0" },
{ &MMC5Sound.vcount[1], 4 | FCEUSTATE_RLSB, "VCT1" },
{ 0 }
};
@@ -783,7 +831,8 @@ static void GenMMC5_Init(CartInfo *info, int wsize, int battery) {
}
void Mapper5_Init(CartInfo *info) {
GenMMC5_Init(info, DetectMMC5WRAMSize(info->CRC32), info->battery);
WRAMSIZE = DetectMMC5WRAMSize(info->CRC32);
GenMMC5_Init(info, WRAMSIZE, info->battery);
}
// ELROM seems to have 0KB of WRAM

22
src/boards/onebus.c
View File

@@ -79,7 +79,6 @@ static void PSync(void) {
uint8 bank2 = (cpu410x[0xb] & 0x40) ? (cpu410x[0x9]) : (~1);
uint8 bank3 = ~0;
// FCEU_printf(" PRG OFFSET: %08x\n", (block | (bank0 & mask)) * 8192);
// FCEU_printf(" PRG: %04x [%02x]",0x8000^pswap,block | (bank0 & mask));
setprg8(0x8000 ^ pswap, block | (bank0 & mask));
// FCEU_printf(" %04x [%02x]",0xa000^pswap,block | (bank1 & mask));
@@ -105,22 +104,13 @@ static void CSync(void) {
uint8 bank6 = ppu201x[0x4];
uint8 bank7 = ppu201x[0x5];
// FCEU_printf(" CHR OFFSET: %08x\n", (block | (bank0 & mask)) * 1024);
// FCEU_printf(" CHR: %04x [%02x]", 0x0000^cswap,block | (bank0 & mask));
setchr1(0x0000 ^ cswap, block | (bank0 & mask));
// FCEU_printf(" %04x [%02x]",0x0400^cswap,block | (bank1 & mask));
setchr1(0x0400 ^ cswap, block | (bank1 & mask));
// FCEU_printf(" %04x [%02x]",0x0800^cswap,block | (bank2 & mask));
setchr1(0x0800 ^ cswap, block | (bank2 & mask));
// FCEU_printf(" %04x [%02x]",0x0c00^cswap,block | (bank3 & mask));
setchr1(0x0c00 ^ cswap, block | (bank3 & mask));
// FCEU_printf(" %04x [%02x]",0x1000^cswap,block | (bank4 & mask));
setchr1(0x1000 ^ cswap, block | (bank4 & mask));
// FCEU_printf(" %04x [%02x]",0x1400^cswap,block | (bank5 & mask));
setchr1(0x1400 ^ cswap, block | (bank5 & mask));
// FCEU_printf(" %04x [%02x]",0x1800^cswap,block | (bank6 & mask));
setchr1(0x1800 ^ cswap, block | (bank6 & mask));
// FCEU_printf(" %04x [%02x]\n",0x1c00^cswap,block | (bank7 & mask));
setchr1(0x1c00 ^ cswap, block | (bank7 & mask));
setmirror(mirror & 1);
@@ -190,19 +180,19 @@ static void UNLOneBusIRQHook(void) {
}
static DECLFW(UNLOneBusWriteAPU40XX) {
// FCEU_printf("APU %04x:%04x\n",A,V);
// if(((A & 0x3f)!=0x16) && ((apu40xx[0x30] & 0x10) || ((A & 0x3f)>0x17)))FCEU_printf("APU %04x:%04x\n",A,V);
apu40xx[A & 0x3f] = V;
switch (A & 0x3f) {
case 0x12:
if (apu40xx[0x30] & 0x10) {
pcm_addr = V << 6;
}
break;
break;
case 0x13:
if (apu40xx[0x30] & 0x10) {
pcm_size = (V << 4) + 1;
}
break;
break;
case 0x15:
if (apu40xx[0x30] & 0x10) {
pcm_enable = V & 0x10;
@@ -214,7 +204,7 @@ static DECLFW(UNLOneBusWriteAPU40XX) {
pcm_latch = pcm_clock;
V &= 0xef;
}
break;
break;
}
defapuwrite[A & 0x3f](A, V);
}
@@ -227,7 +217,7 @@ static DECLFR(UNLOneBusReadAPU40XX) {
if (apu40xx[0x30] & 0x10) {
result = (result & 0x7f) | pcm_irq;
}
break;
break;
}
return result;
}
@@ -243,7 +233,7 @@ static void UNLOneBusCpuHook(int a) {
pcm_enable = 0;
X6502_IRQBegin(FCEU_IQEXT);
} else {
uint16 addr = pcm_addr | ((apu40xx[0x30]^3) << 14);
uint16 addr = pcm_addr | ((apu40xx[0x30]^3) << 14);
uint8 raw_pcm = ARead[addr](addr) >> 1;
defapuwrite[0x11](0x4011, raw_pcm);
pcm_addr++;

1
src/boards/pec-586.c
View File

@@ -101,6 +101,7 @@ static void UNLPEC586Power(void) {
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x5000, 0x5fff, UNLPEC586Write);
SetReadHandler(0x5000, 0x5fff, UNLPEC586Read);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void UNLPEC586Close(void) {

3
src/boards/transformer.c
View File

@@ -42,7 +42,7 @@ static void FP_FASTAPASS(1) TransformerIRQHook(int a) {
else
TransformerChar = i | 0x80;
X6502_IRQBegin(FCEU_IQEXT);
memcpy((void*)&oldkeys[0], (void*)TransformerKeys, 256);
memcpy((void*)&oldkeys[0], (void*)TransformerKeys, sizeof(oldkeys));
break;
}
}
@@ -71,6 +71,7 @@ static void TransformerPower(void) {
SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
MapIRQHook = TransformerIRQHook;
}

7
src/boards/vrc2and4.c
View File

@@ -19,6 +19,7 @@
*
* VRC-2/VRC-4 Konami
* VRC-4 Pirate
*
*/
#include "mapinc.h"
@@ -136,8 +137,8 @@ static DECLFW(M21Write) {
}
static DECLFW(M22Write) {
if (A == 0xC007) { // Ganbare Goemon Gaiden does strange things!!! at the end credits
weirdo = 8; // quick dirty hack, seems there is no other games with such PCB, so
if ((A >= 0xC004) && (A <= 0xC007)) { // Ganbare Goemon Gaiden does strange things!!! at the end credits
weirdo = 1; // quick dirty hack, seems there is no other games with such PCB, so
// we never know if it will not work for something else lol
}
A |= ((A >> 2) & 0x3); // It's just swapped lines from 21 mapper
@@ -172,6 +173,7 @@ static void M23Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, M23Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M25Power(void) {
@@ -182,6 +184,7 @@ static void M25Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, M22Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
void FP_FASTAPASS(1) VRC24IRQHook(int a) {

3
src/boards/vrc3.c
View File

@@ -74,7 +74,7 @@ static DECLFW(M73Write) {
}
static void M73IRQHook(int a) {
uint32 i;
int32 i;
if (!IRQa) return;
for (i = 0; i < a; i++) {
if (IRQm) {
@@ -106,6 +106,7 @@ static void M73Power(void) {
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x8000, 0xFFFF, M73Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void M73Close(void) {

1
src/boards/vrc5.c
View File

@@ -184,6 +184,7 @@ static void M190Power(void) {
SetWriteHandler(0x8000, 0xFFFF, M190Write);
SetReadHandler(0xDC00, 0xDC00, M190Read);
SetReadHandler(0xDD00, 0xDD00, M190Read);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
Sync();
}

7
src/boards/vrc6.c
View File

@@ -127,6 +127,7 @@ static void VRC6Power(void) {
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x8000, 0xFFFF, VRC6Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void VRC6IRQHook(int a) {
@@ -244,11 +245,11 @@ static INLINE void DoSQVHQ(int x) {
if (vpsg1[(x << 2) | 0x2] & 0x80) {
if (vpsg1[x << 2] & 0x80) {
for (V = cvbc[x]; V < SOUNDTS; V++)
for (V = cvbc[x]; V < (int)SOUNDTS; V++)
WaveHi[V] += amp;
} else {
int32 thresh = (vpsg1[x << 2] >> 4) & 7;
for (V = cvbc[x]; V < SOUNDTS; V++) {
for (V = cvbc[x]; V < (int)SOUNDTS; V++) {
if (dcount[x] > thresh)
WaveHi[V] += amp;
vcount[x]--;
@@ -276,7 +277,7 @@ static void DoSawVHQ(void) {
int32 V;
if (vpsg2[2] & 0x80) {
for (V = cvbc[2]; V < SOUNDTS; V++) {
for (V = cvbc[2]; V < (int)SOUNDTS; V++) {
WaveHi[V] += (((phaseacc >> 3) & 0x1f) << 8) * 6 / 8;
vcount[2]--;
if (vcount[2] <= 0) {

1
src/boards/vrc7.c
View File

@@ -151,6 +151,7 @@ static void VRC7Power(void) {
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x6000, 0xFFFF, CartBR);
SetWriteHandler(0x8000, 0xFFFF, VRC7Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void VRC7Close(void) {

1
src/boards/yoko.c
View File

@@ -174,6 +174,7 @@ static void M83Power(void) {
SetWriteHandler(0x6000, 0x7fff, CartBW);// Pirate Dragon Ball Z Party [p1] used if for saves instead of seraial EEPROM
SetReadHandler(0x8000, 0xffff, CartBR);
SetWriteHandler(0x8000, 0xffff, M83Write);
FCEU_CheatAddRAM(WRAMSIZE >> 10, 0x6000, WRAM);
}
static void UNLYOKOReset(void) {

1
src/ines.h
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@@ -122,6 +122,7 @@ void Mapper112_Init(CartInfo *);
void Mapper113_Init(CartInfo *);
void Mapper114_Init(CartInfo *);
void Mapper115_Init(CartInfo *);
void Mapper116_Init(CartInfo *);
void Mapper117_Init(CartInfo *);
void Mapper119_Init(CartInfo *);
void Mapper120_Init(CartInfo *);

1
src/ppu.h
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@@ -21,5 +21,6 @@ void FCEUPPU_SaveState(void);
void FCEUPPU_LoadState(int version);
extern int scanline;
extern uint8 PPU[4];
#endif

1
zzz_todo.txt
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@@ -15,6 +15,7 @@ N 004 mapper - "Long Zhu Ying Xiong (As) [p1].nes"
016 mapper - as like 157, äîáàâèòü EEPROM ýìóëÿöèþ.
126 mapper - "PowerJoy 84-in-1 (PJ-008) (Unl) [!]" íå ýìóëèðóåòñÿ (Nestopia)
253 mapper - ïëîõàÿ ñèíõðîíèçàöèÿ IRQ, ïðîáëåìà â âû÷èñëåíèÿõ òàéìèíãà èëè â ÿäðå?
015 mapper - âåøàåòñÿ ïðè çàãðóçêå-ñåéâå Yuefei (Unl) [h1]
Ãîòîâî: