From 1ac2f351ee9afb682fc4d29ca266bdc60fe9dc05 Mon Sep 17 00:00:00 2001
From: NewRisingSun <8vytz1+dhp372pv94ebg@sharklasers.com>
Date: Wed, 17 Sep 2025 19:46:40 +0200
Subject: [PATCH] Add mapper 422.3. Correct multicart registers of mapper 219.

---
 src/boards/126_422_534.c |  8 ++++++++
 src/boards/a9746.c       | 31 +++++++++++++++++--------------
 2 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/src/boards/126_422_534.c b/src/boards/126_422_534.c
index 18f5836..2ae880d 100644
--- a/src/boards/126_422_534.c
+++ b/src/boards/126_422_534.c
@@ -51,6 +51,10 @@ static void wrapPRG(uint32 A, uint8 V) {
 	int prgOR  =(EXPREGS[0] <<4 &0x70 | (EXPREGS[0] ^0x20) <<3 &0x180) &~prgAND; /* Outer PRG bank */
 	if (submapper ==1) prgOR =prgOR &0x7F | prgOR >>1 &0x80;    /* Submapper 1 uses PRG A21 as a chip select between two 1 MiB chips */
 	if (submapper ==2) prgOR =prgOR &0x7F | EXPREGS[1] <<5 &0x80;   /* Submapper 2 uses 6001.2 (not documented in datasheet) as a chip select between two 1 MiB chips */
+	if (submapper ==3 && EXPREGS[0] &0x04) { /* Submapper 3 replace PRG A14 with PRG A21 */
+		prgAND &=~0x02;
+		prgOR |= EXPREGS[0] &0x20? 0x00: 0x02;
+	}
 	for (A =0; A <4; A++) {
 		/* In UNROM-like mode (CT3=1, CT2=1, CT0=1), MMC3 sees A13=0 and A14=CPU A14 during reads, making register 6 apply from $8000-$BFFF, and the fixed bank from $C000-$FFFF.
 		   In NROM-128, NROM-256, ANROM and UNROM modes (CT0=1), MMC3 sees A13=0 and A14=0, making register 6 apply from $8000-$FFFF. */
@@ -80,6 +84,10 @@ static void wrapCHR(uint32 A, uint8 V) {
 	else
 		chrOR =((EXPREGS[0] ^0x20) <<4 &0x380 | EXPREGS[0] <<8 &0x400) &~chrAND;
 	
+	if (submapper ==3 && EXPREGS[0] &0x04) { /* Submapper 3 replace CHR A14 with PRG A21 */
+		chrAND &=~0x10;
+		chrOR |= EXPREGS[0] &0x20? 0x00: 0x10;
+	}
 	if (EXPREGS[3] &0x10) /* CNROM mode: 8 KiB inner CHR bank comes from outer bank register #2 */
 		setchr8(EXPREGS[2] &(chrAND >>3) | (chrOR &~chrAND) >>3);
 	else /* MMC3 CHR mode */
diff --git a/src/boards/a9746.c b/src/boards/a9746.c
index d2b1a05..009c7fb 100644
--- a/src/boards/a9746.c
+++ b/src/boards/a9746.c
@@ -22,18 +22,19 @@
 #include "mmc3.h"
 
 static void UNLA9746PWrap(uint32 A, uint8 V) {
-	setprg8(A, EXPREGS[1] <<4 | V &0x0F);
+	int prgAND = EXPREGS[0] &0x40? 0x0F: 0x1F;
+	int prgOR = EXPREGS[0] <<4 &0x10 | EXPREGS[1] &0x20;
+	setprg8(A, V &prgAND | prgOR &~prgAND);
 }
 
 static void UNLA9746CWrap(uint32 A, uint8 V) {
-	setchr1(A, EXPREGS[1] <<7 | V &0x7F);
+	int chrAND = EXPREGS[0] &0x80? 0x7F: 0xFF;
+	int chrOR = EXPREGS[0] <<4 &0x80 | EXPREGS[1] <<3 &0x100;
+	setchr1(A, V &chrAND | chrOR &~chrAND);
 }
 
 static DECLFW(UNLA9746WriteOuter) {
-	switch(A &1) {
-		case 0: EXPREGS[1] =EXPREGS[1] &~1 | V >>3 &1; break;
-		case 1: EXPREGS[1] =EXPREGS[1] &~2 | V >>4 &2; break;
-	}
+	EXPREGS[A &1] = V;
 	FixMMC3PRG(MMC3_cmd);
 	FixMMC3CHR(MMC3_cmd);
 }
@@ -43,7 +44,7 @@ static DECLFW(UNLA9746WriteASIC) {
 	
 	if (A &1)
 	{ 	/* Register data */
-		if (~EXPREGS[0] &0x20)
+		if (~EXPREGS[2] &0x20)
 		{	/* Scrambled mode inactive */
 			MMC3_CMDWrite(A, V);
 		}
@@ -75,7 +76,7 @@ static DECLFW(UNLA9746WriteASIC) {
 	else
 	{	/* Register index */
 		MMC3_CMDWrite(A, V);
-		if (A &2) EXPREGS[0] =V;
+		if (A &2) EXPREGS[2] =V;
 	}
 }
 
@@ -83,23 +84,25 @@ static void UNLA9746Power(void) {
 	GenMMC3Power();
 	SetWriteHandler(0x5000, 0x5FFF, UNLA9746WriteOuter);
 	SetWriteHandler(0x8000, 0xBFFF, UNLA9746WriteASIC);
-	EXPREGS[0] = 0;
-	EXPREGS[1] = 3;
+	EXPREGS[0] = 0x00;
+	EXPREGS[1] = 0x20;
+	EXPREGS[2] = 0x00;
 	MMC3RegReset();
 }
 
 static void UNLA9746Reset(void) {
-	EXPREGS[0] = 0;
-	EXPREGS[1] = 3;
+	EXPREGS[0] = 0x00;
+	EXPREGS[1] = 0x20;
+	EXPREGS[2] = 0x00;
 	MMC3RegReset();
 }
 
 void UNLA9746_Init(CartInfo *info) {
-	GenMMC3_Init(info, 128, 128, 0, 0);
+	GenMMC3_Init(info, 256, 256, 0, 0);
 	pwrap = UNLA9746PWrap;
 	cwrap = UNLA9746CWrap;
 	info->Power = UNLA9746Power;
 	info->Reset = UNLA9746Reset;
-	AddExState(EXPREGS, 2, 0, "EXPR");
+	AddExState(EXPREGS, 3, 0, "EXPR");
 }