97 lines
3.5 KiB
C
97 lines
3.5 KiB
C
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/* FCEUmm - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2020 negativeExponent
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Chipset used on various PCBs named WX-KB4K, T4A54A, BS-5652... */
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/* "Rockman 3" on YH-322 and "King of Fighters 97" on "Super 6-in-1" enable interrupts without initializing the frame IRQ register and therefore freeze on real hardware.
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They can run if another game is selected that does initialize the frame IRQ register, then soft-resetting to the menu and selecting the previously-freezing games. */
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#include "mapinc.h"
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#include "mmc3.h"
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static uint8 dip;
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static void Mapper134_PRGWrap(uint32 A, uint8 V) {
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int prgAND =EXPREGS[1] &0x04? 0x0F: 0x1F;
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int prgOR =EXPREGS[1] <<4 &0x30 | EXPREGS[0] <<2 &0x40;
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if (EXPREGS[1] &0x80) { /* NROM mode */
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if (EXPREGS[1] &0x08) { /* NROM-128 mode */
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setprg8(0x8000, (DRegBuf[6] &~1 |0) &prgAND | prgOR &~prgAND);
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setprg8(0xA000, (DRegBuf[6] &~1 |1) &prgAND | prgOR &~prgAND);
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setprg8(0xC000, (DRegBuf[6] &~1 |0) &prgAND | prgOR &~prgAND);
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setprg8(0xE000, (DRegBuf[6] &~1 |1) &prgAND | prgOR &~prgAND);
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} else { /* NROM-256 mode */
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setprg8(0x8000, (DRegBuf[6] &~3 |0) &prgAND | prgOR &~prgAND);
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setprg8(0xA000, (DRegBuf[6] &~3 |1) &prgAND | prgOR &~prgAND);
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setprg8(0xC000, (DRegBuf[6] &~3 |2) &prgAND | prgOR &~prgAND);
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setprg8(0xE000, (DRegBuf[6] &~3 |3) &prgAND | prgOR &~prgAND);
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}
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} else
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setprg8(A, V &prgAND | prgOR &~prgAND);
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}
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static void Mapper134_CHRWrap(uint32 A, uint8 V) {
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int chrAND =EXPREGS[1] &0x40? 0x7F: 0xFF;
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int chrOR =EXPREGS[1] <<3 &0x180 | EXPREGS[0] <<4 &0x200;
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if (EXPREGS[0] &0x08) V =EXPREGS[2] <<3 | A >>10 &7; /* In CNROM mode, outer bank register 2 replaces the MMC3's CHR registers, and CHR A10-A12 are PPU A10-A12. */
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setchr1(A, V &chrAND | chrOR &~chrAND);
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}
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static DECLFR(Mapper134_Read) {
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return EXPREGS[0] &0x40? dip: CartBR(A);
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}
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static DECLFW(Mapper134_Write) {
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if (~EXPREGS[0] &0x80) {
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EXPREGS[A &3] =V;
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FixMMC3PRG(MMC3_cmd);
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FixMMC3CHR(MMC3_cmd);
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} else
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if ((A &3) ==2) {
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EXPREGS[A &3] =EXPREGS[A &3] &~3 | V &3;
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FixMMC3CHR(MMC3_cmd);
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}
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CartBW(A, V);
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}
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static void Mapper134_Reset(void) {
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dip++;
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dip &= 15;
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EXPREGS[0] =EXPREGS[1] =EXPREGS[2] =EXPREGS[3] =0;
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MMC3RegReset();
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}
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static void Mapper134_Power(void) {
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dip =0;
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EXPREGS[0] =EXPREGS[1] =EXPREGS[2] =EXPREGS[3] =0;
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GenMMC3Power();
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SetWriteHandler(0x6000, 0x7FFF, Mapper134_Write);
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SetReadHandler(0x8000, 0xFFFF, Mapper134_Read);
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}
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void Mapper134_Init(CartInfo *info) {
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GenMMC3_Init(info, 256, 256, info->iNES2? (info->PRGRamSize + info->PRGRamSaveSize) /1024: 8, info->battery);
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cwrap = Mapper134_CHRWrap;
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pwrap = Mapper134_PRGWrap;
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info->Power = Mapper134_Power;
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info->Reset = Mapper134_Reset;
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AddExState(EXPREGS, 4, 0, "EXPR");
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AddExState(&dip, 1, 0, "DIPS");
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}
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