195 lines
4.3 KiB
C
195 lines
4.3 KiB
C
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/* FCE Ultra - NES/Famicom Emulator
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*
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* Copyright notice for this file:
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* Copyright (C) 2006 CaH4e3
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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#include <string.h>
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#include <stdlib.h>
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#include "share.h"
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#define DI 01
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#define CLK 02
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#define CS 04
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#define OUT0 01
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#define D3 01
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#define D4 02
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typedef struct
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{
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uint8 state;
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uint8 cmd;
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uint8 addr;
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uint8 iswritable;
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uint16 acc;
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uint16 data[128];
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} EEPROM;
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EEPROM serialROM[2];
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uint8 oldCLK, bankFlip, DIFlip, OUT0state;
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uint8 serialROMautomat(uint8 chip, uint16 data)
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{
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uint8 resp = 1;
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chip &= 1;
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if(!(data & CS))
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{
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if(!(data & CLK))
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{
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uint8 state = serialROM[chip].state;
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uint8 mask, i;
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switch (serialROM[chip].cmd)
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{
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case 0x00:
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mask = ~(1<<(state&7));
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if(state<8)
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{
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serialROM[chip].addr &= mask;
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serialROM[chip].addr |= ((data&1)<<(state&7));
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}
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else if(state<15)
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{
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serialROM[chip].acc &= mask;
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serialROM[chip].acc |= ((data&1)<<(state&7));
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}
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else
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{
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serialROM[chip].acc &= mask;
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serialROM[chip].acc |= ((data&1)<<(state&7));
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serialROM[chip].cmd = serialROM[chip].acc;
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}
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break;
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case 0x01:
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if(state<30)
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resp = (serialROM[chip].data[serialROM[chip].addr]>>(state&15))&1;
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else
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{
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resp = (serialROM[chip].data[serialROM[chip].addr]>>(state&15))&1;
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serialROM[chip].cmd = 0;
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}
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break;
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case 0x06:
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mask = ~(1<<(state&15));
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if(state<30)
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{
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serialROM[chip].acc &= mask;
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serialROM[chip].acc |= ((data&1)<<(state&15));
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}
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else
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{
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serialROM[chip].acc &= mask;
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serialROM[chip].acc |= ((data&1)<<(state&15));
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if(serialROM[chip].iswritable)
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serialROM[chip].data[serialROM[chip].addr] = serialROM[chip].acc;
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serialROM[chip].cmd = 0;
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}
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break;
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case 0x0C:
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for(i=0;i<128;i++)
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serialROM[chip].data[i] = 0xFFFF;
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serialROM[chip].cmd = 0;
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resp = 1;
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break;
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case 0x0D:
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serialROM[chip].cmd = 0;
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resp = 1;
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break;
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case 0x09:
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serialROM[chip].cmd = 0;
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serialROM[chip].iswritable = 1;
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break;
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case 0x0B:
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serialROM[chip].cmd = 0;
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serialROM[chip].iswritable = 0;
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break;
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default:
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serialROM[chip].cmd = 0;
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serialROM[chip].state = 0;
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break;
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}
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}
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else
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{
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if(serialROM[chip].cmd == 0)
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{
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if(serialROM[chip].state>15)
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serialROM[chip].state = 0;
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}
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else
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serialROM[chip].cmd++;
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}
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}
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else
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{
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serialROM[chip].cmd = 0;
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serialROM[chip].state = 0;
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}
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return resp;
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}
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uint8 serialROMstate(uint8 linestate)
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{
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uint8 answ = 0, newCLK = linestate & CLK;
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if((!oldCLK)&&newCLK)
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{
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DIFlip^=1;
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if(linestate&&OUT0)
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{
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serialROMautomat(bankFlip, 04+DIFlip);
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bankFlip^=1;
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serialROMautomat(bankFlip, 02+DIFlip);
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}
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}
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answ = DIFlip^1;
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answ |= (serialROMautomat(bankFlip, newCLK+DIFlip)<<1);
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oldCLK = newCLK;
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return answ;
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}
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static uint8 FP_FASTAPASS(2) BBRead(int w, uint8 ret)
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{
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if(w)
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{
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serialROMstate(OUT0);
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ret |= serialROMstate(OUT0|CLK);
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}
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return(ret);
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}
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static void FP_FASTAPASS(1) BBWrite(uint8 V)
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{
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OUT0state = V;
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serialROMstate(OUT0state?OUT0:0);
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}
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static INPUTCFC BattleBox={BBRead,BBWrite,0,0,0,0};
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INPUTCFC *FCEU_InitBattleBox(void)
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{
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oldCLK = 1;
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bankFlip = 0;
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DIFlip = 0;
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serialROM[0].iswritable = 1;
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serialROMautomat(0, 4);
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serialROM[1].iswritable = 1;
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serialROMautomat(1, 4);
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serialROMautomat(bankFlip, 02+DIFlip);
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return(&BattleBox);
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}
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*/
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